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arch/arm/src/stm32/hardware/stm32_adc_*: Additional coding standard issues: Binary operators should be separated with spaces.

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This commit is contained in:
Gregory Nutt 2019-08-31 17:54:38 -06:00
parent 97a71db3b1
commit 19e1db3f97
3 changed files with 262 additions and 262 deletions
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134
arch/arm/src/stm32/hardware/stm32_adc_v1.h
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@ -92,10 +92,10 @@
# define STM32_ADC3_OFFSET 0x0200
# define STM32_ADC_CMN_OFFSET 0x0300
# define STM32_ADC1_BASE (STM32_ADC1_OFFSET+STM32_ADC_BASE) /* ADC1 ADC */
# define STM32_ADC2_BASE (STM32_ADC2_OFFSET+STM32_ADC_BASE) /* ADC2 ADC */
# define STM32_ADC3_BASE (STM32_ADC3_OFFSET+STM32_ADC_BASE) /* ADC3 ADC */
# define STM32_ADCCMN_BASE (STM32_ADC_CMN_OFFSET+STM32_ADC_BASE) /* ADC1, ADC2, ADC3 common */
# define STM32_ADC1_BASE (STM32_ADC1_OFFSET + STM32_ADC_BASE) /* ADC1 ADC */
# define STM32_ADC2_BASE (STM32_ADC2_OFFSET + STM32_ADC_BASE) /* ADC2 ADC */
# define STM32_ADC3_BASE (STM32_ADC3_OFFSET + STM32_ADC_BASE) /* ADC3 ADC */
# define STM32_ADCCMN_BASE (STM32_ADC_CMN_OFFSET + STM32_ADC_BASE) /* ADC1, ADC2, ADC3 common */
#endif
/* Register Offsets *********************************************************************************/
@ -130,78 +130,78 @@
/* Register Addresses *******************************************************************************/
#if STM32_NADC > 0
# define STM32_ADC1_SR (STM32_ADC1_BASE+STM32_ADC_SR_OFFSET)
# define STM32_ADC1_CR1 (STM32_ADC1_BASE+STM32_ADC_CR1_OFFSET)
# define STM32_ADC1_CR2 (STM32_ADC1_BASE+STM32_ADC_CR2_OFFSET)
# define STM32_ADC1_SMPR1 (STM32_ADC1_BASE+STM32_ADC_SMPR1_OFFSET)
# define STM32_ADC1_SMPR2 (STM32_ADC1_BASE+STM32_ADC_SMPR2_OFFSET)
# define STM32_ADC1_JOFR1 (STM32_ADC1_BASE+STM32_ADC_JOFR1_OFFSET)
# define STM32_ADC1_JOFR2 (STM32_ADC1_BASE+STM32_ADC_JOFR2_OFFSET)
# define STM32_ADC1_JOFR3 (STM32_ADC1_BASE+STM32_ADC_JOFR3_OFFSET)
# define STM32_ADC1_JOFR4 (STM32_ADC1_BASE+STM32_ADC_JOFR4_OFFSET)
# define STM32_ADC1_HTR (STM32_ADC1_BASE+STM32_ADC_HTR_OFFSET)
# define STM32_ADC1_LTR (STM32_ADC1_BASE+STM32_ADC_LTR_OFFSET)
# define STM32_ADC1_SQR1 (STM32_ADC1_BASE+STM32_ADC_SQR1_OFFSET)
# define STM32_ADC1_SQR2 (STM32_ADC1_BASE+STM32_ADC_SQR2_OFFSET)
# define STM32_ADC1_SQR3 (STM32_ADC1_BASE+STM32_ADC_SQR3_OFFSET)
# define STM32_ADC1_JSQR (STM32_ADC1_BASE+STM32_ADC_JSQR_OFFSET)
# define STM32_ADC1_JDR1 (STM32_ADC1_BASE+STM32_ADC_JDR1_OFFSET)
# define STM32_ADC1_JDR2 (STM32_ADC1_BASE+STM32_ADC_JDR2_OFFSET)
# define STM32_ADC1_JDR3 (STM32_ADC1_BASE+STM32_ADC_JDR3_OFFSET)
# define STM32_ADC1_JDR4 (STM32_ADC1_BASE+STM32_ADC_JDR4_OFFSET)
# define STM32_ADC1_DR (STM32_ADC1_BASE+STM32_ADC_DR_OFFSET)
# define STM32_ADC1_SR (STM32_ADC1_BASE + STM32_ADC_SR_OFFSET)
# define STM32_ADC1_CR1 (STM32_ADC1_BASE + STM32_ADC_CR1_OFFSET)
# define STM32_ADC1_CR2 (STM32_ADC1_BASE + STM32_ADC_CR2_OFFSET)
# define STM32_ADC1_SMPR1 (STM32_ADC1_BASE + STM32_ADC_SMPR1_OFFSET)
# define STM32_ADC1_SMPR2 (STM32_ADC1_BASE + STM32_ADC_SMPR2_OFFSET)
# define STM32_ADC1_JOFR1 (STM32_ADC1_BASE + STM32_ADC_JOFR1_OFFSET)
# define STM32_ADC1_JOFR2 (STM32_ADC1_BASE + STM32_ADC_JOFR2_OFFSET)
# define STM32_ADC1_JOFR3 (STM32_ADC1_BASE + STM32_ADC_JOFR3_OFFSET)
# define STM32_ADC1_JOFR4 (STM32_ADC1_BASE + STM32_ADC_JOFR4_OFFSET)
# define STM32_ADC1_HTR (STM32_ADC1_BASE + STM32_ADC_HTR_OFFSET)
# define STM32_ADC1_LTR (STM32_ADC1_BASE + STM32_ADC_LTR_OFFSET)
# define STM32_ADC1_SQR1 (STM32_ADC1_BASE + STM32_ADC_SQR1_OFFSET)
# define STM32_ADC1_SQR2 (STM32_ADC1_BASE + STM32_ADC_SQR2_OFFSET)
# define STM32_ADC1_SQR3 (STM32_ADC1_BASE + STM32_ADC_SQR3_OFFSET)
# define STM32_ADC1_JSQR (STM32_ADC1_BASE + STM32_ADC_JSQR_OFFSET)
# define STM32_ADC1_JDR1 (STM32_ADC1_BASE + STM32_ADC_JDR1_OFFSET)
# define STM32_ADC1_JDR2 (STM32_ADC1_BASE + STM32_ADC_JDR2_OFFSET)
# define STM32_ADC1_JDR3 (STM32_ADC1_BASE + STM32_ADC_JDR3_OFFSET)
# define STM32_ADC1_JDR4 (STM32_ADC1_BASE + STM32_ADC_JDR4_OFFSET)
# define STM32_ADC1_DR (STM32_ADC1_BASE + STM32_ADC_DR_OFFSET)
#endif
#if STM32_NADC > 1
# define STM32_ADC2_SR (STM32_ADC2_BASE+STM32_ADC_SR_OFFSET)
# define STM32_ADC2_CR1 (STM32_ADC2_BASE+STM32_ADC_CR1_OFFSET)
# define STM32_ADC2_CR2 (STM32_ADC2_BASE+STM32_ADC_CR2_OFFSET)
# define STM32_ADC2_SMPR1 (STM32_ADC2_BASE+STM32_ADC_SMPR1_OFFSET)
# define STM32_ADC2_SMPR2 (STM32_ADC2_BASE+STM32_ADC_SMPR2_OFFSET)
# define STM32_ADC2_JOFR1 (STM32_ADC2_BASE+STM32_ADC_JOFR1_OFFSET)
# define STM32_ADC2_JOFR2 (STM32_ADC2_BASE+STM32_ADC_JOFR2_OFFSET)
# define STM32_ADC2_JOFR3 (STM32_ADC2_BASE+STM32_ADC_JOFR3_OFFSET)
# define STM32_ADC2_JOFR4 (STM32_ADC2_BASE+STM32_ADC_JOFR4_OFFSET)
# define STM32_ADC2_HTR (STM32_ADC2_BASE+STM32_ADC_HTR_OFFSET)
# define STM32_ADC2_LTR (STM32_ADC2_BASE+STM32_ADC_LTR_OFFSET)
# define STM32_ADC2_SQR1 (STM32_ADC2_BASE+STM32_ADC_SQR1_OFFSET)
# define STM32_ADC2_SQR2 (STM32_ADC2_BASE+STM32_ADC_SQR2_OFFSET)
# define STM32_ADC2_SQR3 (STM32_ADC2_BASE+STM32_ADC_SQR3_OFFSET)
# define STM32_ADC2_JSQR (STM32_ADC2_BASE+STM32_ADC_JSQR_OFFSET)
# define STM32_ADC2_JDR1 (STM32_ADC2_BASE+STM32_ADC_JDR1_OFFSET)
# define STM32_ADC2_JDR2 (STM32_ADC2_BASE+STM32_ADC_JDR2_OFFSET)
# define STM32_ADC2_JDR3 (STM32_ADC2_BASE+STM32_ADC_JDR3_OFFSET)
# define STM32_ADC2_JDR4 (STM32_ADC2_BASE+STM32_ADC_JDR4_OFFSET)
# define STM32_ADC2_DR (STM32_ADC2_BASE+STM32_ADC_DR_OFFSET)
# define STM32_ADC2_SR (STM32_ADC2_BASE + STM32_ADC_SR_OFFSET)
# define STM32_ADC2_CR1 (STM32_ADC2_BASE + STM32_ADC_CR1_OFFSET)
# define STM32_ADC2_CR2 (STM32_ADC2_BASE + STM32_ADC_CR2_OFFSET)
# define STM32_ADC2_SMPR1 (STM32_ADC2_BASE + STM32_ADC_SMPR1_OFFSET)
# define STM32_ADC2_SMPR2 (STM32_ADC2_BASE + STM32_ADC_SMPR2_OFFSET)
# define STM32_ADC2_JOFR1 (STM32_ADC2_BASE + STM32_ADC_JOFR1_OFFSET)
# define STM32_ADC2_JOFR2 (STM32_ADC2_BASE + STM32_ADC_JOFR2_OFFSET)
# define STM32_ADC2_JOFR3 (STM32_ADC2_BASE + STM32_ADC_JOFR3_OFFSET)
# define STM32_ADC2_JOFR4 (STM32_ADC2_BASE + STM32_ADC_JOFR4_OFFSET)
# define STM32_ADC2_HTR (STM32_ADC2_BASE + STM32_ADC_HTR_OFFSET)
# define STM32_ADC2_LTR (STM32_ADC2_BASE + STM32_ADC_LTR_OFFSET)
# define STM32_ADC2_SQR1 (STM32_ADC2_BASE + STM32_ADC_SQR1_OFFSET)
# define STM32_ADC2_SQR2 (STM32_ADC2_BASE + STM32_ADC_SQR2_OFFSET)
# define STM32_ADC2_SQR3 (STM32_ADC2_BASE + STM32_ADC_SQR3_OFFSET)
# define STM32_ADC2_JSQR (STM32_ADC2_BASE + STM32_ADC_JSQR_OFFSET)
# define STM32_ADC2_JDR1 (STM32_ADC2_BASE + STM32_ADC_JDR1_OFFSET)
# define STM32_ADC2_JDR2 (STM32_ADC2_BASE + STM32_ADC_JDR2_OFFSET)
# define STM32_ADC2_JDR3 (STM32_ADC2_BASE + STM32_ADC_JDR3_OFFSET)
# define STM32_ADC2_JDR4 (STM32_ADC2_BASE + STM32_ADC_JDR4_OFFSET)
# define STM32_ADC2_DR (STM32_ADC2_BASE + STM32_ADC_DR_OFFSET)
#endif
#if STM32_NADC > 2
# define STM32_ADC3_SR (STM32_ADC3_BASE+STM32_ADC_SR_OFFSET)
# define STM32_ADC3_CR1 (STM32_ADC3_BASE+STM32_ADC_CR1_OFFSET)
# define STM32_ADC3_CR2 (STM32_ADC3_BASE+STM32_ADC_CR2_OFFSET)
# define STM32_ADC3_SMPR1 (STM32_ADC3_BASE+STM32_ADC_SMPR1_OFFSET)
# define STM32_ADC3_SMPR2 (STM32_ADC3_BASE+STM32_ADC_SMPR2_OFFSET)
# define STM32_ADC3_JOFR1 (STM32_ADC3_BASE+STM32_ADC_JOFR1_OFFSET)
# define STM32_ADC3_JOFR2 (STM32_ADC3_BASE+STM32_ADC_JOFR2_OFFSET)
# define STM32_ADC3_JOFR3 (STM32_ADC3_BASE+STM32_ADC_JOFR3_OFFSET)
# define STM32_ADC3_JOFR4 (STM32_ADC3_BASE+STM32_ADC_JOFR4_OFFSET)
# define STM32_ADC3_HTR (STM32_ADC3_BASE+STM32_ADC_HTR_OFFSET)
# define STM32_ADC3_LTR (STM32_ADC3_BASE+STM32_ADC_LTR_OFFSET)
# define STM32_ADC3_SQR1 (STM32_ADC3_BASE+STM32_ADC_SQR1_OFFSET)
# define STM32_ADC3_SQR2 (STM32_ADC3_BASE+STM32_ADC_SQR2_OFFSET)
# define STM32_ADC3_SQR3 (STM32_ADC3_BASE+STM32_ADC_SQR3_OFFSET)
# define STM32_ADC3_JSQR (STM32_ADC3_BASE+STM32_ADC_JSQR_OFFSET)
# define STM32_ADC3_JDR1 (STM32_ADC3_BASE+STM32_ADC_JDR1_OFFSET)
# define STM32_ADC3_JDR2 (STM32_ADC3_BASE+STM32_ADC_JDR2_OFFSET)
# define STM32_ADC3_JDR3 (STM32_ADC3_BASE+STM32_ADC_JDR3_OFFSET)
# define STM32_ADC3_JDR4 (STM32_ADC3_BASE+STM32_ADC_JDR4_OFFSET)
# define STM32_ADC3_DR (STM32_ADC3_BASE+STM32_ADC_DR_OFFSET)
# define STM32_ADC3_SR (STM32_ADC3_BASE + STM32_ADC_SR_OFFSET)
# define STM32_ADC3_CR1 (STM32_ADC3_BASE + STM32_ADC_CR1_OFFSET)
# define STM32_ADC3_CR2 (STM32_ADC3_BASE + STM32_ADC_CR2_OFFSET)
# define STM32_ADC3_SMPR1 (STM32_ADC3_BASE + STM32_ADC_SMPR1_OFFSET)
# define STM32_ADC3_SMPR2 (STM32_ADC3_BASE + STM32_ADC_SMPR2_OFFSET)
# define STM32_ADC3_JOFR1 (STM32_ADC3_BASE + STM32_ADC_JOFR1_OFFSET)
# define STM32_ADC3_JOFR2 (STM32_ADC3_BASE + STM32_ADC_JOFR2_OFFSET)
# define STM32_ADC3_JOFR3 (STM32_ADC3_BASE + STM32_ADC_JOFR3_OFFSET)
# define STM32_ADC3_JOFR4 (STM32_ADC3_BASE + STM32_ADC_JOFR4_OFFSET)
# define STM32_ADC3_HTR (STM32_ADC3_BASE + STM32_ADC_HTR_OFFSET)
# define STM32_ADC3_LTR (STM32_ADC3_BASE + STM32_ADC_LTR_OFFSET)
# define STM32_ADC3_SQR1 (STM32_ADC3_BASE + STM32_ADC_SQR1_OFFSET)
# define STM32_ADC3_SQR2 (STM32_ADC3_BASE + STM32_ADC_SQR2_OFFSET)
# define STM32_ADC3_SQR3 (STM32_ADC3_BASE + STM32_ADC_SQR3_OFFSET)
# define STM32_ADC3_JSQR (STM32_ADC3_BASE + STM32_ADC_JSQR_OFFSET)
# define STM32_ADC3_JDR1 (STM32_ADC3_BASE + STM32_ADC_JDR1_OFFSET)
# define STM32_ADC3_JDR2 (STM32_ADC3_BASE + STM32_ADC_JDR2_OFFSET)
# define STM32_ADC3_JDR3 (STM32_ADC3_BASE + STM32_ADC_JDR3_OFFSET)
# define STM32_ADC3_JDR4 (STM32_ADC3_BASE + STM32_ADC_JDR4_OFFSET)
# define STM32_ADC3_DR (STM32_ADC3_BASE + STM32_ADC_DR_OFFSET)
#endif
#ifndef HAVE_BASIC_ADC
# define STM32_ADC_CSR (STM32_ADCCMN_BASE+STM32_ADC_CSR_OFFSET)
# define STM32_ADC_CCR (STM32_ADCCMN_BASE+STM32_ADC_CCR_OFFSET)
# define STM32_ADC_CDR (STM32_ADCCMN_BASE+STM32_ADC_CDR_OFFSET)
# define STM32_ADC_CSR (STM32_ADCCMN_BASE + STM32_ADC_CSR_OFFSET)
# define STM32_ADC_CCR (STM32_ADCCMN_BASE + STM32_ADC_CCR_OFFSET)
# define STM32_ADC_CDR (STM32_ADCCMN_BASE + STM32_ADC_CDR_OFFSET)
#endif
/* Register Bitfield Definitions ********************************************************************/

142
arch/arm/src/stm32/hardware/stm32_adc_v1l1.h
View File

@ -79,10 +79,10 @@
#define STM32_ADC3_OFFSET 0x0200
#define STM32_ADC_CMN_OFFSET 0x0300
#define STM32_ADC1_BASE (STM32_ADC1_OFFSET+STM32_ADC_BASE) /* ADC1 ADC */
#define STM32_ADC2_BASE (STM32_ADC2_OFFSET+STM32_ADC_BASE) /* ADC2 ADC */
#define STM32_ADC3_BASE (STM32_ADC3_OFFSET+STM32_ADC_BASE) /* ADC3 ADC */
#define STM32_ADCCMN_BASE (STM32_ADC_CMN_OFFSET+STM32_ADC_BASE) /* ADC1, ADC2, ADC3 common */
#define STM32_ADC1_BASE (STM32_ADC1_OFFSET + STM32_ADC_BASE) /* ADC1 ADC */
#define STM32_ADC2_BASE (STM32_ADC2_OFFSET + STM32_ADC_BASE) /* ADC2 ADC */
#define STM32_ADC3_BASE (STM32_ADC3_OFFSET + STM32_ADC_BASE) /* ADC3 ADC */
#define STM32_ADCCMN_BASE (STM32_ADC_CMN_OFFSET + STM32_ADC_BASE) /* ADC1, ADC2, ADC3 common */
/* Register Offsets *********************************************************************************/
@ -117,80 +117,80 @@
/* Register Addresses *******************************************************************************/
#if STM32_NADC > 0
# define STM32_ADC1_SR (STM32_ADC1_BASE+STM32_ADC_SR_OFFSET)
# define STM32_ADC1_CR1 (STM32_ADC1_BASE+STM32_ADC_CR1_OFFSET)
# define STM32_ADC1_CR2 (STM32_ADC1_BASE+STM32_ADC_CR2_OFFSET)
# define STM32_ADC1_SMPR1 (STM32_ADC1_BASE+STM32_ADC_SMPR1_OFFSET)
# define STM32_ADC1_SMPR2 (STM32_ADC1_BASE+STM32_ADC_SMPR2_OFFSET)
# define STM32_ADC1_SMPR3 (STM32_ADC1_BASE+STM32_ADC_SMPR3_OFFSET)
# define STM32_ADC1_JOFR1 (STM32_ADC1_BASE+STM32_ADC_JOFR1_OFFSET)
# define STM32_ADC1_JOFR2 (STM32_ADC1_BASE+STM32_ADC_JOFR2_OFFSET)
# define STM32_ADC1_JOFR3 (STM32_ADC1_BASE+STM32_ADC_JOFR3_OFFSET)
# define STM32_ADC1_JOFR4 (STM32_ADC1_BASE+STM32_ADC_JOFR4_OFFSET)
# define STM32_ADC1_HTR (STM32_ADC1_BASE+STM32_ADC_HTR_OFFSET)
# define STM32_ADC1_LTR (STM32_ADC1_BASE+STM32_ADC_LTR_OFFSET)
# define STM32_ADC1_SQR1 (STM32_ADC1_BASE+STM32_ADC_SQR1_OFFSET)
# define STM32_ADC1_SQR2 (STM32_ADC1_BASE+STM32_ADC_SQR2_OFFSET)
# define STM32_ADC1_SQR3 (STM32_ADC1_BASE+STM32_ADC_SQR3_OFFSET)
# define STM32_ADC1_SQR4 (STM32_ADC1_BASE+STM32_ADC_SQR4_OFFSET)
# define STM32_ADC1_SQR5 (STM32_ADC1_BASE+STM32_ADC_SQR5_OFFSET)
# define STM32_ADC1_JSQR (STM32_ADC1_BASE+STM32_ADC_JSQR_OFFSET)
# define STM32_ADC1_JDR1 (STM32_ADC1_BASE+STM32_ADC_JDR1_OFFSET)
# define STM32_ADC1_JDR2 (STM32_ADC1_BASE+STM32_ADC_JDR2_OFFSET)
# define STM32_ADC1_JDR3 (STM32_ADC1_BASE+STM32_ADC_JDR3_OFFSET)
# define STM32_ADC1_JDR4 (STM32_ADC1_BASE+STM32_ADC_JDR4_OFFSET)
# define STM32_ADC1_DR (STM32_ADC1_BASE+STM32_ADC_DR_OFFSET)
# define STM32_ADC1_SMPR0 (STM32_ADC1_BASE+STM32_ADC_SMPR0_OFFSET)
# define STM32_ADC1_SR (STM32_ADC1_BASE + STM32_ADC_SR_OFFSET)
# define STM32_ADC1_CR1 (STM32_ADC1_BASE + STM32_ADC_CR1_OFFSET)
# define STM32_ADC1_CR2 (STM32_ADC1_BASE + STM32_ADC_CR2_OFFSET)
# define STM32_ADC1_SMPR1 (STM32_ADC1_BASE + STM32_ADC_SMPR1_OFFSET)
# define STM32_ADC1_SMPR2 (STM32_ADC1_BASE + STM32_ADC_SMPR2_OFFSET)
# define STM32_ADC1_SMPR3 (STM32_ADC1_BASE + STM32_ADC_SMPR3_OFFSET)
# define STM32_ADC1_JOFR1 (STM32_ADC1_BASE + STM32_ADC_JOFR1_OFFSET)
# define STM32_ADC1_JOFR2 (STM32_ADC1_BASE + STM32_ADC_JOFR2_OFFSET)
# define STM32_ADC1_JOFR3 (STM32_ADC1_BASE + STM32_ADC_JOFR3_OFFSET)
# define STM32_ADC1_JOFR4 (STM32_ADC1_BASE + STM32_ADC_JOFR4_OFFSET)
# define STM32_ADC1_HTR (STM32_ADC1_BASE + STM32_ADC_HTR_OFFSET)
# define STM32_ADC1_LTR (STM32_ADC1_BASE + STM32_ADC_LTR_OFFSET)
# define STM32_ADC1_SQR1 (STM32_ADC1_BASE + STM32_ADC_SQR1_OFFSET)
# define STM32_ADC1_SQR2 (STM32_ADC1_BASE + STM32_ADC_SQR2_OFFSET)
# define STM32_ADC1_SQR3 (STM32_ADC1_BASE + STM32_ADC_SQR3_OFFSET)
# define STM32_ADC1_SQR4 (STM32_ADC1_BASE + STM32_ADC_SQR4_OFFSET)
# define STM32_ADC1_SQR5 (STM32_ADC1_BASE + STM32_ADC_SQR5_OFFSET)
# define STM32_ADC1_JSQR (STM32_ADC1_BASE + STM32_ADC_JSQR_OFFSET)
# define STM32_ADC1_JDR1 (STM32_ADC1_BASE + STM32_ADC_JDR1_OFFSET)
# define STM32_ADC1_JDR2 (STM32_ADC1_BASE + STM32_ADC_JDR2_OFFSET)
# define STM32_ADC1_JDR3 (STM32_ADC1_BASE + STM32_ADC_JDR3_OFFSET)
# define STM32_ADC1_JDR4 (STM32_ADC1_BASE + STM32_ADC_JDR4_OFFSET)
# define STM32_ADC1_DR (STM32_ADC1_BASE + STM32_ADC_DR_OFFSET)
# define STM32_ADC1_SMPR0 (STM32_ADC1_BASE + STM32_ADC_SMPR0_OFFSET)
#endif
#if STM32_NADC > 1
# define STM32_ADC2_SR (STM32_ADC2_BASE+STM32_ADC_SR_OFFSET)
# define STM32_ADC2_CR1 (STM32_ADC2_BASE+STM32_ADC_CR1_OFFSET)
# define STM32_ADC2_CR2 (STM32_ADC2_BASE+STM32_ADC_CR2_OFFSET)
# define STM32_ADC2_SMPR1 (STM32_ADC2_BASE+STM32_ADC_SMPR1_OFFSET)
# define STM32_ADC2_SMPR2 (STM32_ADC2_BASE+STM32_ADC_SMPR2_OFFSET)
# define STM32_ADC2_JOFR1 (STM32_ADC2_BASE+STM32_ADC_JOFR1_OFFSET)
# define STM32_ADC2_JOFR2 (STM32_ADC2_BASE+STM32_ADC_JOFR2_OFFSET)
# define STM32_ADC2_JOFR3 (STM32_ADC2_BASE+STM32_ADC_JOFR3_OFFSET)
# define STM32_ADC2_JOFR4 (STM32_ADC2_BASE+STM32_ADC_JOFR4_OFFSET)
# define STM32_ADC2_HTR (STM32_ADC2_BASE+STM32_ADC_HTR_OFFSET)
# define STM32_ADC2_LTR (STM32_ADC2_BASE+STM32_ADC_LTR_OFFSET)
# define STM32_ADC2_SQR1 (STM32_ADC2_BASE+STM32_ADC_SQR1_OFFSET)
# define STM32_ADC2_SQR2 (STM32_ADC2_BASE+STM32_ADC_SQR2_OFFSET)
# define STM32_ADC2_SQR3 (STM32_ADC2_BASE+STM32_ADC_SQR3_OFFSET)
# define STM32_ADC2_JSQR (STM32_ADC2_BASE+STM32_ADC_JSQR_OFFSET)
# define STM32_ADC2_JDR1 (STM32_ADC2_BASE+STM32_ADC_JDR1_OFFSET)
# define STM32_ADC2_JDR2 (STM32_ADC2_BASE+STM32_ADC_JDR2_OFFSET)
# define STM32_ADC2_JDR3 (STM32_ADC2_BASE+STM32_ADC_JDR3_OFFSET)
# define STM32_ADC2_JDR4 (STM32_ADC2_BASE+STM32_ADC_JDR4_OFFSET)
# define STM32_ADC2_DR (STM32_ADC2_BASE+STM32_ADC_DR_OFFSET)
# define STM32_ADC2_SR (STM32_ADC2_BASE + STM32_ADC_SR_OFFSET)
# define STM32_ADC2_CR1 (STM32_ADC2_BASE + STM32_ADC_CR1_OFFSET)
# define STM32_ADC2_CR2 (STM32_ADC2_BASE + STM32_ADC_CR2_OFFSET)
# define STM32_ADC2_SMPR1 (STM32_ADC2_BASE + STM32_ADC_SMPR1_OFFSET)
# define STM32_ADC2_SMPR2 (STM32_ADC2_BASE + STM32_ADC_SMPR2_OFFSET)
# define STM32_ADC2_JOFR1 (STM32_ADC2_BASE + STM32_ADC_JOFR1_OFFSET)
# define STM32_ADC2_JOFR2 (STM32_ADC2_BASE + STM32_ADC_JOFR2_OFFSET)
# define STM32_ADC2_JOFR3 (STM32_ADC2_BASE + STM32_ADC_JOFR3_OFFSET)
# define STM32_ADC2_JOFR4 (STM32_ADC2_BASE + STM32_ADC_JOFR4_OFFSET)
# define STM32_ADC2_HTR (STM32_ADC2_BASE + STM32_ADC_HTR_OFFSET)
# define STM32_ADC2_LTR (STM32_ADC2_BASE + STM32_ADC_LTR_OFFSET)
# define STM32_ADC2_SQR1 (STM32_ADC2_BASE + STM32_ADC_SQR1_OFFSET)
# define STM32_ADC2_SQR2 (STM32_ADC2_BASE + STM32_ADC_SQR2_OFFSET)
# define STM32_ADC2_SQR3 (STM32_ADC2_BASE + STM32_ADC_SQR3_OFFSET)
# define STM32_ADC2_JSQR (STM32_ADC2_BASE + STM32_ADC_JSQR_OFFSET)
# define STM32_ADC2_JDR1 (STM32_ADC2_BASE + STM32_ADC_JDR1_OFFSET)
# define STM32_ADC2_JDR2 (STM32_ADC2_BASE + STM32_ADC_JDR2_OFFSET)
# define STM32_ADC2_JDR3 (STM32_ADC2_BASE + STM32_ADC_JDR3_OFFSET)
# define STM32_ADC2_JDR4 (STM32_ADC2_BASE + STM32_ADC_JDR4_OFFSET)
# define STM32_ADC2_DR (STM32_ADC2_BASE + STM32_ADC_DR_OFFSET)
#endif
#if STM32_NADC > 2
# define STM32_ADC3_SR (STM32_ADC3_BASE+STM32_ADC_SR_OFFSET)
# define STM32_ADC3_CR1 (STM32_ADC3_BASE+STM32_ADC_CR1_OFFSET)
# define STM32_ADC3_CR2 (STM32_ADC3_BASE+STM32_ADC_CR2_OFFSET)
# define STM32_ADC3_SMPR1 (STM32_ADC3_BASE+STM32_ADC_SMPR1_OFFSET)
# define STM32_ADC3_SMPR2 (STM32_ADC3_BASE+STM32_ADC_SMPR2_OFFSET)
# define STM32_ADC3_JOFR1 (STM32_ADC3_BASE+STM32_ADC_JOFR1_OFFSET)
# define STM32_ADC3_JOFR2 (STM32_ADC3_BASE+STM32_ADC_JOFR2_OFFSET)
# define STM32_ADC3_JOFR3 (STM32_ADC3_BASE+STM32_ADC_JOFR3_OFFSET)
# define STM32_ADC3_JOFR4 (STM32_ADC3_BASE+STM32_ADC_JOFR4_OFFSET)
# define STM32_ADC3_HTR (STM32_ADC3_BASE+STM32_ADC_HTR_OFFSET)
# define STM32_ADC3_LTR (STM32_ADC3_BASE+STM32_ADC_LTR_OFFSET)
# define STM32_ADC3_SQR1 (STM32_ADC3_BASE+STM32_ADC_SQR1_OFFSET)
# define STM32_ADC3_SQR2 (STM32_ADC3_BASE+STM32_ADC_SQR2_OFFSET)
# define STM32_ADC3_SQR3 (STM32_ADC3_BASE+STM32_ADC_SQR3_OFFSET)
# define STM32_ADC3_JSQR (STM32_ADC3_BASE+STM32_ADC_JSQR_OFFSET)
# define STM32_ADC3_JDR1 (STM32_ADC3_BASE+STM32_ADC_JDR1_OFFSET)
# define STM32_ADC3_JDR2 (STM32_ADC3_BASE+STM32_ADC_JDR2_OFFSET)
# define STM32_ADC3_JDR3 (STM32_ADC3_BASE+STM32_ADC_JDR3_OFFSET)
# define STM32_ADC3_JDR4 (STM32_ADC3_BASE+STM32_ADC_JDR4_OFFSET)
# define STM32_ADC3_DR (STM32_ADC3_BASE+STM32_ADC_DR_OFFSET)
# define STM32_ADC3_SR (STM32_ADC3_BASE + STM32_ADC_SR_OFFSET)
# define STM32_ADC3_CR1 (STM32_ADC3_BASE + STM32_ADC_CR1_OFFSET)
# define STM32_ADC3_CR2 (STM32_ADC3_BASE + STM32_ADC_CR2_OFFSET)
# define STM32_ADC3_SMPR1 (STM32_ADC3_BASE + STM32_ADC_SMPR1_OFFSET)
# define STM32_ADC3_SMPR2 (STM32_ADC3_BASE + STM32_ADC_SMPR2_OFFSET)
# define STM32_ADC3_JOFR1 (STM32_ADC3_BASE + STM32_ADC_JOFR1_OFFSET)
# define STM32_ADC3_JOFR2 (STM32_ADC3_BASE + STM32_ADC_JOFR2_OFFSET)
# define STM32_ADC3_JOFR3 (STM32_ADC3_BASE + STM32_ADC_JOFR3_OFFSET)
# define STM32_ADC3_JOFR4 (STM32_ADC3_BASE + STM32_ADC_JOFR4_OFFSET)
# define STM32_ADC3_HTR (STM32_ADC3_BASE + STM32_ADC_HTR_OFFSET)
# define STM32_ADC3_LTR (STM32_ADC3_BASE + STM32_ADC_LTR_OFFSET)
# define STM32_ADC3_SQR1 (STM32_ADC3_BASE + STM32_ADC_SQR1_OFFSET)
# define STM32_ADC3_SQR2 (STM32_ADC3_BASE + STM32_ADC_SQR2_OFFSET)
# define STM32_ADC3_SQR3 (STM32_ADC3_BASE + STM32_ADC_SQR3_OFFSET)
# define STM32_ADC3_JSQR (STM32_ADC3_BASE + STM32_ADC_JSQR_OFFSET)
# define STM32_ADC3_JDR1 (STM32_ADC3_BASE + STM32_ADC_JDR1_OFFSET)
# define STM32_ADC3_JDR2 (STM32_ADC3_BASE + STM32_ADC_JDR2_OFFSET)
# define STM32_ADC3_JDR3 (STM32_ADC3_BASE + STM32_ADC_JDR3_OFFSET)
# define STM32_ADC3_JDR4 (STM32_ADC3_BASE + STM32_ADC_JDR4_OFFSET)
# define STM32_ADC3_DR (STM32_ADC3_BASE + STM32_ADC_DR_OFFSET)
#endif
#define STM32_ADC_CSR (STM32_ADCCMN_BASE+STM32_ADC_CSR_OFFSET)
#define STM32_ADC_CCR (STM32_ADCCMN_BASE+STM32_ADC_CCR_OFFSET)
#define STM32_ADC_CSR (STM32_ADCCMN_BASE + STM32_ADC_CSR_OFFSET)
#define STM32_ADC_CCR (STM32_ADCCMN_BASE + STM32_ADC_CCR_OFFSET)
/* Register Bitfield Definitions ********************************************************************/
@ -243,7 +243,7 @@
#define ADC_CR2_ADON (1 << 0) /* Bit 0: A/D Converter ON / OFF */
#define ADC_CR2_CONT (1 << 1) /* Bit 1: Continuous Conversion */
#define ADC_CR2_CFG (1 << 2) /* Bit 2 : ADC configuration. This bit must be modified only when no
* conversion is on going. This bit is available in high and medium+
* conversion is on going. This bit is available in high and medium +
* density devices only.
*/
#define ADC_CR2_DELS_SHIFT (4) /* Bits 2-0: Delay selection */

248
arch/arm/src/stm32/hardware/stm32_adc_v2.h
View File

@ -92,12 +92,12 @@
#define STM32_ADC4_OFFSET 0x0100
#define STM32_ADCCMN_OFFSET 0x0300
#define STM32_ADC1_BASE (STM32_ADC1_OFFSET+STM32_ADC12_BASE) /* ADC1 Master ADC */
#define STM32_ADC2_BASE (STM32_ADC2_OFFSET+STM32_ADC12_BASE) /* ADC2 Slave ADC */
#define STM32_ADC3_BASE (STM32_ADC3_OFFSET+STM32_ADC34_BASE) /* ADC3 Master ADC */
#define STM32_ADC4_BASE (STM32_ADC4_OFFSET+STM32_ADC34_BASE) /* ADC4 Slave ADC */
#define STM32_ADC12CMN_BASE (STM32_ADCCMN_OFFSET+STM32_ADC12_BASE) /* ADC1, ADC2 common */
#define STM32_ADC34CMN_BASE (STM32_ADCCMN_OFFSET+STM32_ADC34_BASE) /* ADC3, ADC4 common */
#define STM32_ADC1_BASE (STM32_ADC1_OFFSET + STM32_ADC12_BASE) /* ADC1 Master ADC */
#define STM32_ADC2_BASE (STM32_ADC2_OFFSET + STM32_ADC12_BASE) /* ADC2 Slave ADC */
#define STM32_ADC3_BASE (STM32_ADC3_OFFSET + STM32_ADC34_BASE) /* ADC3 Master ADC */
#define STM32_ADC4_BASE (STM32_ADC4_OFFSET + STM32_ADC34_BASE) /* ADC4 Slave ADC */
#define STM32_ADC12CMN_BASE (STM32_ADCCMN_OFFSET + STM32_ADC12_BASE) /* ADC1, ADC2 common */
#define STM32_ADC34CMN_BASE (STM32_ADCCMN_OFFSET + STM32_ADC34_BASE) /* ADC3, ADC4 common */
/* Register Offsets *********************************************************************************/
@ -141,147 +141,147 @@
/* Register Addresses *******************************************************************************/
#if STM32_NADC > 0
# define STM32_ADC1_ISR (STM32_ADC1_BASE+STM32_ADC_ISR_OFFSET)
# define STM32_ADC1_IER (STM32_ADC1_BASE+STM32_ADC_IER_OFFSET)
# define STM32_ADC1_CR (STM32_ADC1_BASE+STM32_ADC_CR_OFFSET)
# define STM32_ADC1_CFGR1 (STM32_ADC1_BASE+STM32_ADC_CFGR1_OFFSET)
# define STM32_ADC1_ISR (STM32_ADC1_BASE + STM32_ADC_ISR_OFFSET)
# define STM32_ADC1_IER (STM32_ADC1_BASE + STM32_ADC_IER_OFFSET)
# define STM32_ADC1_CR (STM32_ADC1_BASE + STM32_ADC_CR_OFFSET)
# define STM32_ADC1_CFGR1 (STM32_ADC1_BASE + STM32_ADC_CFGR1_OFFSET)
# ifdef HAVE_ADC_CFGR2
# define STM32_ADC1_CFGR2 (STM32_ADC1_BASE+STM32_ADC_CFGR2_OFFSET)
# define STM32_ADC1_CFGR2 (STM32_ADC1_BASE + STM32_ADC_CFGR2_OFFSET)
# endif
# define STM32_ADC1_SMPR1 (STM32_ADC1_BASE+STM32_ADC_SMPR1_OFFSET)
# define STM32_ADC1_SMPR2 (STM32_ADC1_BASE+STM32_ADC_SMPR2_OFFSET)
# define STM32_ADC1_TR1 (STM32_ADC1_BASE+STM32_ADC_TR1_OFFSET)
# define STM32_ADC1_TR2 (STM32_ADC1_BASE+STM32_ADC_TR2_OFFSET)
# define STM32_ADC1_TR3 (STM32_ADC1_BASE+STM32_ADC_TR3_OFFSET)
# define STM32_ADC1_SQR1 (STM32_ADC1_BASE+STM32_ADC_SQR1_OFFSET)
# define STM32_ADC1_SQR2 (STM32_ADC1_BASE+STM32_ADC_SQR2_OFFSET)
# define STM32_ADC1_SQR3 (STM32_ADC1_BASE+STM32_ADC_SQR3_OFFSET)
# define STM32_ADC1_SQR4 (STM32_ADC1_BASE+STM32_ADC_SQR4_OFFSET)
# define STM32_ADC1_DR (STM32_ADC1_BASE+STM32_ADC_DR_OFFSET)
# define STM32_ADC1_JSQR (STM32_ADC1_BASE+STM32_ADC_JSQR_OFFSET)
# define STM32_ADC1_OFR1 (STM32_ADC1_BASE+STM32_ADC_OFR1_OFFSET)
# define STM32_ADC1_OFR2 (STM32_ADC1_BASE+STM32_ADC_OFR2_OFFSET)
# define STM32_ADC1_OFR3 (STM32_ADC1_BASE+STM32_ADC_OFR3_OFFSET)
# define STM32_ADC1_OFR4 (STM32_ADC1_BASE+STM32_ADC_OFR4_OFFSET)
# define STM32_ADC1_JDR1 (STM32_ADC1_BASE+STM32_ADC_JDR1_OFFSET)
# define STM32_ADC1_JDR2 (STM32_ADC1_BASE+STM32_ADC_JDR2_OFFSET)
# define STM32_ADC1_JDR3 (STM32_ADC1_BASE+STM32_ADC_JDR3_OFFSET)
# define STM32_ADC1_JDR4 (STM32_ADC1_BASE+STM32_ADC_JDR4_OFFSET)
# define STM32_ADC1_AWD2CR (STM32_ADC1_BASE+STM32_ADC_AWD2CR_OFFSET)
# define STM32_ADC1_AWD3CR (STM32_ADC1_BASE+STM32_ADC_AWD3CR_OFFSET)
# define STM32_ADC1_DIFSEL (STM32_ADC1_BASE+STM32_ADC_DIFSEL_OFFSET)
# define STM32_ADC1_CALFACT (STM32_ADC1_BASE+STM32_ADC_CALFACT_OFFSET)
# define STM32_ADC1_SMPR1 (STM32_ADC1_BASE + STM32_ADC_SMPR1_OFFSET)
# define STM32_ADC1_SMPR2 (STM32_ADC1_BASE + STM32_ADC_SMPR2_OFFSET)
# define STM32_ADC1_TR1 (STM32_ADC1_BASE + STM32_ADC_TR1_OFFSET)
# define STM32_ADC1_TR2 (STM32_ADC1_BASE + STM32_ADC_TR2_OFFSET)
# define STM32_ADC1_TR3 (STM32_ADC1_BASE + STM32_ADC_TR3_OFFSET)
# define STM32_ADC1_SQR1 (STM32_ADC1_BASE + STM32_ADC_SQR1_OFFSET)
# define STM32_ADC1_SQR2 (STM32_ADC1_BASE + STM32_ADC_SQR2_OFFSET)
# define STM32_ADC1_SQR3 (STM32_ADC1_BASE + STM32_ADC_SQR3_OFFSET)
# define STM32_ADC1_SQR4 (STM32_ADC1_BASE + STM32_ADC_SQR4_OFFSET)
# define STM32_ADC1_DR (STM32_ADC1_BASE + STM32_ADC_DR_OFFSET)
# define STM32_ADC1_JSQR (STM32_ADC1_BASE + STM32_ADC_JSQR_OFFSET)
# define STM32_ADC1_OFR1 (STM32_ADC1_BASE + STM32_ADC_OFR1_OFFSET)
# define STM32_ADC1_OFR2 (STM32_ADC1_BASE + STM32_ADC_OFR2_OFFSET)
# define STM32_ADC1_OFR3 (STM32_ADC1_BASE + STM32_ADC_OFR3_OFFSET)
# define STM32_ADC1_OFR4 (STM32_ADC1_BASE + STM32_ADC_OFR4_OFFSET)
# define STM32_ADC1_JDR1 (STM32_ADC1_BASE + STM32_ADC_JDR1_OFFSET)
# define STM32_ADC1_JDR2 (STM32_ADC1_BASE + STM32_ADC_JDR2_OFFSET)
# define STM32_ADC1_JDR3 (STM32_ADC1_BASE + STM32_ADC_JDR3_OFFSET)
# define STM32_ADC1_JDR4 (STM32_ADC1_BASE + STM32_ADC_JDR4_OFFSET)
# define STM32_ADC1_AWD2CR (STM32_ADC1_BASE + STM32_ADC_AWD2CR_OFFSET)
# define STM32_ADC1_AWD3CR (STM32_ADC1_BASE + STM32_ADC_AWD3CR_OFFSET)
# define STM32_ADC1_DIFSEL (STM32_ADC1_BASE + STM32_ADC_DIFSEL_OFFSET)
# define STM32_ADC1_CALFACT (STM32_ADC1_BASE + STM32_ADC_CALFACT_OFFSET)
#endif
#if STM32_NADC > 1
# define STM32_ADC2_ISR (STM32_ADC2_BASE+STM32_ADC_ISR_OFFSET)
# define STM32_ADC2_IER (STM32_ADC2_BASE+STM32_ADC_IER_OFFSET)
# define STM32_ADC2_CR (STM32_ADC2_BASE+STM32_ADC_CR_OFFSET)
# define STM32_ADC2_CFGR1 (STM32_ADC2_BASE+STM32_ADC_CFGR1_OFFSET)
# define STM32_ADC2_ISR (STM32_ADC2_BASE + STM32_ADC_ISR_OFFSET)
# define STM32_ADC2_IER (STM32_ADC2_BASE + STM32_ADC_IER_OFFSET)
# define STM32_ADC2_CR (STM32_ADC2_BASE + STM32_ADC_CR_OFFSET)
# define STM32_ADC2_CFGR1 (STM32_ADC2_BASE + STM32_ADC_CFGR1_OFFSET)
# ifdef HAVE_ADC_CFGR2
# define STM32_ADC2_CFGR2 (STM32_ADC2_BASE+STM32_ADC_CFGR2_OFFSET)
# define STM32_ADC2_CFGR2 (STM32_ADC2_BASE + STM32_ADC_CFGR2_OFFSET)
# endif
# define STM32_ADC2_SMPR1 (STM32_ADC2_BASE+STM32_ADC_SMPR1_OFFSET)
# define STM32_ADC2_SMPR2 (STM32_ADC2_BASE+STM32_ADC_SMPR2_OFFSET)
# define STM32_ADC2_TR1 (STM32_ADC2_BASE+STM32_ADC_TR1_OFFSET)
# define STM32_ADC2_TR2 (STM32_ADC2_BASE+STM32_ADC_TR2_OFFSET)
# define STM32_ADC2_TR3 (STM32_ADC2_BASE+STM32_ADC_TR3_OFFSET)
# define STM32_ADC2_SQR1 (STM32_ADC2_BASE+STM32_ADC_SQR1_OFFSET)
# define STM32_ADC2_SQR2 (STM32_ADC2_BASE+STM32_ADC_SQR2_OFFSET)
# define STM32_ADC2_SQR3 (STM32_ADC2_BASE+STM32_ADC_SQR3_OFFSET)
# define STM32_ADC2_SQR4 (STM32_ADC2_BASE+STM32_ADC_SQR4_OFFSET)
# define STM32_ADC2_DR (STM32_ADC2_BASE+STM32_ADC_DR_OFFSET)
# define STM32_ADC2_JSQR (STM32_ADC2_BASE+STM32_ADC_JSQR_OFFSET)
# define STM32_ADC2_OFR1 (STM32_ADC2_BASE+STM32_ADC_OFR1_OFFSET)
# define STM32_ADC2_OFR2 (STM32_ADC2_BASE+STM32_ADC_OFR2_OFFSET)
# define STM32_ADC2_OFR3 (STM32_ADC2_BASE+STM32_ADC_OFR3_OFFSET)
# define STM32_ADC2_OFR4 (STM32_ADC2_BASE+STM32_ADC_OFR4_OFFSET)
# define STM32_ADC2_JDR1 (STM32_ADC2_BASE+STM32_ADC_JDR1_OFFSET)
# define STM32_ADC2_JDR2 (STM32_ADC2_BASE+STM32_ADC_JDR2_OFFSET)
# define STM32_ADC2_JDR3 (STM32_ADC2_BASE+STM32_ADC_JDR3_OFFSET)
# define STM32_ADC2_JDR4 (STM32_ADC2_BASE+STM32_ADC_JDR4_OFFSET)
# define STM32_ADC2_AWD2CR (STM32_ADC2_BASE+STM32_ADC_AWD2CR_OFFSET)
# define STM32_ADC2_AWD3CR (STM32_ADC2_BASE+STM32_ADC_AWD3CR_OFFSET)
# define STM32_ADC2_DIFSEL (STM32_ADC2_BASE+STM32_ADC_DIFSEL_OFFSET)
# define STM32_ADC2_CALFACT (STM32_ADC2_BASE+STM32_ADC_CALFACT_OFFSET)
# define STM32_ADC2_SMPR1 (STM32_ADC2_BASE + STM32_ADC_SMPR1_OFFSET)
# define STM32_ADC2_SMPR2 (STM32_ADC2_BASE + STM32_ADC_SMPR2_OFFSET)
# define STM32_ADC2_TR1 (STM32_ADC2_BASE + STM32_ADC_TR1_OFFSET)
# define STM32_ADC2_TR2 (STM32_ADC2_BASE + STM32_ADC_TR2_OFFSET)
# define STM32_ADC2_TR3 (STM32_ADC2_BASE + STM32_ADC_TR3_OFFSET)
# define STM32_ADC2_SQR1 (STM32_ADC2_BASE + STM32_ADC_SQR1_OFFSET)
# define STM32_ADC2_SQR2 (STM32_ADC2_BASE + STM32_ADC_SQR2_OFFSET)
# define STM32_ADC2_SQR3 (STM32_ADC2_BASE + STM32_ADC_SQR3_OFFSET)
# define STM32_ADC2_SQR4 (STM32_ADC2_BASE + STM32_ADC_SQR4_OFFSET)
# define STM32_ADC2_DR (STM32_ADC2_BASE + STM32_ADC_DR_OFFSET)
# define STM32_ADC2_JSQR (STM32_ADC2_BASE + STM32_ADC_JSQR_OFFSET)
# define STM32_ADC2_OFR1 (STM32_ADC2_BASE + STM32_ADC_OFR1_OFFSET)
# define STM32_ADC2_OFR2 (STM32_ADC2_BASE + STM32_ADC_OFR2_OFFSET)
# define STM32_ADC2_OFR3 (STM32_ADC2_BASE + STM32_ADC_OFR3_OFFSET)
# define STM32_ADC2_OFR4 (STM32_ADC2_BASE + STM32_ADC_OFR4_OFFSET)
# define STM32_ADC2_JDR1 (STM32_ADC2_BASE + STM32_ADC_JDR1_OFFSET)
# define STM32_ADC2_JDR2 (STM32_ADC2_BASE + STM32_ADC_JDR2_OFFSET)
# define STM32_ADC2_JDR3 (STM32_ADC2_BASE + STM32_ADC_JDR3_OFFSET)
# define STM32_ADC2_JDR4 (STM32_ADC2_BASE + STM32_ADC_JDR4_OFFSET)
# define STM32_ADC2_AWD2CR (STM32_ADC2_BASE + STM32_ADC_AWD2CR_OFFSET)
# define STM32_ADC2_AWD3CR (STM32_ADC2_BASE + STM32_ADC_AWD3CR_OFFSET)
# define STM32_ADC2_DIFSEL (STM32_ADC2_BASE + STM32_ADC_DIFSEL_OFFSET)
# define STM32_ADC2_CALFACT (STM32_ADC2_BASE + STM32_ADC_CALFACT_OFFSET)
#endif
#if STM32_NADC > 2
# define STM32_ADC3_ISR (STM32_ADC3_BASE+STM32_ADC_ISR_OFFSET)
# define STM32_ADC3_IER (STM32_ADC3_BASE+STM32_ADC_IER_OFFSET)
# define STM32_ADC3_CR (STM32_ADC3_BASE+STM32_ADC_CR_OFFSET)
# define STM32_ADC3_CFGR1 (STM32_ADC3_BASE+STM32_ADC_CFGR1_OFFSET)
# define STM32_ADC3_ISR (STM32_ADC3_BASE + STM32_ADC_ISR_OFFSET)
# define STM32_ADC3_IER (STM32_ADC3_BASE + STM32_ADC_IER_OFFSET)
# define STM32_ADC3_CR (STM32_ADC3_BASE + STM32_ADC_CR_OFFSET)
# define STM32_ADC3_CFGR1 (STM32_ADC3_BASE + STM32_ADC_CFGR1_OFFSET)
# ifdef HAVE_ADC_CFGR2
# define STM32_ADC3_CFGR2 (STM32_ADC3_BASE+STM32_ADC_CFGR2_OFFSET)
# define STM32_ADC3_CFGR2 (STM32_ADC3_BASE + STM32_ADC_CFGR2_OFFSET)
# endif
# define STM32_ADC3_SMPR1 (STM32_ADC3_BASE+STM32_ADC_SMPR1_OFFSET)
# define STM32_ADC3_SMPR2 (STM32_ADC3_BASE+STM32_ADC_SMPR2_OFFSET)
# define STM32_ADC3_TR1 (STM32_ADC3_BASE+STM32_ADC_TR1_OFFSET)
# define STM32_ADC3_TR2 (STM32_ADC3_BASE+STM32_ADC_TR2_OFFSET)
# define STM32_ADC3_TR3 (STM32_ADC3_BASE+STM32_ADC_TR3_OFFSET)
# define STM32_ADC3_SQR1 (STM32_ADC3_BASE+STM32_ADC_SQR1_OFFSET)
# define STM32_ADC3_SQR2 (STM32_ADC3_BASE+STM32_ADC_SQR2_OFFSET)
# define STM32_ADC3_SQR3 (STM32_ADC3_BASE+STM32_ADC_SQR3_OFFSET)
# define STM32_ADC3_SQR4 (STM32_ADC3_BASE+STM32_ADC_SQR4_OFFSET)
# define STM32_ADC3_DR (STM32_ADC3_BASE+STM32_ADC_DR_OFFSET)
# define STM32_ADC3_JSQR (STM32_ADC3_BASE+STM32_ADC_JSQR_OFFSET)
# define STM32_ADC3_OFR1 (STM32_ADC3_BASE+STM32_ADC_OFR1_OFFSET)
# define STM32_ADC3_OFR2 (STM32_ADC3_BASE+STM32_ADC_OFR2_OFFSET)
# define STM32_ADC3_OFR3 (STM32_ADC3_BASE+STM32_ADC_OFR3_OFFSET)
# define STM32_ADC3_OFR4 (STM32_ADC3_BASE+STM32_ADC_OFR4_OFFSET)
# define STM32_ADC3_JDR1 (STM32_ADC3_BASE+STM32_ADC_JDR1_OFFSET)
# define STM32_ADC3_JDR2 (STM32_ADC3_BASE+STM32_ADC_JDR2_OFFSET)
# define STM32_ADC3_JDR3 (STM32_ADC3_BASE+STM32_ADC_JDR3_OFFSET)
# define STM32_ADC3_JDR4 (STM32_ADC3_BASE+STM32_ADC_JDR4_OFFSET)
# define STM32_ADC3_AWD2CR (STM32_ADC3_BASE+STM32_ADC_AWD2CR_OFFSET)
# define STM32_ADC3_AWD3CR (STM32_ADC3_BASE+STM32_ADC_AWD3CR_OFFSET)
# define STM32_ADC3_DIFSEL (STM32_ADC3_BASE+STM32_ADC_DIFSEL_OFFSET)
# define STM32_ADC3_CALFACT (STM32_ADC3_BASE+STM32_ADC_CALFACT_OFFSET)
# define STM32_ADC3_SMPR1 (STM32_ADC3_BASE + STM32_ADC_SMPR1_OFFSET)
# define STM32_ADC3_SMPR2 (STM32_ADC3_BASE + STM32_ADC_SMPR2_OFFSET)
# define STM32_ADC3_TR1 (STM32_ADC3_BASE + STM32_ADC_TR1_OFFSET)
# define STM32_ADC3_TR2 (STM32_ADC3_BASE + STM32_ADC_TR2_OFFSET)
# define STM32_ADC3_TR3 (STM32_ADC3_BASE + STM32_ADC_TR3_OFFSET)
# define STM32_ADC3_SQR1 (STM32_ADC3_BASE + STM32_ADC_SQR1_OFFSET)
# define STM32_ADC3_SQR2 (STM32_ADC3_BASE + STM32_ADC_SQR2_OFFSET)
# define STM32_ADC3_SQR3 (STM32_ADC3_BASE + STM32_ADC_SQR3_OFFSET)
# define STM32_ADC3_SQR4 (STM32_ADC3_BASE + STM32_ADC_SQR4_OFFSET)
# define STM32_ADC3_DR (STM32_ADC3_BASE + STM32_ADC_DR_OFFSET)
# define STM32_ADC3_JSQR (STM32_ADC3_BASE + STM32_ADC_JSQR_OFFSET)
# define STM32_ADC3_OFR1 (STM32_ADC3_BASE + STM32_ADC_OFR1_OFFSET)
# define STM32_ADC3_OFR2 (STM32_ADC3_BASE + STM32_ADC_OFR2_OFFSET)
# define STM32_ADC3_OFR3 (STM32_ADC3_BASE + STM32_ADC_OFR3_OFFSET)
# define STM32_ADC3_OFR4 (STM32_ADC3_BASE + STM32_ADC_OFR4_OFFSET)
# define STM32_ADC3_JDR1 (STM32_ADC3_BASE + STM32_ADC_JDR1_OFFSET)
# define STM32_ADC3_JDR2 (STM32_ADC3_BASE + STM32_ADC_JDR2_OFFSET)
# define STM32_ADC3_JDR3 (STM32_ADC3_BASE + STM32_ADC_JDR3_OFFSET)
# define STM32_ADC3_JDR4 (STM32_ADC3_BASE + STM32_ADC_JDR4_OFFSET)
# define STM32_ADC3_AWD2CR (STM32_ADC3_BASE + STM32_ADC_AWD2CR_OFFSET)
# define STM32_ADC3_AWD3CR (STM32_ADC3_BASE + STM32_ADC_AWD3CR_OFFSET)
# define STM32_ADC3_DIFSEL (STM32_ADC3_BASE + STM32_ADC_DIFSEL_OFFSET)
# define STM32_ADC3_CALFACT (STM32_ADC3_BASE + STM32_ADC_CALFACT_OFFSET)
#endif
#if STM32_NADC > 3
# define STM32_ADC4_ISR (STM32_ADC4_BASE+STM32_ADC_ISR_OFFSET)
# define STM32_ADC4_IER (STM32_ADC4_BASE+STM32_ADC_IER_OFFSET)
# define STM32_ADC4_CR (STM32_ADC4_BASE+STM32_ADC_CR_OFFSET)
# define STM32_ADC4_CFGR1 (STM32_ADC4_BASE+STM32_ADC_CFGR1_OFFSET)
# define STM32_ADC4_ISR (STM32_ADC4_BASE + STM32_ADC_ISR_OFFSET)
# define STM32_ADC4_IER (STM32_ADC4_BASE + STM32_ADC_IER_OFFSET)
# define STM32_ADC4_CR (STM32_ADC4_BASE + STM32_ADC_CR_OFFSET)
# define STM32_ADC4_CFGR1 (STM32_ADC4_BASE + STM32_ADC_CFGR1_OFFSET)
# ifdef HAVE_ADC_CFGR2
# define STM32_ADC4_CFGR2 (STM32_ADC4_BASE+STM32_ADC_CFGR2_OFFSET)
# define STM32_ADC4_CFGR2 (STM32_ADC4_BASE + STM32_ADC_CFGR2_OFFSET)
# endif
# define STM32_ADC4_SMPR1 (STM32_ADC4_BASE+STM32_ADC_SMPR1_OFFSET)
# define STM32_ADC4_SMPR2 (STM32_ADC4_BASE+STM32_ADC_SMPR2_OFFSET)
# define STM32_ADC4_TR1 (STM32_ADC4_BASE+STM32_ADC_TR1_OFFSET)
# define STM32_ADC4_TR2 (STM32_ADC4_BASE+STM32_ADC_TR2_OFFSET)
# define STM32_ADC4_TR3 (STM32_ADC4_BASE+STM32_ADC_TR3_OFFSET)
# define STM32_ADC4_SQR1 (STM32_ADC4_BASE+STM32_ADC_SQR1_OFFSET)
# define STM32_ADC4_SQR2 (STM32_ADC4_BASE+STM32_ADC_SQR2_OFFSET)
# define STM32_ADC4_SQR3 (STM32_ADC4_BASE+STM32_ADC_SQR3_OFFSET)
# define STM32_ADC4_SQR4 (STM32_ADC4_BASE+STM32_ADC_SQR4_OFFSET)
# define STM32_ADC4_DR (STM32_ADC4_BASE+STM32_ADC_DR_OFFSET)
# define STM32_ADC4_JSQR (STM32_ADC4_BASE+STM32_ADC_JSQR_OFFSET)
# define STM32_ADC4_OFR1 (STM32_ADC4_BASE+STM32_ADC_OFR1_OFFSET)
# define STM32_ADC4_OFR2 (STM32_ADC4_BASE+STM32_ADC_OFR2_OFFSET)
# define STM32_ADC4_OFR3 (STM32_ADC4_BASE+STM32_ADC_OFR3_OFFSET)
# define STM32_ADC4_OFR4 (STM32_ADC4_BASE+STM32_ADC_OFR4_OFFSET)
# define STM32_ADC4_JDR1 (STM32_ADC4_BASE+STM32_ADC_JDR1_OFFSET)
# define STM32_ADC4_JDR2 (STM32_ADC4_BASE+STM32_ADC_JDR2_OFFSET)
# define STM32_ADC4_JDR3 (STM32_ADC4_BASE+STM32_ADC_JDR3_OFFSET)
# define STM32_ADC4_JDR4 (STM32_ADC4_BASE+STM32_ADC_JDR4_OFFSET)
# define STM32_ADC4_AWD2CR (STM32_ADC4_BASE+STM32_ADC_AWD2CR_OFFSET)
# define STM32_ADC4_AWD3CR (STM32_ADC4_BASE+STM32_ADC_AWD3CR_OFFSET)
# define STM32_ADC4_DIFSEL (STM32_ADC4_BASE+STM32_ADC_DIFSEL_OFFSET)
# define STM32_ADC4_CALFACT (STM32_ADC4_BASE+STM32_ADC_CALFACT_OFFSET)
# define STM32_ADC4_SMPR1 (STM32_ADC4_BASE + STM32_ADC_SMPR1_OFFSET)
# define STM32_ADC4_SMPR2 (STM32_ADC4_BASE + STM32_ADC_SMPR2_OFFSET)
# define STM32_ADC4_TR1 (STM32_ADC4_BASE + STM32_ADC_TR1_OFFSET)
# define STM32_ADC4_TR2 (STM32_ADC4_BASE + STM32_ADC_TR2_OFFSET)
# define STM32_ADC4_TR3 (STM32_ADC4_BASE + STM32_ADC_TR3_OFFSET)
# define STM32_ADC4_SQR1 (STM32_ADC4_BASE + STM32_ADC_SQR1_OFFSET)
# define STM32_ADC4_SQR2 (STM32_ADC4_BASE + STM32_ADC_SQR2_OFFSET)
# define STM32_ADC4_SQR3 (STM32_ADC4_BASE + STM32_ADC_SQR3_OFFSET)
# define STM32_ADC4_SQR4 (STM32_ADC4_BASE + STM32_ADC_SQR4_OFFSET)
# define STM32_ADC4_DR (STM32_ADC4_BASE + STM32_ADC_DR_OFFSET)
# define STM32_ADC4_JSQR (STM32_ADC4_BASE + STM32_ADC_JSQR_OFFSET)
# define STM32_ADC4_OFR1 (STM32_ADC4_BASE + STM32_ADC_OFR1_OFFSET)
# define STM32_ADC4_OFR2 (STM32_ADC4_BASE + STM32_ADC_OFR2_OFFSET)
# define STM32_ADC4_OFR3 (STM32_ADC4_BASE + STM32_ADC_OFR3_OFFSET)
# define STM32_ADC4_OFR4 (STM32_ADC4_BASE + STM32_ADC_OFR4_OFFSET)
# define STM32_ADC4_JDR1 (STM32_ADC4_BASE + STM32_ADC_JDR1_OFFSET)
# define STM32_ADC4_JDR2 (STM32_ADC4_BASE + STM32_ADC_JDR2_OFFSET)
# define STM32_ADC4_JDR3 (STM32_ADC4_BASE + STM32_ADC_JDR3_OFFSET)
# define STM32_ADC4_JDR4 (STM32_ADC4_BASE + STM32_ADC_JDR4_OFFSET)
# define STM32_ADC4_AWD2CR (STM32_ADC4_BASE + STM32_ADC_AWD2CR_OFFSET)
# define STM32_ADC4_AWD3CR (STM32_ADC4_BASE + STM32_ADC_AWD3CR_OFFSET)
# define STM32_ADC4_DIFSEL (STM32_ADC4_BASE + STM32_ADC_DIFSEL_OFFSET)
# define STM32_ADC4_CALFACT (STM32_ADC4_BASE + STM32_ADC_CALFACT_OFFSET)
#endif
#if STM32_NADC > 0
# define STM32_ADC12_CSR (STM32_ADC12CMN_BASE+STM32_ADC_CSR_OFFSET)
# define STM32_ADC12_CCR (STM32_ADC12CMN_BASE+STM32_ADC_CCR_OFFSET)
# define STM32_ADC12_CDR (STM32_ADC12CMN_BASE+STM32_ADC_CDR_OFFSET)
# define STM32_ADC12_CSR (STM32_ADC12CMN_BASE + STM32_ADC_CSR_OFFSET)
# define STM32_ADC12_CCR (STM32_ADC12CMN_BASE + STM32_ADC_CCR_OFFSET)
# define STM32_ADC12_CDR (STM32_ADC12CMN_BASE + STM32_ADC_CDR_OFFSET)
#endif
#if STM32_NADC > 2
# define STM32_ADC34_CSR (STM32_ADC34CMN_BASE+STM32_ADC_CSR_OFFSET)
# define STM32_ADC34_CCR (STM32_ADC34CMN_BASE+STM32_ADC_CCR_OFFSET)
# define STM32_ADC34_CDR (STM32_ADC34CMN_BASE+STM32_ADC_CDR_OFFSET)
# define STM32_ADC34_CSR (STM32_ADC34CMN_BASE + STM32_ADC_CSR_OFFSET)
# define STM32_ADC34_CCR (STM32_ADC34CMN_BASE + STM32_ADC_CCR_OFFSET)
# define STM32_ADC34_CDR (STM32_ADC34CMN_BASE + STM32_ADC_CDR_OFFSET)
#endif
/* Register Bitfield Definitions ********************************************************************/