Initial USB debug changes
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@2187 42af7a65-404d-4744-a932-0658087f49c3
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@ -145,6 +145,22 @@ static inline void rcc_enableapb1(void)
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{
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uint32 regval;
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#if CONFIG_STM32_USB
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/* USB clock divider. This bit must be valid before enabling the USB
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* clock in the RCC_APB1ENR register. This bit can’t be reset if the USB
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* clock is enabled.
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*/
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regval = getreg32(STM32_RCC_CFGR);
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regval &= ~RCC_CFGR_USBPRE;
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regval |= STM32_CFGR_USBPRE;
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putreg32(regval, STM32_RCC_CFGR);
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#endif
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/* Set the appropriate bits in the APB1ENR register to enabled the
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* selected APB1 peripherals.
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*/
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regval = getreg32(STM32_RCC_APB1ENR);
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#if CONFIG_STM32_TIM2
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/* Timer 2 clock enable */
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@ -266,21 +282,16 @@ static inline void rcc_enableapb1(void)
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regval |= RCC_APB1ENR_DACEN;
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#endif
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putreg32(regval, STM32_RCC_APB1ENR);
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#if CONFIG_STM32_USB
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/* USB clock divider */
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regval = getreg32(STM32_RCC_CFGR);
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regval &= ~RCC_CFGR_USBPRE;
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regval |= STM32_CFGR_USBPRE;
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putreg32(regval, STM32_RCC_CFGR);
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#endif
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}
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static inline void rcc_enableapb2(void)
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{
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uint32 regval;
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/* Set the appropriate bits in the APB2ENR register to enabled the
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* selected APB2 peripherals.
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*/
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/* Enable GPIOA, GPIOB, ... and AFIO clocks */
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regval = getreg32(STM32_RCC_APB2ENR);
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@ -153,6 +153,7 @@
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# define RCC_CFGR_PLLMUL_CLKx14 (12 << RCC_CFGR_PLLMUL_SHIFT) /* 1100: PLL input clock x 14 */
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# define RCC_CFGR_PLLMUL_CLKx15 (13 << RCC_CFGR_PLLMUL_SHIFT) /* 1101: PLL input clock x 15 */
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# define RCC_CFGR_PLLMUL_CLKx16 (14 << RCC_CFGR_PLLMUL_SHIFT) /* 111x: PLL input clock x 16 */
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#define RCC_CFGR_USBPRE (1 << 22) /* Bit 22: USB prescaler */
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#define RCC_CFGR_MCO_SHIFT (24) /* Bits 26-24: Microcontroller Clock Output */
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#define RCC_CFGR_MCO_MASK (7 << RCC_CFGR_MCO_SHIFT)
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# define RCC_CFGR_NOCLK (0 << RCC_CFGR_MCO_SHIFT) /* 0xx: No clock */
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@ -160,7 +161,6 @@
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# define RCC_CFGR_INTCLK (5 << RCC_CFGR_MCO_SHIFT) /* 101: Internal 8 MHz RC oscillator clock selected */
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# define RCC_CFGR_EXTCLK (6 << RCC_CFGR_MCO_SHIFT) /* 110: External 1-25 MHz oscillator clock selected */
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# define RCC_CFGR_PLLCLKd2 (7 << RCC_CFGR_MCO_SHIFT) /* 111: PLL clock divided by 2 selected */
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#define RCC_CFGR_USBPRE (1 << 22) /* Bit 22: USB prescaler */
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/* Clock interrupt register */
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@ -335,9 +335,11 @@ struct stm32_usbdev_s
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#if defined(CONFIG_STM32_USBDEV_REGDEBUG) && defined(CONFIG_DEBUG)
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static uint16 stm32_getreg(uint32 addr);
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static void stm32_putreg(uint16 val, uint32 addr);
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static void stm32_checksetup(void);
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#else
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# define stm32_getreg(addr) getreg16(addr)
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# define stm32_putreg(val,addr) putreg16(val,addr)
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# define stm32_checksetup()
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#endif
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/* Low-Level Helpers ********************************************************/
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@ -566,6 +568,27 @@ static void stm32_putreg(uint16 val, uint32 addr)
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}
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#endif
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/****************************************************************************
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* Name: stm32_checksetup
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****************************************************************************/
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#if defined(CONFIG_STM32_USBDEV_REGDEBUG) && defined(CONFIG_DEBUG)
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static void stm32_checksetup(void)
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{
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uint32 cfgr = getreg32(STM32_RCC_CFGR);
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uint32 apb1rstr = getreg32(STM32_RCC_APB1RSTR);
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uint32 apb1enr = getreg32(STM32_RCC_APB1ENR);
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lldbg("CFGR: %08x APB1RSTR: %08x APB1ENR: %08x\n", cfgr, apb1rstr, apb1enr);
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if ((apb1rstr & RCC_APB1RSTR_USBRST) != 0 ||
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(apb1enr & RCC_APB1ENR_USBEN) == 0)
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{
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lldbg("ERROR: USB is NOT setup correctly\n");
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}
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}
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#endif
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/****************************************************************************
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* Low-Level Helpers
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****************************************************************************/
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@ -1106,7 +1129,7 @@ static int stm32_wrrequest(struct stm32_usbdev_s *priv, struct stm32_ep_s *prive
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bytesleft = privreq->req.len - privreq->req.xfrd;
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nbytes = bytesleft;
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#warning REVISIT... If the EP supports double buffering, then we can do better
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#warning "REVISIT: If the EP supports double buffering, then we can do better"
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/* Send the next packet */
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@ -2440,6 +2463,7 @@ static int stm32_epconfigure(struct usbdev_ep_s *ep,
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break;
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case USB_EP_ATTR_XFER_ISOC: /* Isochronous endpoint */
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#warning "REVISIT: Need to review isochronous EP setup"
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setting = USB_EPR_EPTYPE_ISOC;
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break;
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@ -2456,7 +2480,7 @@ static int stm32_epconfigure(struct usbdev_ep_s *ep,
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/* Get the address of the PMA buffer allocated for this endpoint */
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#warning "Should configure BULK EPs using double buffer feature"
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#warning "REVISIT: Should configure BULK EPs using double buffer feature"
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pma = STM32_BUFNO2BUF(privep->bufno);
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/* Get the maxpacket size of the endpoint. */
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@ -2877,7 +2901,7 @@ static struct usbdev_ep_s *stm32_allocep(struct usbdev_s *dev, ubyte epno,
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/* Allocate a PMA buffer for this endpoint */
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#warning "Should configure BULK EPs using double buffer feature"
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#warning "REVISIT: Should configure BULK EPs using double buffer feature"
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bufno = stm32_allocpma(priv);
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if (bufno < 0)
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{
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@ -3134,6 +3158,7 @@ void up_usbinitialize(void)
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int epno;
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usbtrace(TRACE_DEVINIT, 0);
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stm32_checksetup();
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/* Disable the USB controller, disable all USB interrupts */
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