sergiotarxz/nuttx
1
0
Fork 0
Code Issues Pull Requests Releases Wiki Activity

lpc313x uart driver code complete

Browse Source 
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@2446 42af7a65-404d-4744-a932-0658087f49c3
This commit is contained in:
patacongo 2009-12-28 22:07:44 +00:00
parent 05ed0f8871
commit 1ab15947b3
5 changed files with 381 additions and 67 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1
arch/arm/src/arm/up_head.S
View File

@ -40,6 +40,7 @@
#include <nuttx/config.h>
#include "arm.h"
#include "chip.h"
#include "up_internal.h"
#include "up_arch.h"

3
arch/arm/src/lpc313x/Make.defs
View File

@ -50,4 +50,5 @@ CGU_CSRCS = lpc313x_clkdomain.c lpc313x_clkfreq.c lpc313x_esrndx.c \
lpc313x_fdcndx.c lpc313x_softreset.c
CHIP_ASRCS = $(CGU_ASRCS)
CHIP_CSRCS = lpc313x_allocateheap.c lpc313x_irq.c lpc313x_timerisr.c $(CGU_CSRCS)
CHIP_CSRCS = lpc313x_allocateheap.c lpc313x_irq.c lpc313x_lowputc.c \
lpc313x_serial.c lpc313x_timerisr.c $(CGU_CSRCS)

325
arch/arm/src/lpc313x/lpc313x_lowputc.c Executable file
View File

@ -0,0 +1,325 @@
/****************************************************************************
* arch/arm/src/lpc313x/lpc313x_lowputc.c
*
* Copyright (C) 2009 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <sys/types.h>
#include <stdint.h>
#include <debug.h>
#include <nuttx/arch.h>
#include "up_arch.h"
#include "up_internal.h"
#include "lpc313x_cgudrvr.h"
#include "lpc313x_uart.h"
/****************************************************************************
* Definitions
****************************************************************************/
/****************************************************************************
* Private Types
****************************************************************************/
/****************************************************************************
* Private Variables
****************************************************************************/
/****************************************************************************
* Private Functions
****************************************************************************/
/****************************************************************************
* Name: up_waittxready
****************************************************************************/
static inline void up_waittxready(void)
{
int tmp;
/* Limit how long we will wait for the TX available condition */
for (tmp = 1000 ; tmp > 0 ; tmp--)
{
/* Check if the tranmitter holding register (THR) is empty */
if ((getreg32(LPC313X_UART_LSR) & UART_LSR_THRE) != 0)
{
/* The THR is empty, return */
break;
}
}
}
/****************************************************************************
* Name: up_configbaud
****************************************************************************/
#ifndef CONFIG_USE_EARLYSERIALINIT
static inline void up_configbaud(void)
{
/* In a buckled-up, embedded system, there is no reason to constantly
* calculate the following. The calculation can be skipped if the
* MULVAL, DIVADDVAL, and DIVISOR values are provided in the configuration
* file.
*/
#ifndef CONFIG_LPC313X_UART_MULVAL
uint32_t qtrclk;
uint32_t regval;
/* Test values calculated for every multiplier/divisor combination */
uint32_t tdiv;
uint32_t terr;
int tmulval;
int tdivaddval;
/* Optimal multiplier/divider values */
uint32_t div = 0;
uint32_t err = 100000;
int mulval = 1;
int divaddval = 0;
/* Baud is generated using FDR and DLL-DLM registers
*
* baud = clock * (mulval/(mulval+divaddval) / (16 * div)
*
* Or
*
* div = (clock/16) * (mulval/(mulval+divaddval) / baud
*
* Where mulval = Fractional divider multiplier
* divaddval = Fractional divider pre-scale div
* div = DLL-DLM divisor
*/
/* Get UART block clock divided by 16 */
qtrclk = lpc313x_clkfreq(CLKID_UARTUCLK, DOMAINID_UART) >> 4;
/* Try every valid multiplier, tmulval (or until a perfect
* match is found).
*/
for (tmulval = 1 ; tmulval <= 15 && err > 0; tmulval++)
{
/* Try every valid pre-scale div, tdivaddval (or until a perfect
* match is found).
*/
for (tdivaddval = 0 ; tdivaddval <= 15 && err > 0; tdivaddval++)
{
/* Calculate the divisor with these fractional divider settings */
uint32_t tmp = (tmulval * qtrclk) / ((tmulval + tdivaddval));
tdiv = (tmp + (CONFIG_UART_BAUD>>1)) / CONFIG_UART_BAUD;
/* Check if this candidate divisor is within a valid range */
if (tdiv > 2 && tdiv < 0x10000)
{
/* Calculate the actual baud and the error */
uint32_t actualbaud = tmp / tdiv;
if (actualbaud <= CONFIG_UART_BAUD)
{
terr = CONFIG_UART_BAUD - actualbaud;
}
else
{
terr = actualbaud - CONFIG_UART_BAUD;
}
/* Is this the smallest error we have encountered? */
if (terr < err)
{
/* Yes, save these settings as the new, candidate optimal settings */
mulval = tmulval ;
divaddval = tdivaddval;
div = tdiv;
err = terr;
}
}
}
}
/* Set the Divisor Latch Access Bit (DLAB) to enable DLL/DLM access */
regval = getreg32(LPC313X_UART_LCR);
regval |= UART_LCR_DLAB;
putreg32(regval, LPC313X_UART_LCR);
/* Configure the MS and LS DLAB registers */
putreg32(div & UART_DLL_MASK, LPC313X_UART_DLL);
putreg32((div >> 8) & UART_DLL_MASK, LPC313X_UART_DLM);
regval &= ~UART_LCR_DLAB;
putreg32(regval, LPC313X_UART_LCR);
/* Configure the Fractional Divider Register (FDR) */
putreg32((mulval << UART_FDR_MULVAL_SHIFT) |
(divaddval << UART_FDR_DIVADDVAL_SHIFT),
LPC313X_UART_FDR);
#else
/* Set the Divisor Latch Access Bit (DLAB) to enable DLL/DLM access */
regval = getreg32(LPC313X_UART_LCR);
regval |= UART_LCR_DLAB;
putreg32(regval, LPC313X_UART_LCR);
/* Configure the MS and LS DLAB registers */
putreg32(CONFIG_LPC313X_UART_DIVISOR & UART_DLL_MASK, LPC313X_UART_DLL);
putreg32((CONFIG_LPC313X_UART_DIVISOR >> 8) & UART_DLL_MASK, LPC313X_UART_DLM);
regval &= ~UART_LCR_DLAB;
putreg32(regval, LPC313X_UART_LCR);
/* Configure the Fractional Divider Register (FDR) */
putreg32((CONFIG_LPC313X_UART_MULVAL << UART_FDR_MULVAL_SHIFT) |
(CONFIG_LPC313X_UART_DIVADDVAL << UART_FDR_DIVADDVAL_SHIFT),
LPC313X_UART_FDR);
#endif
}
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: up_lowsetup
*
* Description:
* Configure the UART baud, bits, parity, fifos, etc. This method is called
* the first time that the serial port is opened.
*
****************************************************************************/
void up_lowsetup(void)
{
#ifndef CONFIG_SUPPRESS_LPC313X_UART_CONFIG
uint32_t regval;
/* Enable UART system clock */
lpc313x_enableclock(CLKID_UARTAPBCLK);
lpc313x_enableclock(CLKID_UARTUCLK);
/* Clear fifos */
putreg32((UART_FCR_RXFIFORST|UART_FCR_TXFIFORST), LPC313X_UART_FCR);
/* Set trigger */
putreg32((UART_FCR_FIFOENABLE|UART_FCR_RXTRIGLEVEL_16), LPC313X_UART_FCR);
/* Set up the LCR */
regval = 0;
#if CONFIG_UART_BITS == 5
regval |= UART_LCR_WDLENSEL_5BITS;
#elif CONFIG_UART_BITS == 6
regval |= UART_LCR_WDLENSEL_6BITS;
#elif CONFIG_UART_BITS == 7
regval |= UART_LCR_WDLENSEL_7BITS;
#else
regval |= UART_LCR_WDLENSEL_8BITS;
#endif
#if CONFIG_UART_2STOP > 0
regval |= UART_LCR_NSTOPBITS;
#endif
#if CONFIG_UART_PARITY == 1
regval |= UART_LCR_PAREN;
#elif CONFIG_UART_PARITY == 2
regval |= (UART_LCR_PAREVEN|UART_LCR_PAREN);
#endif
putreg32(regval, LPC313X_UART_LCR);
/* Set the BAUD divisor */
up_configbaud();
/* Configure the FIFOs */
putreg32((UART_FCR_RXTRIGLEVEL_16|UART_FCR_TXFIFORST|
UART_FCR_RXFIFORST|UART_FCR_FIFOENABLE),
LPC313X_UART_FCR);
/* The NuttX serial driver waits for the first THRE interrrupt before
* sending serial data... However, it appears that the lpc313x hardware
* does not generate that interrupt until a transition from not-empty
* to empty. So, the current kludge here is to send one NULL at
* startup to kick things off.
*/
putreg32('\0', LPC313X_UART_THR);
#endif
}
#endif
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: up_lowputc
*
* Description:
* Provide priority, low-level access to support OS debug writes
*
****************************************************************************/
void up_lowputc(char ch)
{
up_waittxready();
putreg32((uint32_t)ch, LPC313X_UART_THR);
}

1
arch/arm/src/lpc313x/lpc313x_memorymap.h
View File

@ -142,6 +142,7 @@
*/
/* For now, just to get through the compilation */
#define NUTTX_START_VADDR 0x00000000
/************************************************************************************

110
arch/arm/src/lpc313x/lpc313x_serial.c
View File

@ -57,7 +57,7 @@
#include "os_internal.h"
#include "up_internal.h"
#include "lpc313x_cgudriver.h"
#include "lpc313x_cgudrvr.h"
#include "lpc313x_uart.h"
#ifdef CONFIG_USE_SERIALDRIVER
@ -79,6 +79,12 @@ struct up_dev_s
* Private Function Prototypes
****************************************************************************/
static inline void up_disableuartint(struct up_dev_s *priv, uint8_t *ier);
static inline void up_restoreuartint(struct up_dev_s *priv, uint8_t ier);
static inline void up_enablebreaks(void);
static inline void up_disablebreaks(void);
static inline void up_configbaud(void);
static int up_setup(struct uart_dev_s *dev);
static void up_shutdown(struct uart_dev_s *dev);
static int up_attach(struct uart_dev_s *dev);
@ -166,44 +172,25 @@ static inline void up_restoreuartint(struct up_dev_s *priv, uint8_t ier)
putreg32((uint32_t)priv->ier, LPC313X_UART_IER);
}
/****************************************************************************
* Name: up_waittxready
****************************************************************************/
static inline void up_waittxready(struct up_dev_s *priv)
{
int tmp;
/* Limit how long we will wait for the TX available condition */
for (tmp = 1000 ; tmp > 0 ; tmp--)
{
/* Check if the tranmitter holding register (THR) is empty */
if ((getreg32(LPC313X_UART_LSR) & UART_LSR_THRE) != 0)
{
/* The THR is empty, return */
break;
}
}
}
/****************************************************************************
* Name: up_enablebreaks
****************************************************************************/
static inline void up_enablebreaks(struct up_dev_s *priv, bool enable)
{
uint32_t_t lcr = getreg32(LPC313X_UART_LCR);
if (enable)
static inline void up_enablebreaks(void)
{
uint32_t lcr = getreg32(LPC313X_UART_LCR);
lcr |= UART_LCR_BRKCTRL;
putreg32(lcr, LPC313X_UART_LCR);
}
else
/****************************************************************************
* Name: up_disablebreaks
****************************************************************************/
static inline void up_disablebreaks(void)
{
uint32_t lcr = getreg32(LPC313X_UART_LCR);
lcr &= ~UART_LCR_BRKCTRL;
}
putreg32(lcr, LPC313X_UART_LCR);
}
@ -305,43 +292,43 @@ static inline void up_configbaud(void)
/* Set the Divisor Latch Access Bit (DLAB) to enable DLL/DLM access */
regval = getreg32(LPV313X_UART_LCR);
regval |= UART_LCR_DLAB
putreg32(regval, LPV313X_UART_LCR);
regval = getreg32(LPC313X_UART_LCR);
regval |= UART_LCR_DLAB;
putreg32(regval, LPC313X_UART_LCR);
/* Configure the MS and LS DLAB registers */
putreg32(div & UART_DLL_MASK, LPC313X_UART_DLL);
putreg32((div >> 8) & UART_DLL_MASK, LPC313X_UART_DLM);\
putreg32((div >> 8) & UART_DLL_MASK, LPC313X_UART_DLM);
regval &~= UART_LCR_DLAB
putreg32(regval, LPV313X_UART_LCR);
regval &= ~UART_LCR_DLAB;
putreg32(regval, LPC313X_UART_LCR);
/* Configure the Fractional Divider Register (FDR) */
putreg32((mulval << UART_FDR_MULVAL_SHIFT) |
(divaddval << UART_FDR_DIVADDVAL_SHIFT),
LPC313X_UART_FRD);
LPC313X_UART_FDR);
#else
/* Set the Divisor Latch Access Bit (DLAB) to enable DLL/DLM access */
regval = getreg32(LPV313X_UART_LCR);
regval |= UART_LCR_DLAB
putreg32(regval, LPV313X_UART_LCR);
regval = getreg32(LPC313X_UART_LCR);
regval |= UART_LCR_DLAB;
putreg32(regval, LPC313X_UART_LCR);
/* Configure the MS and LS DLAB registers */
putreg32(CONFIG_LPC313X_UART_DIVISOR & UART_DLL_MASK, LPC313X_UART_DLL);
putreg32((CONFIG_LPC313X_UART_DIVISOR >> 8) & UART_DLL_MASK, LPC313X_UART_DLM);\
putreg32((CONFIG_LPC313X_UART_DIVISOR >> 8) & UART_DLL_MASK, LPC313X_UART_DLM);
regval &~= UART_LCR_DLAB
putreg32(regval, LPV313X_UART_LCR);
regval &= ~UART_LCR_DLAB;
putreg32(regval, LPC313X_UART_LCR);
/* Configure the Fractional Divider Register (FDR) */
putreg32((CONFIG_LPC313X_UART_MULVAL << UART_FDR_MULVAL_SHIFT) |
(CONFIG_LPC313X_UART_DIVADDVAL << UART_FDR_DIVADDVAL_SHIFT),
LPC313X_UART_FRD);
LPC313X_UART_FDR);
#endif
}
@ -392,10 +379,10 @@ static int up_setup(struct uart_dev_s *dev)
#if CONFIG_UART_PARITY == 1
regval |= UART_LCR_PAREN;
#elif CONFIG_UART_PARITY == 2)
#elif CONFIG_UART_PARITY == 2
regval |= (UART_LCR_PAREVEN|UART_LCR_PAREN);
#endif
putreg32(regval, LPV313X_UART_LCR);
putreg32(regval, LPC313X_UART_LCR);
/* Set the BAUD divisor */
@ -403,7 +390,7 @@ static int up_setup(struct uart_dev_s *dev)
/* Configure the FIFOs */
putreg32((UART_FCR_RXTRIGLEVEL_16|UART_FCR_TXFIFORST|\
putreg32((UART_FCR_RXTRIGLEVEL_16|UART_FCR_TXFIFORST|
UART_FCR_RXFIFORST|UART_FCR_FIFOENABLE),
LPC313X_UART_FCR);
@ -496,7 +483,6 @@ static void up_detach(struct uart_dev_s *dev)
static int up_interrupt(int irq, void *context)
{
struct uart_dev_s *dev = &g_uartport;
struct up_dev_s *priv = &g_uartpriv;
uint8_t status;
int passes;
@ -592,7 +578,6 @@ static int up_ioctl(struct file *filep, int cmd, unsigned long arg)
{
struct inode *inode = filep->f_inode;
struct uart_dev_s *dev = inode->i_private;
struct up_dev_s *priv = (struct up_dev_s*)dev->priv;
int ret = OK;
switch (cmd)
@ -614,7 +599,7 @@ static int up_ioctl(struct file *filep, int cmd, unsigned long arg)
case TIOCSBRK: /* BSD compatibility: Turn break on, unconditionally */
{
irqstate_t flags = irqsave();
up_enablebreaks(priv, true);
up_enablebreaks();
irqrestore(flags);
}
break;
@ -623,7 +608,7 @@ static int up_ioctl(struct file *filep, int cmd, unsigned long arg)
{
irqstate_t flags;
flags = irqsave();
up_enablebreaks(priv, false);
up_disablebreaks();
irqrestore(flags);
}
break;
@ -690,7 +675,6 @@ static void up_rxint(struct uart_dev_s *dev, bool enable)
static bool up_rxavailable(struct uart_dev_s *dev)
{
struct up_dev_s *priv = (struct up_dev_s*)dev->priv;
return ((getreg32(LPC313X_UART_LSR) & UART_LSR_RDR) != 0);
}
@ -704,7 +688,6 @@ static bool up_rxavailable(struct uart_dev_s *dev)
static void up_send(struct uart_dev_s *dev, int ch)
{
struct up_dev_s *priv = (struct up_dev_s*)dev->priv;
putreg32((uint32_t)ch, LPC313X_UART_THR);
}
@ -742,7 +725,6 @@ static void up_txint(struct uart_dev_s *dev, bool enable)
static bool up_txready(struct uart_dev_s *dev)
{
struct up_dev_s *priv = (struct up_dev_s*)dev->priv;
return ((getreg32(LPC313X_UART_LSR) & UART_LSR_THRE) != 0);
}
@ -756,12 +738,11 @@ static bool up_txready(struct uart_dev_s *dev)
static bool up_txempty(struct uart_dev_s *dev)
{
struct up_dev_s *priv = (struct up_dev_s*)dev->priv;
return ((getreg32(LPC313X_UART_LSR) & UART_LSR_TEMT) != 0);
}
/****************************************************************************
* Public Funtions
* Public Functions
****************************************************************************/
/****************************************************************************
@ -820,12 +801,14 @@ void up_serialinit(void)
int up_putc(int ch)
{
struct up_dev_s *priv = g_uartpriv;
struct up_dev_s *priv = &g_uartpriv;
uint8_t ier;
/* Keep UART interrupts disabled so that we do not interfere with the
* serial driver.
*/
up_disableuartint(priv, &ier);
up_waittxready(priv);
putreg32((uint32_t)ch, LPC313X_UART_THR);
/* Check for LF */
@ -833,11 +816,12 @@ int up_putc(int ch)
{
/* Add CR */
up_waittxready(priv);
putreg32('\r', LPC313X_UART_THR);
up_lowputc('\r');
}
up_waittxready(priv);
/* Output the character */
up_lowputc(ch);
up_restoreuartint(priv, ier);
return ch;
}
@ -863,6 +847,8 @@ int up_putc(int ch)
up_lowputc('\r');
}
/* Output the character */
up_lowputc(ch);
return ch;
}