SAM4E GPIO: Fix some compile errors when CONFIG_DEBUG_GPIO is enabled
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@ -7338,3 +7338,6 @@
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* arch/arm/src/stm32/stm32_i2c_alt.c: Add an alternative I2C implementation
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for the STM32 F03 that works around errata in that part. From Patrizio
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Simona (2014-5-14).
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* arch/arm/src/sam34/sam_gpio.c: Fix some SAM4E compiler errors when
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CONFIG_DEBUG_GPIO is enabled (2014-5-15).
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@ -376,9 +376,9 @@ static inline int sam_configperiph(uintptr_t base, uint32_t pin,
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int sam_configgpio(gpio_pinset_t cfgset)
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{
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uintptr_t base = sam_gpiobase(cfgset);
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uint32_t pin = sam_gpiopin(cfgset);
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uint32_t pin = sam_gpiopin(cfgset);
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irqstate_t flags;
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int ret;
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int ret;
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/* Disable interrupts to prohibit re-entrance. */
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@ -484,12 +484,10 @@ int sam_dumpgpio(uint32_t pinset, const char *msg)
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{
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irqstate_t flags;
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uintptr_t base;
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unsigned int pin;
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unsigned int port;
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/* Get the base address associated with the PIO port */
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pin = sam_gpiopin(pinset);
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port = (pinset & GPIO_PORT_MASK) >> GPIO_PORT_SHIFT;
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base = SAM_PION_BASE(port);
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@ -511,7 +509,7 @@ int sam_dumpgpio(uint32_t pinset, const char *msg)
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#elif defined(CONFIG_ARCH_CHIP_SAM4S) || defined(CONFIG_ARCH_CHIP_SAM4E)
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lldbg(" ABCDSR: %08x %08x IFSCSR: %08x PPDSR: %08x\n",
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getreg32(base + SAM_PIO_ABCDSR1_OFFSET), getreg32(base + SAM_PIO_ABCDSR2_OFFSET),
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getreg32(base + SAM_PIO_IFSCSR_OFFSET), getreg32(base + SAM_PIOC_PPDSR));
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getreg32(base + SAM_PIO_IFSCSR_OFFSET), getreg32(base + SAM_PIO_PPDSR_OFFSET));
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#endif
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lldbg(" PUSR: %08x SCDR: %08x OWSR: %08x AIMMR: %08x\n",
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getreg32(base + SAM_PIO_PUSR_OFFSET), getreg32(base + SAM_PIO_SCDR_OFFSET),
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@ -528,7 +526,7 @@ int sam_dumpgpio(uint32_t pinset, const char *msg)
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getreg32(base + SAM_PIO_PCISR_OFFSET), getreg32(base + SAM_PIO_PCRHR_OFFSET));
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#ifdef CONFIG_ARCH_CHIP_SAM4E
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lldbg("SCHMITT: %08x DELAYR:%08x\n",
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getreg32(base + SAM_PIO_SCHMITT_OFFSET), getreg32(base + SAM_PIO_DELAY_OFFSET));
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getreg32(base + SAM_PIO_SCHMITT_OFFSET), getreg32(base + SAM_PIO_DELAYR_OFFSET));
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#else
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lldbg("SCHMITT: %08x\n",
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getreg32(base + SAM_PIO_SCHMITT_OFFSET));
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@ -1440,7 +1440,12 @@ Configurations
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only discusses PDC-based HSMCI DMA (although there is
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a DMA channel interface definition for HSMCI). So
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this is effort is dead-in-the-water for now.
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2014-05-15: The HSCMCI driver has been recently updated to support
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PCD DMA. That modified driver, however, has not yet
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been tested with the SAM4E-EK
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2014-05-14: The touchscreen interface was successfully verified.
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2014-05-14: The LCD interface is fully implemented. However,
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there is still a bug in in the LCD communications. The
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LCD ID is read as 0x0000 instead of 0x9325.
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