Update README
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@ -20,106 +20,109 @@ Status
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======
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2016-02-28: The i.MX6Q port is just beginning. A few files have been
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populated with the port is a long way from being complete or even ready to
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begin any kind of testing.
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populated with the port is a long way from being complete or even ready to
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begin any kind of testing.
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2016-03-12: The i.MX6Q port is code complete including initial
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implementation of logic needed for CONFIG_SMP=y . There is no clock
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configuration logic. This is probably not an issue if we are loaded into
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SDRAM by a bootloader (because we cannot change the clocking anyway in
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that case).
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implementation of logic needed for CONFIG_SMP=y . There is no clock
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configuration logic. This is probably not an issue if we are loaded into
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SDRAM by a bootloader (because we cannot change the clocking anyway in
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that case).
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There is a lot of testing that could be done but, unfortunately, I still
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have no i.MX6 hardware to test on.
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There is a lot of testing that could be done but, unfortunately, I still
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have no i.MX6 hardware to test on.
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In additional to the unexpected issues, I do expect to run into some
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cache coherency issues when I get to testing an SMP configuration.
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In additional to the unexpected issues, I do expect to run into some
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cache coherency issues when I get to testing an SMP configuration.
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2016-03-28: I now have a used MCIMX6Q-SDB which is similar to the target
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configuration described below except that it does not have the 10.1" LVDS
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display. Next step: Figure out how to run a copy of NuttX using U-Boot.
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configuration described below except that it does not have the 10.1" LVDS
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display. Next step: Figure out how to run a copy of NuttX using U-Boot.
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2016-03-31: Most all of the boot of the NSH configuration seems to be
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working. It gets to NSH and NSH appears to run normally. Non-interrupt
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driver serial output to the VCOM console is working (llsyslog). However,
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there does not appear to be any interrupt activity: No timer interrupts,
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no interrupt driver serial console output (syslog, printf).
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working. It gets to NSH and NSH appears to run normally. Non-interrupt
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driver serial output to the VCOM console is working (llsyslog). However,
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there does not appear to be any interrupt activity: No timer interrupts,
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no interrupt driver serial console output (syslog, printf).
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2016-05-16: I now get serial interrupts (but not timer interrupts). This
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involves a few changes to GIC bit settings that I do not fully understand.
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With this change, the NSH serial console works:
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involves a few changes to GIC bit settings that I do not fully understand.
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With this change, the NSH serial console works:
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MX6Q SABRESD U-Boot > ABEFGHILMN
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MX6Q SABRESD U-Boot > ABEFGHILMN
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NuttShell (NSH)
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nsh>
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NuttShell (NSH)
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nsh>
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But there are still no timer interrupts. LEDs do not appear to be working.
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But there are still no timer interrupts. LEDs do not appear to be working.
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2016-05-17: Timer interrupts now work. This turned out to be just a minor
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bit setting error in the timer configuration. LEDs were not working simply
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because board_autoled_initialize() was not being called in the board startup
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logic.
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bit setting error in the timer configuration. LEDs were not working simply
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because board_autoled_initialize() was not being called in the board startup
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logic.
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At this point, I would say that the basic NSH port is complete.
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At this point, I would say that the basic NSH port is complete.
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2016-05-18: Started looking at the SMP configuration. Initially, I verfied
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that the NSH configuration works with CONFIG_SMP_NCPUS=1. Not a very
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interesting case, but this does exercise a lot of the basic SMP logic.
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that the NSH configuration works with CONFIG_SMP_NCPUS=1. Not a very
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interesting case, but this does exercise a lot of the basic SMP logic.
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When more than one CPU is configured, then there are certain failures that
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appear to be stack corruption problem. See the open issues below under
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SMP.
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When more than one CPU is configured, then there are certain failures that
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appear to be stack corruption problem. See the open issues below under
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SMP.
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2016-05-22: In a simple NSH case, SMP does not seem to be working. But there
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are known SMP open issues so I assume if the tasking were stressed more there
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would be additional failures. See the open issues below under SMP.
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are known SMP open issues so I assume if the tasking were stressed more there
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would be additional failures. See the open issues below under SMP.
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An smp configuration was added. This is not quite the same as the configuration that I used for testing. I enabled DEBUG output, ran with only 2 CPUS, and disabled the RAMLOG:
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An smp configuration was added. This is not quite the same as the
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configuration that I used for testing. I enabled DEBUG output, ran with
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only 2 CPUS, and disabled the RAMLOG:
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+CONFIG_DEBUG=y
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+CONFIG_DEBUG_VERBOSE=y
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+CONFIG_DEBUG_SCHED=y
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+CONFIG_DEBUG_SYMBOLS=y
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+CONFIG_DEBUG=y
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+CONFIG_DEBUG_VERBOSE=y
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+CONFIG_DEBUG_SCHED=y
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+CONFIG_DEBUG_SYMBOLS=y
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-CONFIG_DEBUG_FULLOPT=y
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+CONFIG_DEBUG_NOOPT=y
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-CONFIG_DEBUG_FULLOPT=y
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+CONFIG_DEBUG_NOOPT=y
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-CONFIG_SMP_NCPUS=4
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+CONFIG_SMP_NCPUS=2
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-CONFIG_SMP_NCPUS=4
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+CONFIG_SMP_NCPUS=2
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-CONFIG_RAMLOG=y
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-CONFIG_RAMLOG_SYSLOG=y
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-CONFIG_RAMLOG_BUFSIZE=16384
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-CONFIG_RAMLOG_NONBLOCKING=y
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-CONFIG_RAMLOG_NPOLLWAITERS=4
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-CONFIG_SYSLOG=y
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-CONFIG_RAMLOG=y
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-CONFIG_RAMLOG_SYSLOG=y
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-CONFIG_RAMLOG_BUFSIZE=16384
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-CONFIG_RAMLOG_NONBLOCKING=y
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-CONFIG_RAMLOG_NPOLLWAITERS=4
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-CONFIG_SYSLOG=y
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I would also disable debug output from CPU0 so that I could better see the debug output from CPU1:
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I would also disable debug output from CPU0 so that I could better see the
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debug output from CPU1:
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$ diff -u libc/syslog/lib_lowsyslog.c libc/syslog/lib_lowsyslog.c.SAVE
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--- libc/syslog/lib_lowsyslog.c 2016-05-22 14:56:35.130096500 -0600
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+++ libc/syslog/lib_lowsyslog.c.SAVE 2016-05-20 13:36:22.588330100 -0600
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@@ -126,7 +126,0 @@
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{
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va_list ap;
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int ret;
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+if (up_cpu_index() == 0) return 17; // REMOVE ME
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$ diff -u libc/syslog/lib_lowsyslog.c libc/syslog/lib_lowsyslog.c.SAVE
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--- libc/syslog/lib_lowsyslog.c 2016-05-22 14:56:35.130096500 -0600
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+++ libc/syslog/lib_lowsyslog.c.SAVE 2016-05-20 13:36:22.588330100 -0600
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@@ -126,7 +126,0 @@
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{
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va_list ap;
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int ret;
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+if (up_cpu_index() == 0) return 17; // REMOVE ME
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/* Let lowvsyslog do the work */
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va_start(ap, fmt);
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/* Let lowvsyslog do the work */
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va_start(ap, fmt);
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$ diff -u libc/syslog/lib_syslog.c libc/syslog/lib_syslog.c.SAVE
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--- libc/syslog/lib_syslog.c 2016-05-22 14:56:35.156098100 -0600
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+++ libc/syslog/lib_syslog.c.SAVE 2016-05-20 13:36:15.331284000 -0600
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@@ -192,6 +192,7 @@
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{
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va_list ap;
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int ret;
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+if (up_cpu_index() == 0) return 17; // REMOVE ME
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/* Let vsyslog do the work */
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$ diff -u libc/syslog/lib_syslog.c libc/syslog/lib_syslog.c.SAVE
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--- libc/syslog/lib_syslog.c 2016-05-22 14:56:35.156098100 -0600
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+++ libc/syslog/lib_syslog.c.SAVE 2016-05-20 13:36:15.331284000 -0600
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@@ -192,6 +192,7 @@
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{
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va_list ap;
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int ret;
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+if (up_cpu_index() == 0) return 17; // REMOVE ME
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/* Let vsyslog do the work */
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Platform Features
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=================
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