arm/up_allocpage: fix warning: "PG_POOL_MAXL1NDX" is not defined
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
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@ -70,12 +70,12 @@ typedef uint16_t pgndx_t;
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typedef uint32_t pgndx_t;
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#endif
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#if PG_POOL_MAXL1NDX < 256
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typedef uint8_t L1ndx_t;
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#elif PG_POOL_MAXL1NDX < 65536
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typedef uint16_t L1ndx_t;
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#if PG_POOL_MAXL2NDX < 256
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typedef uint8_t l2ndx_t;
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#elif PG_POOL_MAXL2NDX < 65536
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typedef uint16_t l2ndx_t;
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#else
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typedef uint32_t L1ndx_t;
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typedef uint32_t l2ndx_t;
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#endif
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/****************************************************************************
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@ -93,14 +93,14 @@ typedef uint32_t L1ndx_t;
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static pgndx_t g_pgndx;
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/* After CONFIG_PAGING_NPAGED have been allocated, the pages will be re-used.
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* In order to re-used the page, we will have un-map the page from its previous
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* mapping. In order to that, we need to be able to map a physical address to
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* to an index into the PTE where it was mapped. The following table supports
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* this backward lookup - it is indexed by the page number index, and holds
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* another index to the mapped virtual page.
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* In order to re-used the page, we will have un-map the page from its
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* previous mapping. In order to that, we need to be able to map a physical
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* address to to an index into the PTE where it was mapped. The following
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* table supports this backward lookup - it is indexed by the page number
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* index, and holds another index to the mapped virtual page.
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*/
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static L1ndx_t g_ptemap[CONFIG_PAGING_NPPAGED];
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static l2ndx_t g_ptemap[CONFIG_PAGING_NPPAGED];
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/* The contents of g_ptemap[] are not valid until g_pgndx has wrapped at
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* least one time.
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@ -136,11 +136,11 @@ static bool g_pgwrap;
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* NOTE 2: If an in-use page is un-mapped, it may be necessary to flush the
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* instruction cache in some architectures.
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*
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* NOTE 3: Allocating and filling a page is a two step process. up_allocpage()
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* NOTE 3: Allocate and fill a page is a two step process. up_allocpage()
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* allocates the page, and up_fillpage() fills it with data from some non-
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* volatile storage device. This distinction is made because up_allocpage()
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* can probably be implemented in board-independent logic whereas up_fillpage()
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* probably must be implemented as board-specific logic.
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* can probably be implemented in board-independent logic whereas
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* up_fillpage() probably must be implemented as board-specific logic.
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*
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* NOTE 4: The initial mapping of vpage should be read-able and write-
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* able (but not cached). No special actions will be required of
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@ -206,12 +206,12 @@ int up_allocpage(FAR struct tcb_s *tcb, FAR void **vpage)
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pte = up_va2pte(oldvaddr);
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*pte = 0;
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/* Invalidate the instruction TLB corresponding to the virtual address */
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/* Invalidate instruction TLB corresponding to the virtual address */
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tlb_inst_invalidate_single(oldvaddr);
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/* I do not believe that it is necessary to flush the I-Cache in this
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* case: The I-Cache uses a virtual address index and, hence, since the
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* case: The I-Cache uses a virtual address index and, hence, since the
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* NuttX address space is flat, the cached instruction value should be
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* correct even if the page mapping is no longer in place.
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*/
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