STM32F7 SDMMC: Make sure that all SDMMC configuration variables begin with STM32F7_; Eliminate CONFIG_SDMMC1/2_DMA altogether. Does not appear to be used.

This commit is contained in:
Gregory Nutt 2017-01-31 14:27:50 -06:00
parent e0f199e42e
commit 1c66c06315
3 changed files with 21 additions and 36 deletions

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@ -1749,21 +1749,14 @@ config STM32F7_SDMMC_DMA
menu "SDMMC1 Configuration"
depends on STM32F7_SDMMC1
config SDMMC1_DMA
bool "Support DMA data transfers on SDMMC1"
default y if STM32F7_DMA2
depends on STM32F7_SDMMC_DMA && STM32F7_DMA2
---help---
Support DMA data transfers on SDMMC1. Requires STM32F7_SDMMC1 and config STM32F7_DMA2.
config SDMMC1_PRI
config STM32F7_SDMMC1_PRI
hex "SDMMC1 interrupt priority"
default 128
depends on ARCH_IRQPRIO && EXPERIMENTAL
---help---
Select SDMMC1 interrupt priority. Default: 128.
config SDMMC1_DMAPRIO
config STM32F7_SDMMC1_DMAPRIO
hex "SDMMC1 DMA priority"
default 0x00010000
---help---
@ -1783,21 +1776,14 @@ endmenu # "SDMMC1 Configuration"
menu "SDMMC2 Configuration"
depends on STM32F7_SDMMC2
config SDMMC2_DMA
bool "Support DMA data transfers on SDMMC2"
default y if STM32F7_DMA2
depends on STM32F7_SDMMC_DMA && STM32F7_DMA2
---help---
Support DMA data transfers on SDMMC2. Requires STM32F7_SDMMC2 and config STM32F7_DMA2.
config SDMMC2_PRI
config STM32F7_SDMMC2_PRI
hex "SDMMC2 interrupt priority"
default 128
depends on ARCH_IRQPRIO && EXPERIMENTAL
---help---
Select SDMMC2 interrupt priority. Default: 128.
config SDMMC2_DMAPRIO
config STM32F7_SDMMC2_DMAPRIO
hex "SDMMC2 DMA priority"
default 0x00010000
---help---

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@ -122,14 +122,14 @@
# endif
# ifdef CONFIG_STM32F7_SDMMC_DMA
# ifndef CONFIG_SDMMC1_DMAPRIO
# define CONFIG_SDMMC1_DMAPRIO DMA_SCR_PRIVERYHI
# ifndef CONFIG_STM32F7_SDMMC1_DMAPRIO
# define CONFIG_STM32F7_SDMMC1_DMAPRIO DMA_SCR_PRIVERYHI
# endif
# if (CONFIG_SDMMC1_DMAPRIO & ~DMA_SCR_PL_MASK) != 0
# error "Illegal value for CONFIG_SDMMC1_DMAPRIO"
# if (CONFIG_STM32F7_SDMMC1_DMAPRIO & ~DMA_SCR_PL_MASK) != 0
# error "Illegal value for CONFIG_STM32F7_SDMMC1_DMAPRIO"
# endif
# else
# undef CONFIG_SDMMC1_DMAPRIO
# undef CONFIG_STM32F7_SDMMC1_DMAPRIO
# endif
#endif
@ -139,14 +139,14 @@
# endif
# ifdef CONFIG_STM32F7_SDMMC_DMA
# ifndef CONFIG_SDMMC2_DMAPRIO
# define CONFIG_SDMMC2_DMAPRIO DMA_SCR_PRIVERYHI
# ifndef CONFIG_STM32F7_SDMMC2_DMAPRIO
# define CONFIG_STM32F7_SDMMC2_DMAPRIO DMA_SCR_PRIVERYHI
# endif
# if (CONFIG_SDMMC2_DMAPRIO & ~DMA_SCR_PL_MASK) != 0
# error "Illegal value for CONFIG_SDMMC2_DMAPRIO"
# if (CONFIG_STM32F7_SDMMC2_DMAPRIO & ~DMA_SCR_PL_MASK) != 0
# error "Illegal value for CONFIG_STM32F7_SDMMC2_DMAPRIO"
# endif
# else
# undef CONFIG_SDMMC2_DMAPRIO
# undef CONFIG_STM32F7_SDMMC2_DMAPRIO
# endif
#endif
@ -609,8 +609,8 @@ struct stm32_dev_s g_sdmmcdev1 =
.d0_gpio = GPIO_SDMMC1_D0,
.wrchandler = stm32_sdmmc1_rdyinterrupt,
#endif
#ifdef CONFIG_SDMMC1_DMAPRIO
.dmapri = CONFIG_SDMMC1_DMAPRIO,
#ifdef CONFIG_STM32F7_SDMMC1_DMAPRIO
.dmapri = CONFIG_STM32F7_SDMMC1_DMAPRIO,
#endif
};
#endif
@ -665,8 +665,8 @@ struct stm32_dev_s g_sdmmcdev2 =
.d0_gpio = GPIO_SDMMC2_D0,
.wrchandler = stm32_sdmmc2_rdyinterrupt,
#endif
#ifdef CONFIG_SDMMC2_DMAPRIO
.dmapri = CONFIG_SDMMC2_DMAPRIO,
#ifdef CONFIG_STM32F7_SDMMC2_DMAPRIO
.dmapri = CONFIG_STM32F7_SDMMC2_DMAPRIO,
#endif
};
#endif
@ -2031,8 +2031,8 @@ static int stm32_attach(FAR struct sdio_dev_s *dev)
up_enable_irq(priv->nirq);
#if defined(CONFIG_ARCH_IRQPRIO) && (defined(CONFIG_SDMMC1_DMAPRIO) || \
defined(CONFIG_SDMMC2_DMAPRIO))
#if defined(CONFIG_ARCH_IRQPRIO) && (defined(CONFIG_STM32F7_SDMMC1_DMAPRIO) || \
defined(CONFIG_STM32F7_SDMMC2_DMAPRIO))
/* Set the interrupt priority */
up_prioritize_irq(priv->nirq, priv->irqprio);

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@ -373,8 +373,7 @@ CONFIG_STM32F7_SDMMC_DMA=y
#
# SDMMC1 Configuration
#
CONFIG_SDMMC1_DMA=y
CONFIG_SDMMC1_DMAPRIO=0x00010000
CONFIG_STM32F7_SDMMC1_DMAPRIO=0x00010000
# CONFIG_SDMMC1_WIDTH_D1_ONLY is not set
# CONFIG_STM32F7_HAVE_RTC_COUNTER is not set
# CONFIG_STM32F7_HAVE_RTC_SUBSECONDS is not set