diff --git a/arch/arm/src/stm32/chip/stm32f44xxx_rcc.h b/arch/arm/src/stm32/chip/stm32f44xxx_rcc.h
index 9328e62dd8..4ea159e16a 100644
--- a/arch/arm/src/stm32/chip/stm32f44xxx_rcc.h
+++ b/arch/arm/src/stm32/chip/stm32f44xxx_rcc.h
@@ -536,10 +536,13 @@
 #define RCC_PLLI2SCFGR_PLLI2SN_SHIFT (6)     /* Bits 6-14: PLLI2S N multiplication factor for VCO */
 #define RCC_PLLI2SCFGR_PLLI2SN_MASK  (0x1ff << RCC_PLLI2SCFGR_PLLI2SN_SHIFT)
 #  define RCC_PLLI2SCFGR_PLLI2SN(n)  ((n) << RCC_PLLI2SCFGR_PLLI2SN_SHIFT)
-
 #define RCC_PLLI2SCFGR_PLLI2SP_SHIFT (16)   /* Bits 16-17: PLLI2S division factor for SPDIF-Rx clock */
 #define RCC_PLLI2SCFGR_PLLI2SP_MASK  (0x1ff << RCC_PLLI2SCFGR_PLLI2SP_SHIFT)
 #  define RCC_PLLI2SCFGR_PLLI2SP(n)  ((n) << RCC_PLLI2SCFGR_PLLI2SP_SHIFT)
+#  define RCC_PLLI2SCFGR_PLLI2SP_2    RCC_PLLI2SCFGR_PLLI2SP(0)  /* 00: PLLI2S = 2 */
+#  define RCC_PLLI2SCFGR_PLLI2SP_4    RCC_PLLI2SCFGR_PLLI2SP(1)  /* 01: PLLI2S = 4 */
+#  define RCC_PLLI2SCFGR_PLLI2SP_6    RCC_PLLI2SCFGR_PLLI2SP(2)  /* 10: PLLI2S = 6 */
+#  define RCC_PLLI2SCFGR_PLLI2SP_8    RCC_PLLI2SCFGR_PLLI2SP(3)  /* 11: PLLI2S = 8 */
 
 #define RCC_PLLI2SCFGR_PLLI2SQ_SHIFT (24)   /* Bits 24-27: PLLI2S division factor for SAI1 clock*/
 #define RCC_PLLI2SCFGR_PLLI2SQ_MASK  (0xf << RCC_PLLI2SCFGR_PLLI2SQ_SHIFT)
@@ -563,7 +566,10 @@
 #define RCC_PLLSAICFGR_PLLSAIP_SHIFT (16)   /* Bits 16-17: PLLSAI division factor for 48 MHz clock */
 #define RCC_PLLSAICFGR_PLLSAIP_MASK  (3 << RCC_PLLSAICFGR_PLLSAIP_SHIFT)
 #  define RCC_PLLSAICFGR_PLLSAIP(n)  ((n) << RCC_PLLSAICFGR_PLLSAIP_SHIFT)
-
+#  define RCC_PLLSAICFGR_PLLSAI_2     RCC_PLLSAICFGR_PLLSAIP(0)  /* 00: PLLSAI = 2 */
+#  define RCC_PLLSAICFGR_PLLSAI_4     RCC_PLLSAICFGR_PLLSAIP(1)  /* 01: PLLSAI = 4 */
+#  define RCC_PLLSAICFGR_PLLSAI_6     RCC_PLLSAICFGR_PLLSAIP(2)  /* 10: PLLSAI = 6 */
+#  define RCC_PLLSAICFGR_PLLSAI_8     RCC_PLLSAICFGR_PLLSAIP(3)  /* 11: PLLSAI = 8 */
 #define RCC_PLLSAICFGR_PLLSAIQ_SHIFT (24)     /* Bits 24-27: PLLSAI division factor for SAI clock */
 #define RCC_PLLSAICFGR_PLLSAIQ_MASK  (0x0F << RCC_PLLSAICFGR_PLLSAIQ_SHIFT)
 #  define RCC_PLLSAICFGR_PLLSAIQ(n)  ((n) << RCC_PLLSAICFGR_PLLSAIQ_SHIFT)