From 1c76e10c06ee2a6494f6c3730ea96f6f0adfa791 Mon Sep 17 00:00:00 2001 From: Marcin Wyrwas Date: Mon, 25 Jun 2018 23:44:31 +0000 Subject: [PATCH] Merged in plwm/nuttx/stm32f746g-disco-lcd (pull request #661) add support for STM32F746G-disco board LCD Approved-by: GregoryN --- arch/arm/src/stm32f7/stm32_ltdc.c | 2 + configs/stm32f746g-disco/fb/README.txt | 78 +++++++++++ configs/stm32f746g-disco/fb/defconfig | 63 +++++++++ configs/stm32f746g-disco/include/board.h | 67 ++++++++- configs/stm32f746g-disco/src/Makefile | 4 + configs/stm32f746g-disco/src/stm32_bringup.c | 17 ++- configs/stm32f746g-disco/src/stm32_lcd.c | 130 ++++++++++++++++++ .../stm32f746g-disco/src/stm32f746g-disco.h | 5 + 8 files changed, 362 insertions(+), 4 deletions(-) create mode 100644 configs/stm32f746g-disco/fb/README.txt create mode 100644 configs/stm32f746g-disco/fb/defconfig create mode 100644 configs/stm32f746g-disco/src/stm32_lcd.c diff --git a/arch/arm/src/stm32f7/stm32_ltdc.c b/arch/arm/src/stm32f7/stm32_ltdc.c index 8b81e3f172..eed36e0c93 100644 --- a/arch/arm/src/stm32f7/stm32_ltdc.c +++ b/arch/arm/src/stm32f7/stm32_ltdc.c @@ -59,6 +59,7 @@ #include "up_internal.h" #include "chip/stm32_ltdc.h" #include "chip/stm32_dma2d.h" +#include "stm32_rcc.h" #include "stm32_gpio.h" #include "stm32_ltdc.h" #include "stm32_dma2d.h" @@ -257,6 +258,7 @@ #else # define STM32_LTDC_L2_FBSIZE (0) +# define STM32_LTDC_L2_BPP 0 #endif /* Total memory used for framebuffers */ diff --git a/configs/stm32f746g-disco/fb/README.txt b/configs/stm32f746g-disco/fb/README.txt new file mode 100644 index 0000000000..fe2a675d83 --- /dev/null +++ b/configs/stm32f746g-disco/fb/README.txt @@ -0,0 +1,78 @@ +README.txt +========== + +STM32F746G-DISCO LTDC Framebuffer demo example + +Preparation +----------- + +As of writing this text, SDRAM support is not implemented for this board. +Therefore to make this demo work following changes are required to heap +management function: + + +diff --git a/stm32_allocateheap.c b/stm32_allocateheap.c +--- a/stm32_allocateheap.c ++++ b/stm32_allocateheap.c +@@ -93,7 +93,7 @@ + /* Set the start and end of SRAM1 and SRAM2 */ + + #define SRAM1_START STM32_SRAM1_BASE +-#define SRAM1_END (SRAM1_START + STM32F7_SRAM1_SIZE) ++#define SRAM1_END (SRAM1_START + 131072) + + #define SRAM2_START STM32_SRAM2_BASE + #define SRAM2_END (SRAM2_START + STM32F7_SRAM2_SIZE) +@@ -385,17 +385,17 @@ void up_addregion(void) + + /* Allow user-mode access to the STM32F20xxx/STM32F40xxx SRAM2 heap */ + +- stm32_mpu_uheap((uintptr_t)SRAM2_START, SRAM2_END-SRAM2_START); ++/* stm32_mpu_uheap((uintptr_t)SRAM2_START, SRAM2_END-SRAM2_START); */ + + #endif + + /* Colorize the heap for debug */ + +- up_heap_color((FAR void *)SRAM2_START, SRAM2_END-SRAM2_START); ++/* up_heap_color((FAR void *)SRAM2_START, SRAM2_END-SRAM2_START); */ + + /* Add the STM32F20xxx/STM32F40xxx SRAM2 user heap region. */ + +- kumm_addregion((FAR void *)SRAM2_START, SRAM2_END-SRAM2_START); ++/* kumm_addregion((FAR void *)SRAM2_START, SRAM2_END-SRAM2_START); */ + + #ifdef HAVE_DTCM + #if defined(CONFIG_BUILD_PROTECTED) && defined(CONFIG_MM_KERNEL_HEAP) + + +Configure and build +------------------- + +tools/configure.sh stm32f746g-disco/fb +make + + +Configuration +------------ + +This configuration provides 1 LTDC with +8pp CLUT pixel format and a resolution of 480x272. + + +Loading +------- + +st-flash write nuttx.bin 0x8000000 + + +Executing +--------- + +The ltdc is initialized during boot up. Interaction with NSH is via the serial +console at 115200 8N1 baud. From the nsh comandline execute the fb example: + + nsh> fb + +The test will put a pattern of concentric squares in the framebuffer and +terminate. diff --git a/configs/stm32f746g-disco/fb/defconfig b/configs/stm32f746g-disco/fb/defconfig new file mode 100644 index 0000000000..cd9d9a3be9 --- /dev/null +++ b/configs/stm32f746g-disco/fb/defconfig @@ -0,0 +1,63 @@ +# CONFIG_ARCH_FPU is not set +# CONFIG_NSH_DISABLE_IFCONFIG is not set +# CONFIG_NSH_DISABLE_PS is not set +# CONFIG_STM32F7_LTDC_L2 is not set +CONFIG_ARCH="arm" +CONFIG_ARCH_BOARD="stm32f746g-disco" +CONFIG_ARCH_BOARD_STM32F746G_DISCO=y +CONFIG_ARCH_BUTTONS=y +CONFIG_ARCH_CHIP_STM32F746NG=y +CONFIG_ARCH_CHIP_STM32F7=y +CONFIG_ARCH_STACKDUMP=y +CONFIG_ARMV7M_DCACHE=y +CONFIG_ARMV7M_DCACHE_WRITETHROUGH=y +CONFIG_ARMV7M_DTCM=y +CONFIG_ARMV7M_ICACHE=y +CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL=y +CONFIG_BOARD_INITIALIZE=y +CONFIG_BOARD_LOOPSPERMSEC=43103 +CONFIG_BUILTIN=y +CONFIG_DEBUG_SYMBOLS=y +CONFIG_DISABLE_POLL=y +CONFIG_DRIVERS_VIDEO=y +CONFIG_EXAMPLES_FB=y +CONFIG_EXAMPLES_NSH=y +CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y +CONFIG_HAVE_CXX=y +CONFIG_HAVE_CXXINITIALIZE=y +CONFIG_HOST_WINDOWS=y +CONFIG_INTELHEX_BINARY=y +CONFIG_LCD=y +CONFIG_MAX_TASKS=16 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_MM_REGIONS=3 +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NSH_BUILTIN_APPS=y +CONFIG_NSH_FILEIOSIZE=512 +CONFIG_NSH_LINELEN=64 +CONFIG_NSH_READLINE=y +CONFIG_PREALLOC_MQ_MSGS=4 +CONFIG_PREALLOC_TIMERS=4 +CONFIG_PREALLOC_WDOGS=4 +CONFIG_RAM_SIZE=245760 +CONFIG_RAM_START=0x20010000 +CONFIG_RAW_BINARY=y +CONFIG_RR_INTERVAL=200 +CONFIG_SCHED_WAITPID=y +CONFIG_SDCLONE_DISABLE=y +CONFIG_SPI=y +CONFIG_START_DAY=6 +CONFIG_START_MONTH=12 +CONFIG_START_YEAR=2011 +CONFIG_STM32F7_LTDC=y +CONFIG_STM32F7_LTDC_FB_BASE=0x20030000 +CONFIG_STM32F7_LTDC_FB_SIZE=130560 +CONFIG_STM32F7_LTDC_INTERFACE=y +CONFIG_STM32F7_LTDC_L1_L8=y +CONFIG_STM32F7_USART1=y +CONFIG_TASK_NAME_SIZE=0 +CONFIG_USART1_SERIAL_CONSOLE=y +CONFIG_USER_ENTRYPOINT="nsh_main" +CONFIG_VIDEO_FB=y +CONFIG_WDOG_INTRESERVE=0 diff --git a/configs/stm32f746g-disco/include/board.h b/configs/stm32f746g-disco/include/board.h index 7079b29ea9..1f5ab6234a 100644 --- a/configs/stm32f746g-disco/include/board.h +++ b/configs/stm32f746g-disco/include/board.h @@ -151,16 +151,16 @@ /* Configure factors for PLLSAI clock */ -#define STM32_RCC_PLLSAICFGR_PLLSAIN RCC_PLLSAICFGR_PLLSAIN(192) +#define STM32_RCC_PLLSAICFGR_PLLSAIN RCC_PLLSAICFGR_PLLSAIN(BOARD_LTDC_PLLSAIN) #define STM32_RCC_PLLSAICFGR_PLLSAIP RCC_PLLSAICFGR_PLLSAIP(2) #define STM32_RCC_PLLSAICFGR_PLLSAIQ RCC_PLLSAICFGR_PLLSAIQ(2) -#define STM32_RCC_PLLSAICFGR_PLLSAIR RCC_PLLSAICFGR_PLLSAIR(2) +#define STM32_RCC_PLLSAICFGR_PLLSAIR RCC_PLLSAICFGR_PLLSAIR(BOARD_LTDC_PLLSAIR) /* Configure Dedicated Clock Configuration Register */ #define STM32_RCC_DCKCFGR1_PLLI2SDIVQ RCC_DCKCFGR1_PLLI2SDIVQ(1) #define STM32_RCC_DCKCFGR1_PLLSAIDIVQ RCC_DCKCFGR1_PLLSAIDIVQ(1) -#define STM32_RCC_DCKCFGR1_PLLSAIDIVR RCC_DCKCFGR1_PLLSAIDIVR(0) +#define STM32_RCC_DCKCFGR1_PLLSAIDIVR RCC_DCKCFGR1_PLLSAIDIVR(1) #define STM32_RCC_DCKCFGR1_SAI1SRC RCC_DCKCFGR1_SAI1SEL(0) #define STM32_RCC_DCKCFGR1_SAI2SRC RCC_DCKCFGR1_SAI2SEL(0) #define STM32_RCC_DCKCFGR1_TIMPRESRC 0 @@ -374,4 +374,65 @@ #define GPIO_ETH_RMII_TXD0 GPIO_ETH_RMII_TXD0_2 #define GPIO_ETH_RMII_TXD1 GPIO_ETH_RMII_TXD1_2 +/* LCD definitions ******************************************************************/ + +#define BOARD_LTDC_WIDTH 480 +#define BOARD_LTDC_HEIGHT 272 + +#define BOARD_LTDC_OUTPUT_BPP 24 +#define BOARD_LTDC_HFP 32 +#define BOARD_LTDC_HBP 13 +#define BOARD_LTDC_VFP 2 +#define BOARD_LTDC_VBP 2 +#define BOARD_LTDC_HSYNC 41 +#define BOARD_LTDC_VSYNC 10 + +#define BOARD_LTDC_PLLSAIN 192 +#define BOARD_LTDC_PLLSAIR 5 + +/* Pixel Clock Polarity */ +#define BOARD_LTDC_GCR_PCPOL 0 /* !LTDC_GCR_PCPOL */ +/* Data Enable Polarity */ +#define BOARD_LTDC_GCR_DEPOL 0 /* !LTDC_GCR_DEPOL */ +/* Vertical Sync Polarity */ +#define BOARD_LTDC_GCR_VSPOL 0 /* !LTDC_GCR_VSPOL */ +/* Horicontal Sync Polarity */ +#define BOARD_LTDC_GCR_HSPOL 0 /* !LTDC_GCR_HSPOL */ + +/* GPIO pinset */ + +#define GPIO_LTDC_PINS 24 /* 24-bit display */ + +#define GPIO_LTDC_R0 GPIO_LTDC_R0_3 +#define GPIO_LTDC_R1 GPIO_LTDC_R1_3 +#define GPIO_LTDC_R2 GPIO_LTDC_R2_4 +#define GPIO_LTDC_R3 GPIO_LTDC_R3_3 +#define GPIO_LTDC_R4 GPIO_LTDC_R4_4 +#define GPIO_LTDC_R5 GPIO_LTDC_R5_4 +#define GPIO_LTDC_R6 GPIO_LTDC_R6_4 +#define GPIO_LTDC_R7 GPIO_LTDC_R7_3 + +#define GPIO_LTDC_G0 GPIO_LTDC_G0_2 +#define GPIO_LTDC_G1 GPIO_LTDC_G1_2 +#define GPIO_LTDC_G2 GPIO_LTDC_G2_3 +#define GPIO_LTDC_G3 GPIO_LTDC_G3_4 +#define GPIO_LTDC_G4 GPIO_LTDC_G4_3 +#define GPIO_LTDC_G5 GPIO_LTDC_G5_3 +#define GPIO_LTDC_G6 GPIO_LTDC_G6_3 +#define GPIO_LTDC_G7 GPIO_LTDC_G7_3 + +#define GPIO_LTDC_B0 GPIO_LTDC_B0_1 +#define GPIO_LTDC_B1 GPIO_LTDC_B1_2 +#define GPIO_LTDC_B2 GPIO_LTDC_B2_3 +#define GPIO_LTDC_B3 GPIO_LTDC_B3_3 +#define GPIO_LTDC_B4 GPIO_LTDC_B4_4 +#define GPIO_LTDC_B5 GPIO_LTDC_B5_3 +#define GPIO_LTDC_B6 GPIO_LTDC_B6_3 +#define GPIO_LTDC_B7 GPIO_LTDC_B7_3 + +#define GPIO_LTDC_VSYNC GPIO_LTDC_VSYNC_2 +#define GPIO_LTDC_HSYNC GPIO_LTDC_HSYNC_2 +#define GPIO_LTDC_DE GPIO_LTDC_DE_3 +#define GPIO_LTDC_CLK GPIO_LTDC_CLK_3 + #endif /* __CONFIG_STM32F746G_DISCO_INCLUDE_BOARD_H */ diff --git a/configs/stm32f746g-disco/src/Makefile b/configs/stm32f746g-disco/src/Makefile index 12dadaf672..f782d07111 100644 --- a/configs/stm32f746g-disco/src/Makefile +++ b/configs/stm32f746g-disco/src/Makefile @@ -64,4 +64,8 @@ ifeq ($(CONFIG_SPORADIC_INSTRUMENTATION),y) CSRCS += stm32_sporadic.c endif +ifeq ($(CONFIG_STM32F7_LTDC),y) +CSRCS += stm32_lcd.c +endif + include $(TOPDIR)/configs/Board.mk diff --git a/configs/stm32f746g-disco/src/stm32_bringup.c b/configs/stm32f746g-disco/src/stm32_bringup.c index eb94e13e1a..3bfcb61b7d 100644 --- a/configs/stm32f746g-disco/src/stm32_bringup.c +++ b/configs/stm32f746g-disco/src/stm32_bringup.c @@ -50,6 +50,10 @@ # include #endif +#ifdef CONFIG_VIDEO_FB +# include +#endif + /**************************************************************************** * Public Functions ****************************************************************************/ @@ -70,9 +74,10 @@ int stm32_bringup(void) { -#ifdef CONFIG_FS_PROCFS int ret; +#ifdef CONFIG_FS_PROCFS + #ifdef CONFIG_STM32_CCM_PROCFS /* Register the CCM procfs entry. This must be done before the procfs is * mounted. @@ -114,5 +119,15 @@ int stm32_bringup(void) } #endif +#ifdef CONFIG_VIDEO_FB + /* Initialize and register the framebuffer driver */ + + ret = fb_register(0, 0); + if (ret < 0) + { + syslog(LOG_ERR, "ERROR: fb_register() failed: %d\n", ret); + } +#endif + return OK; } diff --git a/configs/stm32f746g-disco/src/stm32_lcd.c b/configs/stm32f746g-disco/src/stm32_lcd.c new file mode 100644 index 0000000000..7c3651b306 --- /dev/null +++ b/configs/stm32f746g-disco/src/stm32_lcd.c @@ -0,0 +1,130 @@ +/************************************************************************************ + * configs/stm32f746g-disco/src/stm32_lcd.c + * + * Copyright (C) 2018 Gregory Nutt. All rights reserved. + * Authors: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include + +#include +#include +#include + +#include + +#include "up_arch.h" +#include "stm32f746g-disco.h" +#include "stm32_gpio.h" +#include "stm32_ltdc.h" + +#ifdef CONFIG_STM32F7_LTDC +/**************************************************************************** + * Name: up_fbinitialize + * + * Description: + * Initialize the framebuffer video hardware associated with the display. + * + * Input Parameters: + * display - In the case of hardware with multiple displays, this + * specifies the display. Normally this is zero. + * + * Returned Value: + * Zero is returned on success; a negated errno value is returned on any + * failure. + * + ****************************************************************************/ + +int up_fbinitialize(int display) +{ + /* Custom LCD display with RGB interface */ + stm32_configgpio(GPIO_LCD_DISP); + stm32_configgpio(GPIO_LCD_BL); + + stm32_gpiowrite(GPIO_LCD_DISP, true); + stm32_gpiowrite(GPIO_LCD_BL, true); + + return stm32_ltdcinitialize(); +} + +/**************************************************************************** + * Name: up_fbgetvplane + * + * Description: + * Return a a reference to the framebuffer object for the specified video + * plane of the specified plane. Many OSDs support multiple planes of video. + * + * Input Parameters: + * display - In the case of hardware with multiple displays, this + * specifies the display. Normally this is zero. + * vplane - Identifies the plane being queried. + * + * Returned Value: + * A non-NULL pointer to the frame buffer access structure is returned on + * success; NULL is returned on any failure. + * + ****************************************************************************/ + +FAR struct fb_vtable_s *up_fbgetvplane(int display, int vplane) +{ + return stm32_ltdcgetvplane(vplane); +} + +/**************************************************************************** + * Name: up_fbuninitialize + * + * Description: + * Uninitialize the framebuffer support for the specified display. + * + * Input Parameters: + * display - In the case of hardware with multiple displays, this + * specifies the display. Normally this is zero. + * + * Returned Value: + * None + * + ****************************************************************************/ + +void up_fbuninitialize(int display) +{ + stm32_gpiowrite(GPIO_LCD_DISP, false); + stm32_gpiowrite(GPIO_LCD_BL, false); + + stm32_ltdcuninitialize(); +} +#endif /* CONFIG_STM32_LTDC */ diff --git a/configs/stm32f746g-disco/src/stm32f746g-disco.h b/configs/stm32f746g-disco/src/stm32f746g-disco.h index ed043cff14..21c658f110 100644 --- a/configs/stm32f746g-disco/src/stm32f746g-disco.h +++ b/configs/stm32f746g-disco/src/stm32f746g-disco.h @@ -94,6 +94,11 @@ #define GPIO_SCHED_RUNNING (GPIO_OUTPUT | GPIO_PUSHPULL | GPIO_SPEED_50MHz | GPIO_OUTPUT_CLEAR | \ GPIO_PORTG | GPIO_PIN7) +#define GPIO_LCD_DISP (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_50MHz|\ + GPIO_OUTPUT_SET|GPIO_PORTI|GPIO_PIN12) + +#define GPIO_LCD_BL (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_50MHz|\ + GPIO_OUTPUT_SET|GPIO_PORTK|GPIO_PIN3) /**************************************************************************************************** * Public data ****************************************************************************************************/