esp32s3: Fully integrate Espressif HAL repository to ESP32-S3
By integrating the Espressif`s HAL repository into the current ESP32-S3 implementation on NuttX, it is possible to call functions that make it easier to set up the registers of the ESP32-S3 and enables the usage of common Espressif drivers. Please note that Espressif's HAL repository was already being used for the Wi-Fi driver. Then, this commit includes other source files to be used by other drivers other than Wi-Fi and reorganize the build process.
This commit is contained in:
Tiago Medicci Serrano
Xiang Xiao
parent
cb80365daa
commit
1ca460c89a
@ -35,6 +35,10 @@ config ARCH_CHIP_ESP32S3MINI1
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endchoice # ESP32-S3 Chip Selection
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config ESPRESSIF_CHIP_SERIES
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string
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default "esp32s3"
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choice ESP32S3_DEFAULT_CPU_FREQ
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prompt "CPU frequency"
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default ESP32S3_DEFAULT_CPU_FREQ_240
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@ -264,6 +268,8 @@ config ESP32S3_RUN_IRAM
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menu "ESP32-S3 Peripheral Selection"
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source "arch/xtensa/src/common/espressif/Kconfig"
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config ESP32S3_UART
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bool
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default n
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@ -191,7 +191,7 @@ endif
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ESP_HAL_3RDPARTY_REPO = esp-hal-3rdparty
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ifndef ESP_HAL_3RDPARTY_VERSION
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ESP_HAL_3RDPARTY_VERSION = 2fbc8a025275d68833cdfef490377048538de57a
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ESP_HAL_3RDPARTY_VERSION = 22804823777dbbb7f43925b7729b3a32331aa7cd
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endif
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ifndef ESP_HAL_3RDPARTY_URL
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@ -212,6 +212,24 @@ CFLAGS += -Wno-undef -Wno-unused-variable
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include chip/Bootloader.mk
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CHIP_SERIES = $(patsubst "%",%,$(CONFIG_ESPRESSIF_CHIP_SERIES))
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include chip/hal.mk
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include common/espressif/Make.defs
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context:: chip/$(ESP_HAL_3RDPARTY_REPO)
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ifeq ($(CONFIG_ESP32S3_WIRELESS),y)
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$(Q) echo "Espressif HAL for 3rd Party Platforms: initializing submodules..."
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$(Q) git -C chip/$(ESP_HAL_3RDPARTY_REPO) submodule --quiet update --init --depth=1 components/mbedtls/mbedtls components/esp_phy/lib components/esp_wifi/lib components/bt/controller/lib_esp32c3_family components/esp_coex/lib
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$(Q) git -C chip/$(ESP_HAL_3RDPARTY_REPO)/components/mbedtls/mbedtls reset --quiet --hard
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$(Q) echo "Applying patches..."
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$(Q) cd chip/$(ESP_HAL_3RDPARTY_REPO)/components/mbedtls/mbedtls && git apply ../../../nuttx/patches/components/mbedtls/mbedtls/*.patch
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endif
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distclean::
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$(call DELDIR, chip/$(ESP_HAL_3RDPARTY_REPO))
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ifeq ($(CONFIG_ESP32S3_WIRELESS),y)
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include chip/Wireless.mk
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endif
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@ -18,37 +18,21 @@
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#
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############################################################################
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context:: chip/$(ESP_HAL_3RDPARTY_REPO)
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$(Q) echo "Espressif HAL for 3rd Party Platforms: initializing submodules..."
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$(Q) git -C chip/$(ESP_HAL_3RDPARTY_REPO) submodule --quiet update --init --depth=1 components/mbedtls/mbedtls components/esp_phy/lib components/esp_wifi/lib components/bt/controller/lib_esp32c3_family components/esp_coex/lib
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$(Q) git -C chip/$(ESP_HAL_3RDPARTY_REPO)/components/mbedtls/mbedtls reset --quiet --hard
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$(Q) echo "Applying patches..."
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$(Q) cd chip/$(ESP_HAL_3RDPARTY_REPO)/components/mbedtls/mbedtls && git apply ../../../nuttx/patches/components/mbedtls/mbedtls/*.patch
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INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)bt$(DELIM)include$(DELIM)esp32c3$(DELIM)include
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INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_coex$(DELIM)include
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INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_event$(DELIM)include
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INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_phy$(DELIM)esp32s3$(DELIM)include
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INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_phy$(DELIM)include
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INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)include$(DELIM)esp32s3
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INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_wifi$(DELIM)include
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INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)soc$(DELIM)esp32s3$(DELIM)include
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INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)nuttx$(DELIM)esp32s3$(DELIM)include
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INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)nuttx$(DELIM)include$(DELIM)esp_wifi
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distclean::
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$(call DELDIR, chip/$(ESP_HAL_3RDPARTY_REPO))
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INCLUDES += ${INCDIR_PREFIX}$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_coex$(DELIM)include
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INCLUDES += ${INCDIR_PREFIX}$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_common$(DELIM)include
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INCLUDES += ${INCDIR_PREFIX}$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)bt$(DELIM)include$(DELIM)esp32c3$(DELIM)include
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INCLUDES += ${INCDIR_PREFIX}$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_event$(DELIM)include
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INCLUDES += ${INCDIR_PREFIX}$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)include
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INCLUDES += ${INCDIR_PREFIX}$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_phy$(DELIM)esp32s3$(DELIM)include
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INCLUDES += ${INCDIR_PREFIX}$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_phy$(DELIM)include
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INCLUDES += ${INCDIR_PREFIX}$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)include
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INCLUDES += ${INCDIR_PREFIX}$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)include$(DELIM)esp32s3
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INCLUDES += ${INCDIR_PREFIX}$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_system$(DELIM)include
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INCLUDES += ${INCDIR_PREFIX}$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_timer$(DELIM)include
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INCLUDES += ${INCDIR_PREFIX}$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_wifi$(DELIM)include
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INCLUDES += ${INCDIR_PREFIX}$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)log$(DELIM)include
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INCLUDES += ${INCDIR_PREFIX}$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)soc$(DELIM)esp32s3$(DELIM)include
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INCLUDES += ${INCDIR_PREFIX}$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)nuttx$(DELIM)esp32s3$(DELIM)include
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INCLUDES += ${INCDIR_PREFIX}$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)nuttx$(DELIM)include$(DELIM)esp_wifi
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EXTRA_LIBPATHS += -L $(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_phy$(DELIM)lib$(DELIM)esp32s3
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EXTRA_LIBPATHS += -L $(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_wifi$(DELIM)lib$(DELIM)esp32s3
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EXTRA_LIBPATHS += -L $(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)bt$(DELIM)controller$(DELIM)lib_esp32c3_family$(DELIM)esp32s3
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EXTRA_LIBPATHS += -L $(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_coex$(DELIM)lib$(DELIM)esp32s3
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EXTRA_LIBPATHS += -L $(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_phy$(DELIM)lib$(DELIM)esp32s3
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EXTRA_LIBPATHS += -L $(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_wifi$(DELIM)lib$(DELIM)esp32s3
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EXTRA_LIBS += -lphy -lcoexist
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@ -73,22 +57,22 @@ endif
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VPATH += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)mbedtls$(DELIM)mbedtls$(DELIM)library
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INCLUDES += ${INCDIR_PREFIX}$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)mbedtls$(DELIM)mbedtls$(DELIM)include
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INCLUDES += ${INCDIR_PREFIX}$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)mbedtls$(DELIM)mbedtls$(DELIM)library
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INCLUDES += ${INCDIR_PREFIX}$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)mbedtls$(DELIM)port$(DELIM)include
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INCLUDES += ${INCDIR_PREFIX}$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)nuttx$(DELIM)include$(DELIM)mbedtls
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INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)mbedtls$(DELIM)mbedtls$(DELIM)include
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INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)mbedtls$(DELIM)mbedtls$(DELIM)library
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INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)mbedtls$(DELIM)port$(DELIM)include
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INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)nuttx$(DELIM)include$(DELIM)mbedtls
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### Define Espressif's configs for mbedTLS
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CFLAGS += ${DEFINE_PREFIX}MBEDTLS_CONFIG_FILE="<mbedtls/esp_config.h>"
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CFLAGS += $(DEFINE_PREFIX)MBEDTLS_CONFIG_FILE="<mbedtls/esp_config.h>"
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CHIP_CSRCS += aes.c
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CHIP_CSRCS += aria.c
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CHIP_CSRCS += bignum_core.c
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CHIP_CSRCS += bignum.c
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CHIP_CSRCS += ccm.c
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CHIP_CSRCS += cipher.c
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CHIP_CSRCS += cipher_wrap.c
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CHIP_CSRCS += cipher.c
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CHIP_CSRCS += cmac.c
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CHIP_CSRCS += constant_time.c
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CHIP_CSRCS += ctr_drbg.c
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@ -118,32 +102,32 @@ CHIP_CSRCS += esp_md.c
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WIFI_WPA_SUPPLICANT = chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)wpa_supplicant
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CFLAGS += ${DEFINE_PREFIX}__ets__
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CFLAGS += ${DEFINE_PREFIX}CONFIG_CRYPTO_MBEDTLS
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CFLAGS += ${DEFINE_PREFIX}CONFIG_ECC
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CFLAGS += ${DEFINE_PREFIX}CONFIG_IEEE80211W
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CFLAGS += ${DEFINE_PREFIX}CONFIG_WPA3_SAE
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CFLAGS += ${DEFINE_PREFIX}EAP_PEER_METHOD
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CFLAGS += ${DEFINE_PREFIX}ESP_PLATFORM=1
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CFLAGS += ${DEFINE_PREFIX}ESP_SUPPLICANT
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CFLAGS += ${DEFINE_PREFIX}ESPRESSIF_USE
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CFLAGS += ${DEFINE_PREFIX}IEEE8021X_EAPOL
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CFLAGS += ${DEFINE_PREFIX}USE_WPA2_TASK
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CFLAGS += $(DEFINE_PREFIX)__ets__
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CFLAGS += $(DEFINE_PREFIX)CONFIG_CRYPTO_MBEDTLS
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CFLAGS += $(DEFINE_PREFIX)CONFIG_ECC
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CFLAGS += $(DEFINE_PREFIX)CONFIG_IEEE80211W
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CFLAGS += $(DEFINE_PREFIX)CONFIG_WPA3_SAE
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CFLAGS += $(DEFINE_PREFIX)EAP_PEER_METHOD
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CFLAGS += $(DEFINE_PREFIX)ESP_PLATFORM=1
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CFLAGS += $(DEFINE_PREFIX)ESP_SUPPLICANT
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CFLAGS += $(DEFINE_PREFIX)ESPRESSIF_USE
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CFLAGS += $(DEFINE_PREFIX)IEEE8021X_EAPOL
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CFLAGS += $(DEFINE_PREFIX)USE_WPA2_TASK
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ifeq ($(CONFIG_ESP_WIFI_GCMP_SUPPORT),y)
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CFLAGS += ${DEFINE_PREFIX}CONFIG_GCMP
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CFLAGS += $(DEFINE_PREFIX)CONFIG_GCMP
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endif
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ifeq ($(CONFIG_ESP_WIFI_GMAC_SUPPORT),y)
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CFLAGS += ${DEFINE_PREFIX}CONFIG_GMAC
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CFLAGS += $(DEFINE_PREFIX)CONFIG_GMAC
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endif
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INCLUDES += ${INCDIR_PREFIX}$(ARCH_SRCDIR)$(DELIM)$(WIFI_WPA_SUPPLICANT)$(DELIM)include
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INCLUDES += ${INCDIR_PREFIX}$(ARCH_SRCDIR)$(DELIM)$(WIFI_WPA_SUPPLICANT)$(DELIM)src
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INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)$(WIFI_WPA_SUPPLICANT)$(DELIM)include
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INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)$(WIFI_WPA_SUPPLICANT)$(DELIM)src
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VPATH += $(WIFI_WPA_SUPPLICANT)$(DELIM)src$(DELIM)ap
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INCLUDES += ${INCDIR_PREFIX}$(ARCH_SRCDIR)$(DELIM)$(WIFI_WPA_SUPPLICANT)$(DELIM)src$(DELIM)ap
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INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)$(WIFI_WPA_SUPPLICANT)$(DELIM)src$(DELIM)ap
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CHIP_CSRCS += ap_config.c
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CHIP_CSRCS += ieee802_11.c
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@ -154,7 +138,7 @@ CHIP_CSRCS += wpa_auth.c
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VPATH += $(WIFI_WPA_SUPPLICANT)$(DELIM)src$(DELIM)common
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INCLUDES += ${INCDIR_PREFIX}$(ARCH_SRCDIR)$(DELIM)$(WIFI_WPA_SUPPLICANT)$(DELIM)src$(DELIM)common
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INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)$(WIFI_WPA_SUPPLICANT)$(DELIM)src$(DELIM)common
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CHIP_CSRCS += dragonfly.c
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CHIP_CSRCS += sae.c
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@ -197,7 +181,7 @@ CHIP_CSRCS += wpa.c
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VPATH += $(WIFI_WPA_SUPPLICANT)$(DELIM)src$(DELIM)utils
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INCLUDES += ${INCDIR_PREFIX}$(ARCH_SRCDIR)$(DELIM)$(WIFI_WPA_SUPPLICANT)$(DELIM)src$(DELIM)utils
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INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)$(WIFI_WPA_SUPPLICANT)$(DELIM)src$(DELIM)utils
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CHIP_CSRCS += base64.c
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CHIP_CSRCS += bitfield.c
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@ -210,18 +194,18 @@ CHIP_CSRCS += wpabuf.c
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VPATH += $(WIFI_WPA_SUPPLICANT)$(DELIM)port
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INCLUDES += ${INCDIR_PREFIX}$(ARCH_SRCDIR)$(DELIM)$(WIFI_WPA_SUPPLICANT)$(DELIM)port$(DELIM)include
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INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)$(WIFI_WPA_SUPPLICANT)$(DELIM)port$(DELIM)include
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CHIP_CSRCS += eloop.c
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CHIP_CSRCS += os_xtensa.c
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## ESP Supplicant (Espressif's WPA supplicant extension)
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INCLUDES += ${INCDIR_PREFIX}$(ARCH_SRCDIR)$(DELIM)$(WIFI_WPA_SUPPLICANT)$(DELIM)esp_supplicant$(DELIM)include
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INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)$(WIFI_WPA_SUPPLICANT)$(DELIM)esp_supplicant$(DELIM)include
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VPATH += $(WIFI_WPA_SUPPLICANT)$(DELIM)esp_supplicant$(DELIM)src
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INCLUDES += ${INCDIR_PREFIX}$(ARCH_SRCDIR)$(DELIM)$(WIFI_WPA_SUPPLICANT)$(DELIM)esp_supplicant$(DELIM)src
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INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)$(WIFI_WPA_SUPPLICANT)$(DELIM)esp_supplicant$(DELIM)src
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CHIP_CSRCS += esp_common.c
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CHIP_CSRCS += esp_hostap.c
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@ -232,7 +216,7 @@ CHIP_CSRCS += esp_wpas_glue.c
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VPATH += $(WIFI_WPA_SUPPLICANT)$(DELIM)esp_supplicant$(DELIM)src$(DELIM)crypto
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INCLUDES += ${INCDIR_PREFIX}$(ARCH_SRCDIR)$(DELIM)$(WIFI_WPA_SUPPLICANT)$(DELIM)src$(DELIM)crypto
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INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)$(WIFI_WPA_SUPPLICANT)$(DELIM)src$(DELIM)crypto
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CHIP_CSRCS += crypto_mbedtls-bignum.c
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CHIP_CSRCS += crypto_mbedtls-ec.c
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@ -269,42 +269,3 @@ void esp32s3_clockconfig(void)
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esp32s3_set_cpu_freq(CONFIG_ESP32S3_DEFAULT_CPU_FREQ_MHZ);
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}
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/****************************************************************************
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* Name: esp_clk_cpu_freq
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*
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* Description:
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* Get CPU frequency
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*
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* Input Parameters:
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* None
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*
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* Returned Value:
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* CPU frequency
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*
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****************************************************************************/
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int IRAM_ATTR esp_clk_cpu_freq(void)
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{
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return (int)ets_get_cpu_frequency() * MHZ;
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}
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/****************************************************************************
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* Name: esp_clk_apb_freq
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*
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* Description:
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* Return current APB clock frequency.
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*
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* Input Parameters:
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* None
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*
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* Returned Value:
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* APB clock frequency, in Hz
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*
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****************************************************************************/
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int IRAM_ATTR esp_clk_apb_freq(void)
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{
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return MIN(ets_get_cpu_frequency(), 80) * MHZ;
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}
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@ -29,6 +29,8 @@
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#include <stdint.h>
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#include "esp_private/esp_clk.h"
|
||||
|
||||
/****************************************************************************
|
||||
* Public Function Prototypes
|
||||
****************************************************************************/
|
||||
@ -85,36 +87,4 @@ void esp32s3_set_cpu_freq(int cpu_freq_mhz);
|
||||
|
||||
void esp32s3_clockconfig(void);
|
||||
|
||||
/****************************************************************************
|
||||
* Name: esp_clk_cpu_freq
|
||||
*
|
||||
* Description:
|
||||
* Get the current CPU frequency.
|
||||
*
|
||||
* Input Parameters:
|
||||
* None.
|
||||
*
|
||||
* Returned Value:
|
||||
* CPU frequency in Hz.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
int esp_clk_cpu_freq(void);
|
||||
|
||||
/****************************************************************************
|
||||
* Name: esp_clk_apb_freq
|
||||
*
|
||||
* Description:
|
||||
* Return current APB clock frequency.
|
||||
*
|
||||
* Input Parameters:
|
||||
* None.
|
||||
*
|
||||
* Returned Value:
|
||||
* APB clock frequency in Hz.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
int esp_clk_apb_freq(void);
|
||||
|
||||
#endif /* __ARCH_XTENSA_SRC_ESP32S3_ESP32S3_CLOCKCONFIG_H */
|
||||
|
||||
@ -34,6 +34,9 @@
|
||||
#include <nuttx/irq.h>
|
||||
|
||||
#include "xtensa.h"
|
||||
|
||||
#include "soc/soc_caps.h"
|
||||
|
||||
#include "esp32s3_gpio.h"
|
||||
#include "esp32s3_irq.h"
|
||||
#include "hardware/esp32s3_gpio.h"
|
||||
|
||||
@ -93,6 +93,33 @@
|
||||
# define OUTPUT_FUNCTION_5 (OUTPUT_FUNCTION | FUNCTION_5)
|
||||
# define OUTPUT_FUNCTION_6 (OUTPUT_FUNCTION | FUNCTION_6)
|
||||
|
||||
/* Interrupt type used with esp32s3_gpioirqenable() */
|
||||
|
||||
#define DISABLED 0x00
|
||||
#define RISING 0x01
|
||||
#define FALLING 0x02
|
||||
#define CHANGE 0x03
|
||||
#define ONLOW 0x04
|
||||
#define ONHIGH 0x05
|
||||
|
||||
/* Check whether it is a valid GPIO number */
|
||||
|
||||
#define GPIO_IS_VALID_GPIO(gpio_num) ((gpio_num >= 0) && \
|
||||
(((1ULL << (gpio_num)) & \
|
||||
SOC_GPIO_VALID_GPIO_MASK) != 0))
|
||||
|
||||
/* Check whether it can be a valid GPIO number of output mode */
|
||||
|
||||
#define GPIO_IS_VALID_OUTPUT_GPIO(gpio_num) \
|
||||
((gpio_num >= 0) && \
|
||||
(((1ULL << (gpio_num)) & SOC_GPIO_VALID_OUTPUT_GPIO_MASK) != 0))
|
||||
|
||||
/* Check whether it can be a valid digital I/O pad */
|
||||
|
||||
#define GPIO_IS_VALID_DIGITAL_IO_PAD(gpio_num) \
|
||||
((gpio_num >= 0) && \
|
||||
(((1ULL << (gpio_num)) & SOC_GPIO_VALID_DIGITAL_IO_PAD_MASK) != 0))
|
||||
|
||||
/****************************************************************************
|
||||
* Public Types
|
||||
****************************************************************************/
|
||||
@ -102,16 +129,7 @@
|
||||
/* Must be big enough to hold the above encodings */
|
||||
|
||||
typedef uint16_t gpio_pinattr_t;
|
||||
|
||||
typedef enum gpio_intrtype_e
|
||||
{
|
||||
GPIO_INTR_DISABLE = 0, /* Disable GPIO interrupt */
|
||||
GPIO_INTR_POSEDGE = 1, /* Rising edge */
|
||||
GPIO_INTR_NEGEDGE = 2, /* Falling edge */
|
||||
GPIO_INTR_ANYEDGE = 3, /* Both rising and falling edge */
|
||||
GPIO_INTR_LOW_LEVEL = 4, /* Input low level trigger */
|
||||
GPIO_INTR_HIGH_LEVEL = 5 /* Input high level trigger */
|
||||
} gpio_intrtype_t;
|
||||
typedef uint8_t gpio_intrtype_t;
|
||||
|
||||
/****************************************************************************
|
||||
* Public Data
|
||||
|
||||
@ -1253,9 +1253,6 @@ uint32_t IRAM_ATTR esp32s3_rtc_clk_cal(enum esp32s3_rtc_cal_sel_e cal_clk,
|
||||
return period;
|
||||
}
|
||||
|
||||
enum esp32s3_rtc_xtal_freq_e rtc_get_xtal(void)
|
||||
__attribute__((alias("esp32s3_rtc_clk_xtal_freq_get")));
|
||||
|
||||
/****************************************************************************
|
||||
* Name: esp32s3_rtc_clk_xtal_freq_get
|
||||
*
|
||||
|
||||
@ -294,6 +294,11 @@ static int32_t esp_nvs_erase_key(uint32_t handle, const char *key);
|
||||
static int32_t esp_get_random(uint8_t *buf, size_t len);
|
||||
static int32_t esp_get_time(void *t);
|
||||
static uint32_t esp_clk_slowclk_cal_get_wrapper(void);
|
||||
static void esp_log_writev_wrapper(uint32_t level, const char *tag,
|
||||
const char *format, va_list args);
|
||||
static void esp_log_write_wrapper(uint32_t level,
|
||||
const char *tag,
|
||||
const char *format, ...);
|
||||
static void *esp_malloc_internal(size_t size);
|
||||
static void *esp_realloc_internal(void *ptr, size_t size);
|
||||
static void *esp_calloc_internal(size_t n, size_t size);
|
||||
@ -515,8 +520,8 @@ wifi_osi_funcs_t g_wifi_osi_funcs =
|
||||
._get_time = esp_get_time,
|
||||
._random = esp_random_ulong,
|
||||
._slowclk_cal_get = esp_clk_slowclk_cal_get_wrapper,
|
||||
._log_write = esp_log_write,
|
||||
._log_writev = esp_log_writev,
|
||||
._log_write = esp_log_write_wrapper,
|
||||
._log_writev = esp_log_writev_wrapper,
|
||||
._log_timestamp = esp_log_timestamp,
|
||||
._malloc_internal = esp_malloc_internal,
|
||||
._realloc_internal = esp_realloc_internal,
|
||||
@ -3245,7 +3250,7 @@ static uint32_t esp_clk_slowclk_cal_get_wrapper(void)
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Name: esp_log_writev
|
||||
* Name: esp_log_writev_wrapper
|
||||
*
|
||||
* Description:
|
||||
* Output log with by format string and its arguments
|
||||
@ -3261,34 +3266,29 @@ static uint32_t esp_clk_slowclk_cal_get_wrapper(void)
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
void esp_log_writev(uint32_t level, const char *tag,
|
||||
const char *format, va_list args)
|
||||
static void esp_log_writev_wrapper(uint32_t level, const char *tag,
|
||||
const char *format, va_list args)
|
||||
{
|
||||
switch (level)
|
||||
esp_log_level_t max_level;
|
||||
|
||||
#if defined (CONFIG_DEBUG_WIRELESS_INFO)
|
||||
max_level = ESP_LOG_VERBOSE;
|
||||
#elif defined (CONFIG_DEBUG_WIRELESS_WARN)
|
||||
max_level = ESP_LOG_WARN;
|
||||
#elif defined (CONFIG_DEBUG_WIRELESS_ERROR)
|
||||
max_level = ESP_LOG_ERROR;
|
||||
#else
|
||||
max_level = ESP_LOG_NONE;
|
||||
#endif
|
||||
|
||||
if (level <= max_level)
|
||||
{
|
||||
#ifdef CONFIG_DEBUG_WIRELESS_ERROR
|
||||
case ESP_LOG_ERROR:
|
||||
vsyslog(LOG_ERR, format, args);
|
||||
break;
|
||||
#endif
|
||||
#ifdef CONFIG_DEBUG_WIRELESS_WARN
|
||||
case ESP_LOG_WARN:
|
||||
vsyslog(LOG_WARNING, format, args);
|
||||
break;
|
||||
#endif
|
||||
#ifdef CONFIG_DEBUG_WIRELESS_INFO
|
||||
case ESP_LOG_INFO:
|
||||
vsyslog(LOG_INFO, format, args);
|
||||
break;
|
||||
default:
|
||||
vsyslog(LOG_DEBUG, format, args);
|
||||
break;
|
||||
#endif
|
||||
esp_log_writev(level, tag, format, args);
|
||||
}
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Name: esp_log_write
|
||||
* Name: esp_log_write_wrapper
|
||||
*
|
||||
* Description:
|
||||
* Output log with by format string and its arguments
|
||||
@ -3303,33 +3303,29 @@ void esp_log_writev(uint32_t level, const char *tag,
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
void esp_log_write(uint32_t level,
|
||||
const char *tag,
|
||||
const char *format, ...)
|
||||
static void esp_log_write_wrapper(uint32_t level,
|
||||
const char *tag,
|
||||
const char *format, ...)
|
||||
{
|
||||
va_list list;
|
||||
va_start(list, format);
|
||||
esp_log_writev(level, tag, format, list);
|
||||
va_end(list);
|
||||
}
|
||||
esp_log_level_t max_level;
|
||||
|
||||
/****************************************************************************
|
||||
* Name: esp_log_timestamp
|
||||
*
|
||||
* Description:
|
||||
* Get system time by millim second
|
||||
*
|
||||
* Input Parameters:
|
||||
* None
|
||||
*
|
||||
* Returned Value:
|
||||
* System time
|
||||
*
|
||||
****************************************************************************/
|
||||
#if defined (CONFIG_DEBUG_WIRELESS_INFO)
|
||||
max_level = ESP_LOG_VERBOSE;
|
||||
#elif defined (CONFIG_DEBUG_WIRELESS_WARN)
|
||||
max_level = ESP_LOG_WARN;
|
||||
#elif defined (CONFIG_DEBUG_WIRELESS_ERROR)
|
||||
max_level = ESP_LOG_ERROR;
|
||||
#else
|
||||
max_level = ESP_LOG_NONE;
|
||||
#endif
|
||||
|
||||
uint32_t esp_log_timestamp(void)
|
||||
{
|
||||
return (uint32_t)(esp_timer_get_time() / 1000);
|
||||
if (level <= max_level)
|
||||
{
|
||||
va_list list;
|
||||
va_start(list, format);
|
||||
esp_log_writev(level, tag, format, list);
|
||||
va_end(list);
|
||||
}
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
|
||||
95
arch/xtensa/src/esp32s3/hal.mk
Normal file
95
arch/xtensa/src/esp32s3/hal.mk
Normal file
@ -0,0 +1,95 @@
|
||||
############################################################################
|
||||
# arch/xtensa/src/esp32s3/hal.mk
|
||||
#
|
||||
# Licensed to the Apache Software Foundation (ASF) under one or more
|
||||
# contributor license agreements. See the NOTICE file distributed with
|
||||
# this work for additional information regarding copyright ownership. The
|
||||
# ASF licenses this file to you under the Apache License, Version 2.0 (the
|
||||
# "License"); you may not use this file except in compliance with the
|
||||
# License. You may obtain a copy of the License at
|
||||
#
|
||||
# http://www.apache.org/licenses/LICENSE-2.0
|
||||
#
|
||||
# Unless required by applicable law or agreed to in writing, software
|
||||
# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
|
||||
# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
|
||||
# License for the specific language governing permissions and limitations
|
||||
# under the License.
|
||||
#
|
||||
############################################################################
|
||||
|
||||
# Include header paths
|
||||
|
||||
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)bootloader_support$(DELIM)$(DELIM)include
|
||||
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)efuse$(DELIM)$(CHIP_SERIES)$(DELIM)include
|
||||
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)efuse$(DELIM)$(CHIP_SERIES)$(DELIM)private_include
|
||||
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)efuse$(DELIM)include
|
||||
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)efuse$(DELIM)private_include
|
||||
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_common$(DELIM)include
|
||||
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)include
|
||||
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)include$(DELIM)esp_private
|
||||
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)include$(DELIM)soc
|
||||
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)port$(DELIM)$(CHIP_SERIES)
|
||||
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)port$(DELIM)$(CHIP_SERIES)$(DELIM)private_include
|
||||
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)port$(DELIM)include
|
||||
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)$(CHIP_SERIES)
|
||||
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)include
|
||||
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)include$(DELIM)$(CHIP_SERIES)
|
||||
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_system$(DELIM)include
|
||||
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_system$(DELIM)port$(DELIM)include
|
||||
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_system$(DELIM)port$(DELIM)include$(DELIM)private
|
||||
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_system$(DELIM)port$(DELIM)public_compat
|
||||
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_timer$(DELIM)include
|
||||
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)$(CHIP_SERIES)$(DELIM)include
|
||||
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)include
|
||||
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)platform_port$(DELIM)include
|
||||
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)log
|
||||
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)log$(DELIM)include
|
||||
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)soc$(DELIM)$(CHIP_SERIES)$(DELIM)include
|
||||
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)soc$(DELIM)include
|
||||
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)xtensa$(DELIM)$(CHIP_SERIES)$(DELIM)include
|
||||
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)xtensa$(DELIM)include
|
||||
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)nuttx$(DELIM)$(CHIP_SERIES)$(DELIM)include
|
||||
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)nuttx$(DELIM)include
|
||||
|
||||
# Linker scripts
|
||||
|
||||
ARCHSCRIPT += $(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)$(CHIP_SERIES)$(DELIM)ld$(DELIM)$(CHIP_SERIES).rom.api.ld
|
||||
ARCHSCRIPT += $(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)$(CHIP_SERIES)$(DELIM)ld$(DELIM)$(CHIP_SERIES).rom.ld
|
||||
ARCHSCRIPT += $(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)soc$(DELIM)$(CHIP_SERIES)$(DELIM)ld$(DELIM)$(CHIP_SERIES).peripherals.ld
|
||||
|
||||
# Source files
|
||||
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)clk_ctrl_os.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)cpu.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)esp_clk.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)hw_random.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)periph_ctrl.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)port$(DELIM)$(CHIP_SERIES)$(DELIM)cpu_region_protect.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)port$(DELIM)$(CHIP_SERIES)$(DELIM)esp_clk_tree.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)port$(DELIM)$(CHIP_SERIES)$(DELIM)rtc_clk.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)port$(DELIM)$(CHIP_SERIES)$(DELIM)rtc_time.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)port$(DELIM)esp_clk_tree_common.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)regi2c_ctrl.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)patches$(DELIM)esp_rom_wdt.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_system$(DELIM)port$(DELIM)soc$(DELIM)$(CHIP_SERIES)$(DELIM)clk.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_system$(DELIM)port$(DELIM)soc$(DELIM)$(CHIP_SERIES)$(DELIM)system_internal.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)$(CHIP_SERIES)$(DELIM)clk_tree_hal.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)$(CHIP_SERIES)$(DELIM)efuse_hal.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)brownout_hal.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)efuse_hal.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)gpio_hal.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)ledc_hal_iram.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)ledc_hal.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)rmt_hal.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)timer_hal_iram.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)timer_hal.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)uart_hal_iram.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)uart_hal.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)log$(DELIM)log_noos.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)log$(DELIM)log.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)soc$(DELIM)$(CHIP_SERIES)$(DELIM)gpio_periph.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)soc$(DELIM)$(CHIP_SERIES)$(DELIM)ledc_periph.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)soc$(DELIM)$(CHIP_SERIES)$(DELIM)rmt_periph.c
|
||||
|
||||
CFLAGS += ${DEFINE_PREFIX}ESP_PLATFORM=1
|
||||
@ -129,7 +129,7 @@ static void lan9250_enable(const struct lan9250_lower_s *lower)
|
||||
|
||||
/* Configure the interrupt for rising and falling edges */
|
||||
|
||||
esp32s3_gpioirqenable(irq, GPIO_INTR_LOW_LEVEL);
|
||||
esp32s3_gpioirqenable(irq, ONLOW);
|
||||
ninfo("Enable the interrupt\n");
|
||||
}
|
||||
|
||||
|
||||
@ -151,7 +151,7 @@ int board_button_irq(int id, xcpt_t irqhandler, void *arg)
|
||||
|
||||
/* Configure the interrupt for rising and falling edges */
|
||||
|
||||
esp32s3_gpioirqenable(irq, GPIO_INTR_ANYEDGE);
|
||||
esp32s3_gpioirqenable(irq, CHANGE);
|
||||
}
|
||||
else
|
||||
{
|
||||
|
||||
@ -151,7 +151,7 @@ int board_button_irq(int id, xcpt_t irqhandler, void *arg)
|
||||
|
||||
/* Configure the interrupt for rising and falling edges */
|
||||
|
||||
esp32s3_gpioirqenable(irq, GPIO_INTR_ANYEDGE);
|
||||
esp32s3_gpioirqenable(irq, CHANGE);
|
||||
}
|
||||
else
|
||||
{
|
||||
|
||||
@ -232,7 +232,7 @@ static void djoy_enable(const struct djoy_lowerhalf_s *lower,
|
||||
|
||||
if (falling != 0 && rising != 0)
|
||||
{
|
||||
esp32s3_gpioirqenable(irq, GPIO_INTR_ANYEDGE);
|
||||
esp32s3_gpioirqenable(irq, CHANGE);
|
||||
}
|
||||
else if (falling != 0)
|
||||
{
|
||||
@ -240,7 +240,7 @@ static void djoy_enable(const struct djoy_lowerhalf_s *lower,
|
||||
}
|
||||
else
|
||||
{
|
||||
esp32s3_gpioirqenable(irq, GPIO_INTR_POSEDGE);
|
||||
esp32s3_gpioirqenable(irq, RISING);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
@ -300,7 +300,7 @@ static int gpint_enable(struct gpio_dev_s *dev, bool enable)
|
||||
|
||||
/* Configure the interrupt for rising edge */
|
||||
|
||||
esp32s3_gpioirqenable(irq, GPIO_INTR_POSEDGE);
|
||||
esp32s3_gpioirqenable(irq, RISING);
|
||||
}
|
||||
}
|
||||
else
|
||||
|
||||
@ -151,7 +151,7 @@ int board_button_irq(int id, xcpt_t irqhandler, void *arg)
|
||||
|
||||
/* Configure the interrupt for rising and falling edges */
|
||||
|
||||
esp32s3_gpioirqenable(irq, GPIO_INTR_ANYEDGE);
|
||||
esp32s3_gpioirqenable(irq, CHANGE);
|
||||
}
|
||||
else
|
||||
{
|
||||
|
||||
@ -297,7 +297,7 @@ static int gpint_enable(struct gpio_dev_s *dev, bool enable)
|
||||
|
||||
/* Configure the interrupt for rising edge */
|
||||
|
||||
esp32s3_gpioirqenable(irq, GPIO_INTR_POSEDGE);
|
||||
esp32s3_gpioirqenable(irq, RISING);
|
||||
}
|
||||
}
|
||||
else
|
||||
|
||||
@ -151,7 +151,7 @@ int board_button_irq(int id, xcpt_t irqhandler, void *arg)
|
||||
|
||||
/* Configure the interrupt for rising and falling edges */
|
||||
|
||||
esp32s3_gpioirqenable(irq, GPIO_INTR_ANYEDGE);
|
||||
esp32s3_gpioirqenable(irq, CHANGE);
|
||||
}
|
||||
else
|
||||
{
|
||||
|
||||
Loading…
x
Reference in New Issue
Block a user