xtensa/esp32s3: Add support to Generic DMA
This commit is contained in:
Alan Carvalho de Assis
Gustavo Henrique Nihei
parent
b1c72c023c
commit
1cb3c0d630
@ -337,6 +337,11 @@ config ESP32S3_SPI3
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select ESP32S3_SPI
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select SPI
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config ESP32S3_DMA
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bool "General DMA (GDMA)"
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default n
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select ARCH_DMA
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config ESP32S3_UART0
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bool "UART 0"
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default n
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@ -74,6 +74,10 @@ ifeq ($(CONFIG_ESP32S3_FREERUN),y)
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CHIP_CSRCS += esp32s3_freerun.c
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endif
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ifeq ($(CONFIG_ESP32S3_DMA),y)
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CHIP_CSRCS += esp32s3_dma.c
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endif
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ifeq ($(CONFIG_ESP32S3_RT_TIMER),y)
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CHIP_CSRCS += esp32s3_rt_timer.c
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endif
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380
arch/xtensa/src/esp32s3/esp32s3_dma.c
Normal file
380
arch/xtensa/src/esp32s3/esp32s3_dma.c
Normal file
@ -0,0 +1,380 @@
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/****************************************************************************
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* arch/xtensa/src/esp32s3/esp32s3_dma.c
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*
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* Licensed to the Apache Software Foundation (ASF) under one or more
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* contributor license agreements. See the NOTICE file distributed with
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* this work for additional information regarding copyright ownership. The
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* ASF licenses this file to you under the Apache License, Version 2.0 (the
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* "License"); you may not use this file except in compliance with the
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* License. You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
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* License for the specific language governing permissions and limitations
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* under the License.
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*
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****************************************************************************/
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/config.h>
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#include <sys/types.h>
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#include <stdint.h>
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#include <string.h>
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#include <assert.h>
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#include <debug.h>
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#include <nuttx/arch.h>
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#include <nuttx/irq.h>
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#include <nuttx/kmalloc.h>
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#include <arch/irq.h>
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#include "xtensa.h"
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#include "esp32s3_dma.h"
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#include "hardware/esp32s3_dma.h"
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#include "hardware/esp32s3_soc.h"
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#include "hardware/esp32s3_system.h"
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/****************************************************************************
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* Pre-processor Macros
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****************************************************************************/
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#define REG_OFF (DMA_OUT_CONF0_CH1_REG - DMA_OUT_CONF0_CH0_REG)
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#define SET_REG(_r, _ch, _v) putreg32((_v), (_r) + (_ch) * REG_OFF)
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#define GET_REG(_r, _ch) getreg32((_r) + (_ch) * REG_OFF)
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#define SET_BITS(_r, _ch, _b) modifyreg32((_r) + (_ch) * REG_OFF, 0, (_b))
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#define CLR_BITS(_r, _ch, _b) modifyreg32((_r) + (_ch) * REG_OFF, (_b), 0)
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#ifndef MIN
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# define MIN(a, b) (((a) < (b)) ? (a) : (b))
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#endif
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#ifndef ALIGN_UP
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# define ALIGN_UP(num, align) (((num) + ((align) - 1)) & ~((align) - 1))
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#endif
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/****************************************************************************
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* Private Data
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****************************************************************************/
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static bool g_dma_chan_used[ESP32S3_DMA_CHAN_MAX];
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static sem_t g_dma_exc_sem = SEM_INITIALIZER(1);
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/****************************************************************************
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* Public Functions
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****************************************************************************/
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/****************************************************************************
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* Name: esp32s3_dma_request
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*
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* Description:
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* Request DMA channel and config it with given parameters.
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*
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* Input Parameters:
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* periph - Peripheral for which the DMA channel request was made
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* tx_prio - Interrupt priority
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* rx_prio - Interrupt flags
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* burst_en - Enable burst transmission
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*
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* Returned Value:
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* DMA channel number (>=0) if success or -1 if fail.
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*
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****************************************************************************/
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int32_t esp32s3_dma_request(enum esp32s3_dma_periph_e periph,
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uint32_t tx_prio,
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uint32_t rx_prio,
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bool burst_en)
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{
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int chan;
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DEBUGASSERT(periph < ESP32S3_DMA_PERIPH_NUM);
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DEBUGASSERT(tx_prio <= ESP32S3_DMA_TX_PRIO_MAX);
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DEBUGASSERT(rx_prio <= ESP32S3_DMA_RX_PRIO_MAX);
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dmainfo("periph=%" PRIu32 " tx_prio=%" PRIu32 " rx_prio=%" PRIu32 "\n",
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(uint32_t)periph, tx_prio, rx_prio);
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nxsem_wait_uninterruptible(&g_dma_exc_sem);
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for (chan = 0; chan < ESP32S3_DMA_CHAN_MAX; chan++)
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{
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if (!g_dma_chan_used[chan])
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{
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g_dma_chan_used[chan] = true;
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break;
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}
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}
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if (chan == ESP32S3_DMA_CHAN_MAX)
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{
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dmaerr("No available GDMA channel for allocation\n");
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nxsem_post(&g_dma_exc_sem);
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return ERROR;
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}
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dmainfo("Allocated channel=%d\n", chan);
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if (periph == ESP32S3_DMA_PERIPH_MEM)
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{
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/* Enable DMA channel M2M mode */
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SET_BITS(DMA_IN_CONF0_CH0_REG, chan, DMA_MEM_TRANS_EN_CH0_M);
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/* Just setting a valid value to the register */
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SET_REG(DMA_OUT_PERI_SEL_CH0_REG, chan, 0);
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SET_REG(DMA_IN_PERI_SEL_CH0_REG, chan, 0);
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}
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else
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{
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/* Disable DMA channel M2M mode */
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CLR_BITS(DMA_IN_CONF0_CH0_REG, chan, DMA_MEM_TRANS_EN_CH0_M);
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/* Connect DMA TX/RX channels to a given peripheral */
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SET_REG(DMA_OUT_PERI_SEL_CH0_REG, chan, periph);
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SET_REG(DMA_IN_PERI_SEL_CH0_REG, chan, periph);
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}
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if (burst_en)
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{
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/* Enable DMA TX/RX channels burst sending data */
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SET_BITS(DMA_OUT_CONF0_CH0_REG, chan, DMA_OUT_DATA_BURST_EN_CH0_M);
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SET_BITS(DMA_IN_CONF0_CH0_REG, chan, DMA_IN_DATA_BURST_EN_CH0_M);
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/* Enable DMA TX/RX channels burst reading descriptor link */
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SET_BITS(DMA_OUT_CONF0_CH0_REG, chan, DMA_OUTDSCR_BURST_EN_CH0_M);
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SET_BITS(DMA_IN_CONF0_CH0_REG, chan, DMA_INDSCR_BURST_EN_CH0_M);
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}
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/* Set priority for DMA TX/RX channels */
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SET_REG(DMA_OUT_PRI_CH0_REG, chan, tx_prio);
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SET_REG(DMA_IN_PRI_CH0_REG, chan, rx_prio);
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nxsem_post(&g_dma_exc_sem);
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return chan;
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}
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/****************************************************************************
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* Name: esp32s3_dma_setup
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*
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* Description:
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* Set up DMA descriptor with given parameters.
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*
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* Input Parameters:
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* chan - DMA channel
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* tx - true: TX mode; false: RX mode
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* dmadesc - DMA descriptor pointer
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* num - DMA descriptor number
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* pbuf - Buffer pointer
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* len - Buffer length by byte
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*
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* Returned Value:
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* Bind pbuf data bytes.
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*
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****************************************************************************/
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uint32_t esp32s3_dma_setup(int chan, bool tx,
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struct esp32s3_dmadesc_s *dmadesc, uint32_t num,
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uint8_t *pbuf, uint32_t len)
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{
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int i;
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uint32_t regval;
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uint32_t bytes = len;
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uint8_t *pdata = pbuf;
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uint32_t data_len;
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uint32_t buf_len;
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DEBUGASSERT(chan >= 0);
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DEBUGASSERT(dmadesc != NULL);
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DEBUGASSERT(num > 0);
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DEBUGASSERT(pbuf != NULL);
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DEBUGASSERT(len > 0);
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for (i = 0; i < num; i++)
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{
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data_len = MIN(bytes, ESP32S3_DMA_BUFLEN_MAX);
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/* Buffer length must be rounded to next 32-bit boundary. */
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buf_len = ALIGN_UP(data_len, sizeof(uintptr_t));
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dmadesc[i].ctrl = (data_len << ESP32S3_DMA_CTRL_DATALEN_S) |
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(buf_len << ESP32S3_DMA_CTRL_BUFLEN_S) |
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ESP32S3_DMA_CTRL_OWN;
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dmadesc[i].pbuf = pdata;
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dmadesc[i].next = &dmadesc[i + 1];
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bytes -= data_len;
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if (bytes == 0)
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{
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break;
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}
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pdata += data_len;
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}
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dmadesc[i].ctrl |= ESP32S3_DMA_CTRL_EOF;
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dmadesc[i].next = NULL;
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if (tx)
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{
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/* Reset DMA TX channel FSM and FIFO pointer */
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SET_BITS(DMA_OUT_CONF0_CH0_REG, chan, DMA_OUT_RST_CH0_M);
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CLR_BITS(DMA_OUT_CONF0_CH0_REG, chan, DMA_OUT_RST_CH0_M);
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/* Set the descriptor link base address for TX channel */
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regval = (uint32_t)dmadesc & DMA_OUTLINK_ADDR_CH0;
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SET_BITS(DMA_OUT_LINK_CH0_REG, chan, regval);
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}
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else
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{
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/* Reset DMA RX channel FSM and FIFO pointer */
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SET_BITS(DMA_IN_CONF0_CH0_REG, chan, DMA_IN_RST_CH0_M);
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CLR_BITS(DMA_IN_CONF0_CH0_REG, chan, DMA_IN_RST_CH0_M);
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/* Set the descriptor link base address for RX channel */
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regval = (uint32_t)dmadesc & DMA_INLINK_ADDR_CH0;
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SET_BITS(DMA_IN_LINK_CH0_REG, chan, regval);
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}
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return len - bytes;
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}
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/****************************************************************************
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* Name: esp32s3_dma_enable
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*
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* Description:
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* Enable DMA channel transmission.
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*
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* Input Parameters:
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* chan - DMA channel
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* tx - true: TX mode; false: RX mode
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*
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* Returned Value:
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* None.
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*
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****************************************************************************/
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void esp32s3_dma_enable(int chan, bool tx)
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{
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if (tx)
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{
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SET_BITS(DMA_OUT_LINK_CH0_REG, chan, DMA_OUTLINK_START_CH0_M);
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}
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else
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{
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SET_BITS(DMA_IN_LINK_CH0_REG, chan, DMA_INLINK_START_CH0_M);
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}
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}
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/****************************************************************************
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* Name: esp32s3_dma_disable
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*
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* Description:
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* Disable DMA channel transmission.
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*
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* Input Parameters:
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* chan - DMA channel
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* tx - true: TX mode; false: RX mode
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*
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* Returned Value:
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* None.
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*
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****************************************************************************/
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void esp32s3_dma_disable(int chan, bool tx)
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{
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if (tx)
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{
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SET_BITS(DMA_OUT_LINK_CH0_REG, chan, DMA_OUTLINK_STOP_CH0_M);
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}
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else
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{
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SET_BITS(DMA_IN_LINK_CH0_REG, chan, DMA_INLINK_STOP_CH0_M);
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}
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}
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/****************************************************************************
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* Name: esp32s3_dma_wait_idle
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*
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* Description:
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* Wait until transmission ends.
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*
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* Input Parameters:
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* chan - DMA channel
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* tx - true: TX mode; false: RX mode
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*
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* Returned Value:
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* None.
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*
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****************************************************************************/
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void esp32s3_dma_wait_idle(int chan, bool tx)
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{
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uint32_t regval;
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uint32_t regaddr;
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uint32_t waitbits;
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if (tx)
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{
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regaddr = DMA_OUT_LINK_CH0_REG + chan * REG_OFF;
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waitbits = DMA_OUTLINK_PARK_CH0;
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}
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else
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{
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regaddr = DMA_IN_LINK_CH0_REG + chan * REG_OFF;
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waitbits = DMA_INLINK_PARK_CH0;
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}
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do
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{
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regval = getreg32(regaddr);
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}
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while ((waitbits & regval) == 0);
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}
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/****************************************************************************
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* Name: esp32s3_dma_init
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*
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* Description:
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* Initialize DMA driver.
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*
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* Input Parameters:
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* None
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*
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* Returned Value:
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* None.
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*
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****************************************************************************/
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void esp32s3_dma_init(void)
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{
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modifyreg32(SYSTEM_PERIP_CLK_EN1_REG, 0, SYSTEM_DMA_CLK_EN_M);
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modifyreg32(SYSTEM_PERIP_RST_EN1_REG, SYSTEM_DMA_RST_M, 0);
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modifyreg32(DMA_MISC_CONF_REG, 0, DMA_CLK_EN_M);
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}
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227
arch/xtensa/src/esp32s3/esp32s3_dma.h
Normal file
227
arch/xtensa/src/esp32s3/esp32s3_dma.h
Normal file
@ -0,0 +1,227 @@
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/****************************************************************************
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* arch/xtensa/src/esp32s3/esp32s3_dma.h
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*
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* Licensed to the Apache Software Foundation (ASF) under one or more
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* contributor license agreements. See the NOTICE file distributed with
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* this work for additional information regarding copyright ownership. The
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* ASF licenses this file to you under the Apache License, Version 2.0 (the
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* "License"); you may not use this file except in compliance with the
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* License. You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
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* License for the specific language governing permissions and limitations
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* under the License.
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*
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****************************************************************************/
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#ifndef __ARCH_XTENSA_SRC_ESP32S3_ESP32S3_DMA_H
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#define __ARCH_XTENSA_SRC_ESP32S3_ESP32S3_DMA_H
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#include <nuttx/config.h>
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#include <stdbool.h>
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#include <stdint.h>
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#ifndef __ASSEMBLY__
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#undef EXTERN
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#if defined(__cplusplus)
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#define EXTERN extern "C"
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extern "C"
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{
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#else
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#define EXTERN extern
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#endif
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/****************************************************************************
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* Pre-processor Macros
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****************************************************************************/
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/* DMA max data length */
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#define ESP32S3_DMA_DATALEN_MAX (0x1000 - 4)
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/* DMA max buffer length */
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#define ESP32S3_DMA_BUFLEN_MAX ESP32S3_DMA_DATALEN_MAX
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/* DMA channel number */
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#define ESP32S3_DMA_CHAN_MAX (3)
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/* DMA RX MAX priority */
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#define ESP32S3_DMA_RX_PRIO_MAX (15)
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/* DMA TX MAX priority */
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#define ESP32S3_DMA_TX_PRIO_MAX (15)
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/* DMA descriptor */
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#define ESP32S3_DMA_CTRL_OWN (1 << 31) /* Owned by DMA */
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#define ESP32S3_DMA_CTRL_EOF (1 << 30) /* End of frame */
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#define ESP32S3_DMA_CTRL_ERREOF (1 << 28) /* Received data error */
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#define ESP32S3_DMA_CTRL_DATALEN_S (12) /* Data length shift */
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#define ESP32S3_DMA_CTRL_DATALEN_V (0xfff) /* Data length value */
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#define ESP32S3_DMA_CTRL_BUFLEN_S (0) /* Buffer length shift */
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#define ESP32S3_DMA_CTRL_BUFLEN_V (0xfff) /* Buffer length value */
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/****************************************************************************
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* Public Types
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****************************************************************************/
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enum esp32s3_dma_periph_e
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{
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ESP32S3_DMA_PERIPH_MEM = -1,
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ESP32S3_DMA_PERIPH_SPI2 = 0,
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ESP32S3_DMA_PERIPH_SPI3 = 1,
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ESP32S3_DMA_PERIPH_UCHI0 = 2,
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ESP32S3_DMA_PERIPH_I2S0 = 3,
|
||||
ESP32S3_DMA_PERIPH_I2S1 = 4,
|
||||
ESP32S3_DMA_PERIPH_LCDCAM = 5,
|
||||
ESP32S3_DMA_PERIPH_AES = 6,
|
||||
ESP32S3_DMA_PERIPH_SHA = 7,
|
||||
ESP32S3_DMA_PERIPH_ADC = 8,
|
||||
ESP32S3_DMA_PERIPH_RMT = 9,
|
||||
ESP32S3_DMA_PERIPH_NUM,
|
||||
};
|
||||
|
||||
/* DMA descriptor type */
|
||||
|
||||
struct esp32s3_dmadesc_s
|
||||
{
|
||||
uint32_t ctrl; /* DMA control block */
|
||||
const uint8_t *pbuf; /* DMA TX/RX buffer address */
|
||||
struct esp32s3_dmadesc_s *next; /* Next DMA descriptor address */
|
||||
};
|
||||
|
||||
/****************************************************************************
|
||||
* Public Function Prototypes
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Name: esp32s3_dma_request
|
||||
*
|
||||
* Description:
|
||||
* Request DMA channel and config it with given parameters.
|
||||
*
|
||||
* Input Parameters:
|
||||
* periph - Peripheral for which the DMA channel request was made
|
||||
* tx_prio - Interrupt priority
|
||||
* rx_prio - Interrupt flags
|
||||
*
|
||||
* Returned Value:
|
||||
* DMA channel number (>=0) if success or -1 if fail.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
int32_t esp32s3_dma_request(enum esp32s3_dma_periph_e periph,
|
||||
uint32_t tx_prio,
|
||||
uint32_t rx_prio,
|
||||
bool burst_en);
|
||||
|
||||
/****************************************************************************
|
||||
* Name: esp32s3_dma_setup
|
||||
*
|
||||
* Description:
|
||||
* Set up DMA descriptor with given parameters.
|
||||
*
|
||||
* Input Parameters:
|
||||
* chan - DMA channel
|
||||
* tx - true: TX mode; false: RX mode
|
||||
* dmadesc - DMA descriptor pointer
|
||||
* num - DMA descriptor number
|
||||
* pbuf - Buffer pointer
|
||||
* len - Buffer length by byte
|
||||
*
|
||||
* Returned Value:
|
||||
* Bind pbuf data bytes.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
uint32_t esp32s3_dma_setup(int chan, bool tx,
|
||||
struct esp32s3_dmadesc_s *dmadesc, uint32_t num,
|
||||
uint8_t *pbuf, uint32_t len);
|
||||
|
||||
/****************************************************************************
|
||||
* Name: esp32s3_dma_enable
|
||||
*
|
||||
* Description:
|
||||
* Enable DMA channel transmission.
|
||||
*
|
||||
* Input Parameters:
|
||||
* chan - DMA channel
|
||||
* tx - true: TX mode; false: RX mode
|
||||
*
|
||||
* Returned Value:
|
||||
* None.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
void esp32s3_dma_enable(int chan, bool tx);
|
||||
|
||||
/****************************************************************************
|
||||
* Name: esp32s3_dma_disable
|
||||
*
|
||||
* Description:
|
||||
* Disable DMA channel transmission.
|
||||
*
|
||||
* Input Parameters:
|
||||
* chan - DMA channel
|
||||
* tx - true: TX mode; false: RX mode
|
||||
*
|
||||
* Returned Value:
|
||||
* None.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
void esp32s3_dma_disable(int chan, bool tx);
|
||||
|
||||
/****************************************************************************
|
||||
* Name: esp32s3_dma_wait_idle
|
||||
*
|
||||
* Description:
|
||||
* Wait until transmission ends.
|
||||
*
|
||||
* Input Parameters:
|
||||
* chan - DMA channel
|
||||
* tx - true: TX mode; false: RX mode
|
||||
*
|
||||
* Returned Value:
|
||||
* None.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
void esp32s3_dma_wait_idle(int chan, bool tx);
|
||||
|
||||
/****************************************************************************
|
||||
* Name: esp32s3_dma_init
|
||||
*
|
||||
* Description:
|
||||
* Initialize DMA driver.
|
||||
*
|
||||
* Input Parameters:
|
||||
* None
|
||||
*
|
||||
* Returned Value:
|
||||
* None.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
void esp32s3_dma_init(void);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
#undef EXTERN
|
||||
|
||||
#endif /* __ASSEMBLY__ */
|
||||
#endif /* __ARCH_XTENSA_SRC_ESP32S3_ESP32S3_DMA_H */
|
||||
8666
arch/xtensa/src/esp32s3/hardware/esp32s3_dma.h
Normal file
8666
arch/xtensa/src/esp32s3/hardware/esp32s3_dma.h
Normal file
File diff suppressed because it is too large
Load Diff
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Reference in New Issue
Block a user