SAMA5 PCK: Add Main clock as an option for the PCK clock source
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@ -161,6 +161,7 @@
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/* Resulting frequencies */
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#define BOARD_MAINCK_FREQUENCY BOARD_MAINOSC_FREQUENCY
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#define BOARD_PLLA_FREQUENCY (768000000) /* PLLACK: 64 * 12Mhz / 1 */
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#define BOARD_PCK_FREQUENCY (384000000) /* CPU: PLLACK / 2 / 1 */
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#define BOARD_MCK_FREQUENCY (128000000) /* MCK: PLLACK / 2 / 1 / 3 */
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@ -119,6 +119,7 @@
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/* Resulting frequencies */
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#define BOARD_MAINCK_FREQUENCY BOARD_MAINOSC_FREQUENCY
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#define BOARD_PLLA_FREQUENCY (792000000) /* PLLACK: 66 * 12Mhz / 1 */
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#define BOARD_PCK_FREQUENCY (396000000) /* CPU: PLLACK / 2 / 1 */
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#define BOARD_MCK_FREQUENCY (132000000) /* MCK: PLLACK / 2 / 1 / 3 */
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@ -118,6 +118,7 @@
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/* Resulting frequencies */
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#define BOARD_MAINCK_FREQUENCY BOARD_MAINOSC_FREQUENCY
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#define BOARD_PLLA_FREQUENCY (528000000) /* PLLACK: 44 * 12Mhz / 1 */
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#define BOARD_PCK_FREQUENCY (528000000) /* CPU: PLLACK / 1 / 1 */
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#define BOARD_MCK_FREQUENCY (132000000) /* MCK: PLLACK / 1 / 1 / 4 */
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@ -57,6 +57,7 @@
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* the Main clock source in the on-board 12MHz crystal.
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*/
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#define BOARD_MAINCK_FREQUENCY BOARD_MAINOSC_FREQUENCY
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#define BOARD_PLLA_FREQUENCY (sam_pllack_frequency(BOARD_MAINOSC_FREQUENCY))
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#define BOARD_PLLADIV2_FREQUENCY (sam_plladiv2_frequency(BOARD_MAINOSC_FREQUENCY))
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#define BOARD_PCK_FREQUENCY (sam_pck_frequency(BOARD_MAINOSC_FREQUENCY))
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@ -161,6 +161,7 @@
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/* Resulting frequencies */
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#define BOARD_MAINCK_FREQUENCY BOARD_MAINOSC_FREQUENCY
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#define BOARD_PLLA_FREQUENCY (768000000) /* PLLACK: 64 * 12Mhz / 1 */
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#define BOARD_PCK_FREQUENCY (384000000) /* CPU: PLLACK / 2 / 1 */
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#define BOARD_MCK_FREQUENCY (128000000) /* MCK: PLLACK / 2 / 1 / 3 */
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@ -119,6 +119,7 @@
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/* Resulting frequencies */
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#define BOARD_MAINCK_FREQUENCY BOARD_MAINOSC_FREQUENCY
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#define BOARD_PLLA_FREQUENCY (792000000) /* PLLACK: 66 * 12Mhz / 1 */
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#define BOARD_PCK_FREQUENCY (396000000) /* CPU: PLLACK / 2 / 1 */
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#define BOARD_MCK_FREQUENCY (132000000) /* MCK: PLLACK / 2 / 1 / 3 */
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@ -118,6 +118,7 @@
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/* Resulting frequencies */
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#define BOARD_MAINCK_FREQUENCY BOARD_MAINOSC_FREQUENCY
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#define BOARD_PLLA_FREQUENCY (528000000) /* PLLACK: 44 * 12Mhz / 1 */
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#define BOARD_PCK_FREQUENCY (528000000) /* CPU: PLLACK / 1 / 1 */
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#define BOARD_MCK_FREQUENCY (132000000) /* MCK: PLLACK / 1 / 1 / 4 */
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@ -57,6 +57,7 @@
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* the Main clock source in the on-board 12MHz crystal.
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*/
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#define BOARD_MAINCK_FREQUENCY BOARD_MAINOSC_FREQUENCY
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#define BOARD_PLLA_FREQUENCY (sam_pllack_frequency(BOARD_MAINOSC_FREQUENCY))
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#define BOARD_PLLADIV2_FREQUENCY (sam_plladiv2_frequency(BOARD_MAINOSC_FREQUENCY))
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#define BOARD_PCK_FREQUENCY (sam_pck_frequency(BOARD_MAINOSC_FREQUENCY))
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@ -159,6 +159,7 @@
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/* Resulting frequencies */
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#define BOARD_MAINCK_FREQUENCY BOARD_MAINOSC_FREQUENCY
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#define BOARD_PLLA_FREQUENCY (768000000) /* PLLACK: 64 * 12Mhz / 1 */
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#define BOARD_PCK_FREQUENCY (384000000) /* CPU: PLLACK / 2 / 1 */
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#define BOARD_MCK_FREQUENCY (128000000) /* MCK: PLLACK / 2 / 1 / 3 */
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@ -117,6 +117,7 @@
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/* Resulting frequencies */
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#define BOARD_MAINCK_FREQUENCY BOARD_MAINOSC_FREQUENCY
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#define BOARD_PLLA_FREQUENCY (792000000) /* PLLACK: 66 * 12Mhz / 1 */
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#define BOARD_PCK_FREQUENCY (396000000) /* CPU: PLLACK / 2 / 1 */
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#define BOARD_MCK_FREQUENCY (132000000) /* MCK: PLLACK / 2 / 1 / 3 */
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@ -116,6 +116,7 @@
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/* Resulting frequencies */
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#define BOARD_MAINCK_FREQUENCY BOARD_MAINOSC_FREQUENCY
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#define BOARD_PLLA_FREQUENCY (528000000) /* PLLACK: 44 * 12Mhz / 1 */
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#define BOARD_PCK_FREQUENCY (528000000) /* CPU: PLLACK / 1 / 1 */
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#define BOARD_MCK_FREQUENCY (132000000) /* MCK: PLLACK / 1 / 1 / 4 */
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@ -57,6 +57,7 @@
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* the Main clock source in the on-board 12MHz crystal.
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*/
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#define BOARD_MAINCK_FREQUENCY BOARD_MAINOSC_FREQUENCY
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#define BOARD_PLLA_FREQUENCY (sam_pllack_frequency(BOARD_MAINOSC_FREQUENCY))
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#define BOARD_PLLADIV2_FREQUENCY (sam_plladiv2_frequency(BOARD_MAINOSC_FREQUENCY))
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#define BOARD_PCK_FREQUENCY (sam_pck_frequency(BOARD_MAINOSC_FREQUENCY))
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