arch/arm/src/stm32h7: Make flash program size configurable
Signed-off-by: Jukka Laitinen <jukka.laitinen@intel.com>
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@ -297,6 +297,20 @@ config STM32H7_FLASH_OVERRIDE_I
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endchoice # "Override Flash Size Designator"
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config STM32H7_FLASH_CR_PSIZE
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int "Flash program size width"
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depends on ARCH_CHIP_STM32H7
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default 3
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range 0 3
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---help---
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On some hardware the fastest 64 bit wide flash writes cause too
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high power consumption which may compromize the system stability.
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This option can be used to reduce the program size. The options are:
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0: 8 bits
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1: 16 bits
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2: 32 bits
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3: 64 bits (default)
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config STM32H7_AXI_SRAM_CORRUPTION_WAR
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bool "Errata 2.2.9 Reading from AXI SRAM data read corruption Workaround"
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default y
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@ -140,6 +140,12 @@
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#endif
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#ifndef CONFIG_STM32H7_FLASH_CR_PSIZE
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#define FLASH_CR_PSIZE FLASH_CR_PSIZE_X64
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#else
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#define FLASH_CR_PSIZE (CONFIG_STM32H7_FLASH_CR_PSIZE << FLASH_CR_PSIZE_SHIFT)
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#endif
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#define FLASH_KEY1 0x45670123
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#define FLASH_KEY2 0xcdef89ab
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#define FLASH_OPTKEY1 0x08192a3b
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@ -871,7 +877,7 @@ ssize_t up_progmem_write(size_t addr, const void *buf, size_t count)
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stm32h7_unlock_flash(priv);
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stm32h7_flash_modifyreg32(priv, STM32_FLASH_CR1_OFFSET,
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FLASH_CR_PSIZE_MASK, FLASH_CR_PSIZE_X32);
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FLASH_CR_PSIZE_MASK, FLASH_CR_PSIZE);
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stm32h7_flash_modifyreg32(priv, STM32_FLASH_CR1_OFFSET, 0, FLASH_CR_PG);
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