Minor RISC-V update

arch/risc-v/Kconfig

@@ -10,10 +10,9 @@ choice
 	prompt "RISC-V chip selection"
 	default ARCH_CHIP_NR5M100
 
-config ARCH_CHIP_NR5M100
-	bool "NEXT NanoRisc5 M100"
+config ARCH_CHIP_NR5
+	bool "NEXT NanoRisc5"
 	select ARCH_RV32IM
-	default ARCH_CHIP_NR5
 	---help---
 		NEXT RISC-V NR5Mxx architectures (RISC-V RV32IM cores).
 
@@ -48,7 +47,7 @@ config NR5_MPU
 if ARCH_RV32IM
 source arch/risc-v/src/rv32im/Kconfig
 endif
-if ARCH_CHIP_NR5M100
+if ARCH_CHIP_NR5
 source arch/risc-v/src/nr5m100/Kconfig
 endif
 

arch/risc-v/src/nr5m100/nr5_csr.S

@@ -1,5 +1,5 @@
 /************************************************************************************
- * arch/risc-v/src/nr5m100/nr5_csr.c
+ * arch/risc-v/src/nr5m100/nr5_csr.S
  *
  *   Copyright (C) 2016 Ken Pettit. All rights reserved.
  *   Author: Ken Pettit <pettitkd@gmail.com>

arch/risc-v/src/nr5m100/nr5_head.S

@@ -175,10 +175,6 @@ __start:
 #endif
 	bltu	t0, t1, 1b
 
-	/* Call the nr5_init_array routine to initialize C variables  */
-
-	//call __nr5_init_array
-
 	lw		a0, 0(sp)				# a0 = argc
 	addi	a1, sp, _RISCV_SZPTR/8	# a1 = argv
 	li		a2, 0					# a2 = envp = NULL

configs/nr5m100-nexys4/include/board.h

@@ -64,8 +64,6 @@
 #define NR5_HCLK_FREQUENCY      100000000ul
 #define NR5_SCLK_FREQUENCY      100000000ul
 
-//#define STM32_SYSCLK_FREQUENCY  168000000ul
-
 /* Timer Frequencies are the same as the HCLK frequency
  */
 

configs/nr5m100-nexys4/scripts/nr5m1xx.cfg

@@ -52,7 +52,7 @@ if { [info exists ENDIAN] } {
 if { [info exists CPUTAPID] } {
    set _CPUTAPID $CPUTAPID
 } else {
-   set _CPUTAPID 0x1f40092d
+   set _CPUTAPID 0x17a1092d
 }
 
 jtag newtap $_CHIPNAME cpu -irlen 5 -ircapture 0x5 -irmask 0x1f -expected-id $_CPUTAPID