From 1ec70bc704c49bd3608017c5219d3dfc3d934ffa Mon Sep 17 00:00:00 2001 From: Ville Juven Date: Thu, 19 May 2022 12:21:18 +0300 Subject: [PATCH] risc-v/vfork: Save FPU registers Save the callee saved FPU registers --- arch/risc-v/src/common/riscv_vfork.c | 44 ++++++++++++++++++---------- arch/risc-v/src/common/riscv_vfork.h | 17 ++++++++++- 2 files changed, 45 insertions(+), 16 deletions(-) diff --git a/arch/risc-v/src/common/riscv_vfork.c b/arch/risc-v/src/common/riscv_vfork.c index 02cc421130..b2def7a8a0 100644 --- a/arch/risc-v/src/common/riscv_vfork.c +++ b/arch/risc-v/src/common/riscv_vfork.c @@ -206,25 +206,39 @@ pid_t up_vfork(const struct vfork_s *context) * indication to the newly started child thread. */ - child->cmn.xcp.regs[REG_S1] = context->s1; /* Saved register s1 */ - child->cmn.xcp.regs[REG_S2] = context->s2; /* Saved register s2 */ - child->cmn.xcp.regs[REG_S3] = context->s3; /* Saved register s3 */ - child->cmn.xcp.regs[REG_S4] = context->s4; /* Saved register s4 */ - child->cmn.xcp.regs[REG_S5] = context->s5; /* Saved register s5 */ - child->cmn.xcp.regs[REG_S6] = context->s6; /* Saved register s6 */ - child->cmn.xcp.regs[REG_S7] = context->s7; /* Saved register s7 */ - child->cmn.xcp.regs[REG_S8] = context->s8; /* Saved register s8 */ - child->cmn.xcp.regs[REG_S9] = context->s9; /* Saved register s9 */ - child->cmn.xcp.regs[REG_S10] = context->s10; /* Saved register s10 */ - child->cmn.xcp.regs[REG_S11] = context->s11; /* Saved register s11 */ + child->cmn.xcp.regs[REG_S1] = context->s1; /* Saved register s1 */ + child->cmn.xcp.regs[REG_S2] = context->s2; /* Saved register s2 */ + child->cmn.xcp.regs[REG_S3] = context->s3; /* Saved register s3 */ + child->cmn.xcp.regs[REG_S4] = context->s4; /* Saved register s4 */ + child->cmn.xcp.regs[REG_S5] = context->s5; /* Saved register s5 */ + child->cmn.xcp.regs[REG_S6] = context->s6; /* Saved register s6 */ + child->cmn.xcp.regs[REG_S7] = context->s7; /* Saved register s7 */ + child->cmn.xcp.regs[REG_S8] = context->s8; /* Saved register s8 */ + child->cmn.xcp.regs[REG_S9] = context->s9; /* Saved register s9 */ + child->cmn.xcp.regs[REG_S10] = context->s10; /* Saved register s10 */ + child->cmn.xcp.regs[REG_S11] = context->s11; /* Saved register s11 */ #ifdef CONFIG_RISCV_FRAMEPOINTER - child->cmn.xcp.regs[REG_FP] = newfp; /* Frame pointer */ + child->cmn.xcp.regs[REG_FP] = newfp; /* Frame pointer */ #else - child->cmn.xcp.regs[REG_S0] = context->s0; /* Saved register s0 */ + child->cmn.xcp.regs[REG_S0] = context->s0; /* Saved register s0 */ #endif - child->cmn.xcp.regs[REG_SP] = newsp; /* Stack pointer */ + child->cmn.xcp.regs[REG_SP] = newsp; /* Stack pointer */ #ifdef RISCV_SAVE_GP - child->cmn.xcp.regs[REG_GP] = newsp; /* Global pointer */ + child->cmn.xcp.regs[REG_GP] = newsp; /* Global pointer */ +#endif +#ifdef CONFIG_ARCH_FPU + child->cmn.xcp.regs[REG_FS0] = context->fs0; /* Saved register fs1 */ + child->cmn.xcp.regs[REG_FS1] = context->fs1; /* Saved register fs1 */ + child->cmn.xcp.regs[REG_FS2] = context->fs2; /* Saved register fs2 */ + child->cmn.xcp.regs[REG_FS3] = context->fs3; /* Saved register fs3 */ + child->cmn.xcp.regs[REG_FS4] = context->fs4; /* Saved register fs4 */ + child->cmn.xcp.regs[REG_FS5] = context->fs5; /* Saved register fs5 */ + child->cmn.xcp.regs[REG_FS6] = context->fs6; /* Saved register fs6 */ + child->cmn.xcp.regs[REG_FS7] = context->fs7; /* Saved register fs7 */ + child->cmn.xcp.regs[REG_FS8] = context->fs8; /* Saved register fs8 */ + child->cmn.xcp.regs[REG_FS9] = context->fs9; /* Saved register fs9 */ + child->cmn.xcp.regs[REG_FS10] = context->fs10; /* Saved register fs10 */ + child->cmn.xcp.regs[REG_FS11] = context->fs11; /* Saved register fs11 */ #endif #ifdef CONFIG_LIB_SYSCALL diff --git a/arch/risc-v/src/common/riscv_vfork.h b/arch/risc-v/src/common/riscv_vfork.h index 511e42102c..4f6d3dc3ac 100644 --- a/arch/risc-v/src/common/riscv_vfork.h +++ b/arch/risc-v/src/common/riscv_vfork.h @@ -118,7 +118,22 @@ struct vfork_s uintptr_t gp; /* Global pointer */ #endif - /* Floating point registers (not yet) */ + /* Floating point registers */ + +#ifdef CONFIG_ARCH_FPU + uintptr_t fs0; /* Saved register fs0 */ + uintptr_t fs1; /* Saved register fs1 */ + uintptr_t fs2; /* Saved register fs2 */ + uintptr_t fs3; /* Saved register fs3 */ + uintptr_t fs4; /* Saved register fs4 */ + uintptr_t fs5; /* Saved register fs5 */ + uintptr_t fs6; /* Saved register fs6 */ + uintptr_t fs7; /* Saved register fs7 */ + uintptr_t fs8; /* Saved register fs8 */ + uintptr_t fs9; /* Saved register fs9 */ + uintptr_t fs10; /* Saved register fs10 */ + uintptr_t fs11; /* Saved register fs11 */ +#endif }; #endif