xtensa/esp32s3: Configure the PMS peripheral for Protected Mode
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
This commit is contained in:
Gustavo Henrique Nihei
Xiang Xiao
parent
bfc40c74d0
commit
1ecaa4e672
@ -87,18 +87,18 @@ config ARCH_CHIP_ESP32S3
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select ARCH_HAVE_BOOTLOADER
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select ARCH_HAVE_TESTSET
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select ARCH_VECNOTIRQ
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select LIBC_ARCH_MEMCPY
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select LIBC_ARCH_MEMCHR
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select LIBC_ARCH_MEMCMP
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select LIBC_ARCH_MEMMOVE
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select LIBC_ARCH_MEMSET
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select LIBC_ARCH_STRCHR
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select LIBC_ARCH_STRCMP
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select LIBC_ARCH_STRCPY
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select LIBC_ARCH_STRLCPY
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select LIBC_ARCH_STRNCPY
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select LIBC_ARCH_STRLEN
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select LIBC_ARCH_STRNLEN
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select LIBC_ARCH_MEMCPY if BUILD_FLAT
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select LIBC_ARCH_MEMCHR if BUILD_FLAT
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select LIBC_ARCH_MEMCMP if BUILD_FLAT
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select LIBC_ARCH_MEMMOVE if BUILD_FLAT
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select LIBC_ARCH_MEMSET if BUILD_FLAT
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select LIBC_ARCH_STRCHR if BUILD_FLAT
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select LIBC_ARCH_STRCMP if BUILD_FLAT
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select LIBC_ARCH_STRCPY if BUILD_FLAT
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select LIBC_ARCH_STRLCPY if BUILD_FLAT
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select LIBC_ARCH_STRNCPY if BUILD_FLAT
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select LIBC_ARCH_STRLEN if BUILD_FLAT
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select LIBC_ARCH_STRNLEN if BUILD_FLAT
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---help---
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ESP32-S3 is a dual-core Xtensa LX7 MCU, capable of running at 240 MHz.
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Apart from its 512 KB of internal SRAM, it also comes with integrated 2.4 GHz,
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@ -129,7 +129,11 @@ config XTENSA_HAVE_DCACHE_LOCK
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bool
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default n
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config XTENSA_HAVE_EXCEPTION_HOOKS
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config XTENSA_HAVE_GENERAL_EXCEPTION_HOOKS
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bool
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default n
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config XTENSA_HAVE_WINDOW_EXCEPTION_HOOKS
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bool
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default n
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@ -179,7 +179,7 @@
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rsr a0, EPC_1 + \level - 1 /* Save interruptee's PC */
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s32i a0, sp, (4 * REG_PC)
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#ifdef CONFIG_XTENSA_HAVE_EXCEPTION_HOOKS
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#ifdef CONFIG_XTENSA_HAVE_GENERAL_EXCEPTION_HOOKS
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/* Perform chip-specific exception entry operations */
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exception_entry_hook \level sp a0
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@ -207,7 +207,7 @@
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l32i a0, a2, (4 * REG_PC) /* Retrieve interruptee's PC */
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wsr a0, EPC_1 + \level - 1
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#ifdef CONFIG_XTENSA_HAVE_EXCEPTION_HOOKS
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#ifdef CONFIG_XTENSA_HAVE_GENERAL_EXCEPTION_HOOKS
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/* Perform chip-specific exception exit operations */
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exception_exit_hook \level a2 a0 a1
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@ -54,6 +54,9 @@ static void xtensa_registerdump(const uintptr_t *regs)
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regs[REG_A8], regs[REG_A9], regs[REG_A10], regs[REG_A11],
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regs[REG_A12], regs[REG_A13], regs[REG_A14], regs[REG_A15]);
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svcinfo(" PC: %08x PS: %08x\n", regs[REG_PC], regs[REG_PS]);
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#ifdef CONFIG_BUILD_PROTECTED
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svcinfo(" INT_CTX: %08x\n", regs[REG_INT_CTX]);
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#endif
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}
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#endif
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@ -98,7 +98,7 @@ _window_overflow4:
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s32e a1, a5, -12 /* Save a1 to call[j+1]'s stack frame */
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s32e a2, a5, -8 /* Save a2 to call[j+1]'s stack frame */
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s32e a3, a5, -4 /* Save a3 to call[j+1]'s stack frame */
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#ifdef CONFIG_XTENSA_HAVE_EXCEPTION_HOOKS
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#ifdef CONFIG_XTENSA_HAVE_WINDOW_EXCEPTION_HOOKS
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j _overflow4_exit_hook
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#else
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rfwo /* Rotates back to call[i] position */
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@ -125,7 +125,7 @@ _window_underflow4:
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l32e a1, a5, -12 /* Restore a1 from call[i+1]'s stack frame */
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l32e a2, a5, -8 /* Restore a2 from call[i+1]'s stack frame */
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l32e a3, a5, -4 /* Restore a3 from call[i+1]'s stack frame */
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#ifdef CONFIG_XTENSA_HAVE_EXCEPTION_HOOKS
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#ifdef CONFIG_XTENSA_HAVE_WINDOW_EXCEPTION_HOOKS
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j _underflow4_exit_hook
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#else
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rfwu
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@ -188,7 +188,7 @@ _window_overflow8:
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s32e a5, a0, -28 /* Save a5 to call[j]'s stack frame */
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s32e a6, a0, -24 /* Save a6 to call[j]'s stack frame */
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s32e a7, a0, -20 /* Save a7 to call[j]'s stack frame */
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#ifdef CONFIG_XTENSA_HAVE_EXCEPTION_HOOKS
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#ifdef CONFIG_XTENSA_HAVE_WINDOW_EXCEPTION_HOOKS
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j _overflow8_exit_hook
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#else
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rfwo /* Rotates back to call[i] position */
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@ -221,7 +221,7 @@ _window_underflow8:
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l32e a5, a7, -28 /* Restore a5 from call[i]'s stack frame */
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l32e a6, a7, -24 /* Restore a6 from call[i]'s stack frame */
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l32e a7, a7, -20 /* Restore a7 from call[i]'s stack frame */
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#ifdef CONFIG_XTENSA_HAVE_EXCEPTION_HOOKS
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#ifdef CONFIG_XTENSA_HAVE_WINDOW_EXCEPTION_HOOKS
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j _underflow8_exit_hook
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#else
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rfwu
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@ -738,7 +738,8 @@ config ESP32_PID
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bool "PID Controller"
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default n
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select ARCH_USE_MPU
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select XTENSA_HAVE_EXCEPTION_HOOKS if BUILD_PROTECTED
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select XTENSA_HAVE_GENERAL_EXCEPTION_HOOKS if BUILD_PROTECTED
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select XTENSA_HAVE_WINDOW_EXCEPTION_HOOKS if BUILD_PROTECTED
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depends on EXPERIMENTAL
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endmenu # ESP32 Peripheral Selection
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@ -25,7 +25,7 @@ include common/Make.defs
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HEAD_CSRC = esp32_start.c esp32_wdt.c
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ifeq ($(CONFIG_XTENSA_HAVE_EXCEPTION_HOOKS),y)
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ifeq ($(CONFIG_XTENSA_HAVE_WINDOW_EXCEPTION_HOOKS),y)
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HEAD_ASRC += esp32_window_hooks.S
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endif
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@ -193,7 +193,7 @@
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*
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****************************************************************************/
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#ifdef CONFIG_XTENSA_HAVE_EXCEPTION_HOOKS
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#ifdef CONFIG_XTENSA_HAVE_GENERAL_EXCEPTION_HOOKS
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.macro exception_entry_hook level reg_sp tmp
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/* Save PID information from interruptee when handling User (Level 1) and
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@ -221,7 +221,7 @@
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*
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****************************************************************************/
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#ifdef CONFIG_XTENSA_HAVE_EXCEPTION_HOOKS
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#ifdef CONFIG_XTENSA_HAVE_GENERAL_EXCEPTION_HOOKS
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.macro exception_exit_hook level reg_sp tmp1 tmp2
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/* Configure the PID Controller for the new execution context before
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@ -32,7 +32,7 @@
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* Public Functions
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****************************************************************************/
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#ifdef CONFIG_XTENSA_HAVE_EXCEPTION_HOOKS
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#ifdef CONFIG_XTENSA_HAVE_WINDOW_EXCEPTION_HOOKS
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/* PID Controller is configured to switch to PID 0 when the CPU fetches
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* instruction from the following window exception vectors:
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* - Window Overflow 4: mapped as Level 2 vector entry address
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@ -131,4 +131,4 @@ _underflow8_exit_hook:
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rsr a1, misc1
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rfwu
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#endif /* CONFIG_XTENSA_HAVE_EXCEPTION_HOOKS */
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#endif /* CONFIG_XTENSA_HAVE_WINDOW_EXCEPTION_HOOKS */
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@ -400,6 +400,12 @@ config ESP32S3_RT_TIMER
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---help---
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Real-Time Timer is relying upon the Systimer 1.
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config ESP32S3_WCL
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bool "World Controller"
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default n
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select ARCH_USE_MPU
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select XTENSA_HAVE_GENERAL_EXCEPTION_HOOKS if BUILD_PROTECTED
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endmenu # ESP32-S3 Peripheral Selection
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menu "SPI RAM Configuration"
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@ -33,6 +33,10 @@
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#endif
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#endif
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#if defined(CONFIG_ESP32S3_WCL) && defined(CONFIG_BUILD_PROTECTED)
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#include "hardware/esp32s3_wcl_core.h"
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#endif
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/****************************************************************************
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* Pre-processor Definitions
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****************************************************************************/
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@ -43,13 +47,20 @@
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#define HANDLER_SECTION .iram1
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#if defined(CONFIG_BUILD_PROTECTED)
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#if defined(CONFIG_ESP32S3_WCL) && defined(CONFIG_BUILD_PROTECTED)
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#define xtensa_saveprivilege(regs,var)
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#define xtensa_restoreprivilege(regs,var)
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/* Definitions for the Worlds reserved for Kernel and Userspace */
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#define xtensa_lowerprivilege(regs)
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#define xtensa_raiseprivilege(regs)
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#define WCL_WORLD_KERNEL 0 /* Privileged */
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#define WCL_WORLD_USER 1 /* Non-privileged */
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/* Macros for privilege handling with the World Controller peripheral */
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#define xtensa_saveprivilege(regs,var) ((var) = (regs)[REG_INT_CTX])
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#define xtensa_restoreprivilege(regs,var) ((regs)[REG_INT_CTX] = (var))
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#define xtensa_lowerprivilege(regs) ((regs)[REG_INT_CTX] = WCL_WORLD_USER)
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#define xtensa_raiseprivilege(regs) ((regs)[REG_INT_CTX] = WCL_WORLD_KERNEL)
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#endif
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@ -99,7 +110,169 @@
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l32i a1, \tmp2, 0 /* a1 = *tmp2 */
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.endm
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#endif
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#endif /* __ASSEMBLY__ */
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/****************************************************************************
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* Name: clear_wcl_write_buffer
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*
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* Description:
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* Clear World Controller write buffer upon World 0 entry.
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*
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* Entry Conditions:
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* tmp - Temporary register
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*
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****************************************************************************/
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.macro clear_wcl_write_buffer tmp
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/* Refer to ESP32-S3 Technical Reference Manual, section 16.4.3, for a
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* detailed description of the write buffer clearing process.
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*/
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wsr a2, DEPC
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movi \tmp, SOC_RTC_DATA_LOW
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movi a2, 0
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s32i a2, \tmp, 0
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addi a2, a2, 1
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s32i a2, \tmp, 0
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addi a2, a2, 1
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s32i a2, \tmp, 0
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addi a2, a2, 1
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s32i a2, \tmp, 0
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addi a2, a2, 1
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s32i a2, \tmp, 0
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addi a2, a2, 1
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s32i a2, \tmp, 0
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addi a2, a2, 1
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s32i a2, \tmp, 0
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l32i \tmp, \tmp, 0
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memw
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rsr a2, DEPC
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.endm
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/****************************************************************************
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* Name: get_prev_world
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*
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* Description:
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* Retrieve World information from interruptee.
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*
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* Entry Conditions:
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* level - Interrupt level
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* out - Temporary and output register
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*
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* Exit Conditions:
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* World number to be returned will be written to "out" register.
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*
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****************************************************************************/
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.macro get_prev_world level out
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.ifeq (\level - 1) * (\level - 3)
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.ifeq (\level - 1)
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movi \out, WCL_CORE_0_STATUSTABLE1_REG
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.endif
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.ifeq (\level - 3)
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movi \out, WCL_CORE_0_STATUSTABLE2_REG
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.endif
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l32i \out, \out, 0
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extui \out, \out, 0, 1
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.endif
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.endm
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/****************************************************************************
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* Name: set_next_world
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*
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* Description:
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* Configure the World Controller for the new execution context.
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*
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* Entry Conditions:
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* reg_sp - Stack pointer
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* tmp1 - Temporary register 1
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* tmp2 - Temporary register 2
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*
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****************************************************************************/
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.macro set_next_world reg_sp tmp1 tmp2
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movi \tmp1, BIT(1)
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movi \tmp2, WCL_CORE_0_WORLD_PREPARE_REG
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s32i \tmp1, \tmp2, 0 /* Prepare execution on World 1 */
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l32i \tmp1, \reg_sp, (4 * REG_PC)
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movi \tmp2, WCL_CORE_0_WORLD_TRIGGER_ADDR_REG
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s32i \tmp1, \tmp2, 0
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movi \tmp1, BIT(0)
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movi \tmp2, WCL_CORE_0_WORLD_UPDATE_REG
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s32i \tmp1, \tmp2, 0
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.endm
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/****************************************************************************
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* Name: exception_entry_hook
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*
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* Description:
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* Perform chip-specific exception entry operations.
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*
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* Entry Conditions:
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* level - Interrupt level
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* reg_sp - Stack pointer
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* tmp - Temporary register
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*
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****************************************************************************/
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#ifdef CONFIG_XTENSA_HAVE_GENERAL_EXCEPTION_HOOKS
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.macro exception_entry_hook level reg_sp tmp
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.ifeq (\level - 1) * (\level - 3)
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clear_wcl_write_buffer \tmp
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/* Save World information from interruptee when handling User Exceptions
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* (Level 1) and Software-triggered interrupts (Level 3).
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*/
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get_prev_world \level \tmp
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s32i \tmp, \reg_sp, (4 * REG_INT_CTX) /* Save World into context */
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.endif
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.endm
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#endif
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/****************************************************************************
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* Name: exception_exit_hook
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*
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* Description:
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* Perform chip-specific exception exit operations.
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*
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* Entry Conditions:
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* level - Interrupt level
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* reg_sp - Stack pointer
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* tmp1 - Temporary register 1
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* tmp2 - Temporary register 2
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*
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****************************************************************************/
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#ifdef CONFIG_XTENSA_HAVE_GENERAL_EXCEPTION_HOOKS
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.macro exception_exit_hook level reg_sp tmp1 tmp2
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/* Configure the World Controller for the new execution context before
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* returning from User Exceptions (Level 1) and Software-triggered
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* interrupts (Level 3).
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*/
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.ifeq (\level - 1) * (\level - 3)
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movi \tmp1, 0x0
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.ifeq (\level - 1)
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movi \tmp2, WCL_CORE_0_STATUSTABLE1_REG
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.endif
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.ifeq (\level - 3)
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movi \tmp2, WCL_CORE_0_STATUSTABLE2_REG
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.endif
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s32i \tmp1, \tmp2, 0 /* Clear the table entry */
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l32i \tmp1, \reg_sp, (4 * REG_INT_CTX)
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beqz \tmp1, 1f
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set_next_world \reg_sp \tmp1 \tmp2
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1:
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memw
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.endif
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.endm
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#endif
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#endif /* __ASSEMBLY */
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/****************************************************************************
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* Public Data
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@ -43,6 +43,10 @@
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* Pre-processor Definitions
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****************************************************************************/
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#ifndef ALIGN_DOWN
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# define ALIGN_DOWN(num, align) ((num) & ~((align) - 1))
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#endif
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/****************************************************************************
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* Public Functions
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****************************************************************************/
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@ -66,7 +70,13 @@ void up_allocate_heap(void **heap_start, size_t *heap_size)
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{
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#if defined(CONFIG_BUILD_PROTECTED) && defined(CONFIG_MM_KERNEL_HEAP)
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uintptr_t ubase = USERSPACE->us_dataend;
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uintptr_t utop = ets_rom_layout_p->dram0_rtos_reserved_start;
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/* Align the heap top address to 256 bytes to match the PMS split address
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* requirement.
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*/
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uintptr_t utop = ALIGN_DOWN(ets_rom_layout_p->dram0_rtos_reserved_start,
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256);
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size_t usize = utop - ubase;
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minfo("Heap: start=%" PRIxPTR " end=%" PRIxPTR " size=%zu\n",
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@ -43,6 +43,7 @@
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#ifdef CONFIG_SMP
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#include "esp32s3_smp.h"
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#endif
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#include "esp32s3_userspace.h"
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#include "hardware/esp32s3_interrupt_core0.h"
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#ifdef CONFIG_SMP
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#include "hardware/esp32s3_interrupt_core1.h"
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@ -420,9 +421,7 @@ void up_irqinitialize(void)
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/* Hard code special cases. */
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g_irqmap[XTENSA_IRQ_TIMER0] = IRQ_MKMAP(0, ESP32S3_CPUINT_TIMER0);
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g_irqmap[XTENSA_IRQ_SWINT] = IRQ_MKMAP(0, ESP32S3_CPUINT_SOFTWARE1);
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g_irqmap[XTENSA_IRQ_SWINT] = IRQ_MKMAP(1, ESP32S3_CPUINT_SOFTWARE1);
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/* Initialize CPU interrupts */
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@ -439,6 +438,10 @@ void up_irqinitialize(void)
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esp32s3_gpioirqinitialize();
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/* Initialize interrupt handler for the PMS violation ISR */
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esp32s3_pmsirqinitialize();
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#ifndef CONFIG_SUPPRESS_INTERRUPTS
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/* And finally, enable interrupts. Also clears PS.EXCM */
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File diff suppressed because it is too large
Load Diff
@ -46,4 +46,24 @@
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void esp32s3_userspace(void);
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#endif
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/****************************************************************************
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* Name: esp32s3_pmsirqinitialize
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*
|
||||
* Description:
|
||||
* Initialize interrupt handler for the PMS violation ISR.
|
||||
*
|
||||
* Input Parameters:
|
||||
* None.
|
||||
*
|
||||
* Returned Value:
|
||||
* None.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
#ifdef CONFIG_BUILD_PROTECTED
|
||||
void esp32s3_pmsirqinitialize(void);
|
||||
#else
|
||||
# define esp32s3_pmsirqinitialize()
|
||||
#endif
|
||||
|
||||
#endif /* __ARCH_XTENSA_SRC_ESP32S3_ESP32S3_USERSPACE_H */
|
||||
|
||||
1135
arch/xtensa/src/esp32s3/hardware/esp32s3_apb_ctrl.h
Normal file
1135
arch/xtensa/src/esp32s3/hardware/esp32s3_apb_ctrl.h
Normal file
File diff suppressed because it is too large
Load Diff
8495
arch/xtensa/src/esp32s3/hardware/esp32s3_sensitive.h
Normal file
8495
arch/xtensa/src/esp32s3/hardware/esp32s3_sensitive.h
Normal file
File diff suppressed because it is too large
Load Diff
@ -25,8 +25,10 @@
|
||||
* Included Files
|
||||
****************************************************************************/
|
||||
|
||||
#ifndef __ASSEMBLY__
|
||||
#include <stdint.h>
|
||||
#include <stdbool.h>
|
||||
#endif
|
||||
|
||||
#include "xtensa_attr.h"
|
||||
|
||||
@ -148,6 +150,8 @@
|
||||
|
||||
#define BIT(nr) (1UL << (nr))
|
||||
|
||||
#ifndef __ASSEMBLY__
|
||||
|
||||
/* Write value to register */
|
||||
|
||||
#define REG_WRITE(_r, _v) (*(volatile uint32_t *)(_r)) = (_v)
|
||||
@ -260,6 +264,8 @@
|
||||
|
||||
#define VALUE_TO_FIELD(_value, _field) (((_value) << (_field##_S)) & (_field##_M))
|
||||
|
||||
#endif /* __ASSEMBLY__ */
|
||||
|
||||
/* Peripheral Clock */
|
||||
|
||||
#define APB_CLK_FREQ_ROM (40*1000000)
|
||||
@ -435,6 +441,8 @@
|
||||
#define RTC_PLL_FREQ_320M 320
|
||||
#define RTC_PLL_FREQ_480M 480
|
||||
|
||||
#ifndef __ASSEMBLY__
|
||||
|
||||
/****************************************************************************
|
||||
* Inline Functions
|
||||
****************************************************************************/
|
||||
@ -486,4 +494,6 @@ static inline bool IRAM_ATTR esp32s3_ptr_exec(const void *p)
|
||||
|| (ip >= SOC_RTC_IRAM_LOW && ip < SOC_RTC_IRAM_HIGH);
|
||||
}
|
||||
|
||||
#endif /* __ASSEMBLY__ */
|
||||
|
||||
#endif /* __ARCH_XTENSA_SRC_ESP32S3_HARDWARE_ESP32S3_SOC_H */
|
||||
|
||||
1908
arch/xtensa/src/esp32s3/hardware/esp32s3_wcl_core.h
Normal file
1908
arch/xtensa/src/esp32s3/hardware/esp32s3_wcl_core.h
Normal file
File diff suppressed because it is too large
Load Diff
@ -31,7 +31,6 @@ ENTRYPT = $(patsubst "%",%,$(CONFIG_INIT_ENTRYPOINT))
|
||||
USER_LIBPATHS = $(addprefix -L,$(call CONVERT_PATH,$(addprefix $(TOPDIR)$(DELIM),$(dir $(USERLIBS)))))
|
||||
USER_LDSCRIPT = $(call CONVERT_PATH,$(BOARD_COMMON_DIR)$(DELIM)scripts$(DELIM)protected_memory.ld)
|
||||
USER_LDSCRIPT += $(call CONVERT_PATH,$(BOARD_COMMON_DIR)$(DELIM)scripts$(DELIM)user-space.ld)
|
||||
USER_LDSCRIPT += $(call CONVERT_PATH,$(BOARD_COMMON_DIR)$(DELIM)scripts$(DELIM)esp32s3_rom.ld)
|
||||
USER_HEXFILE += $(call CONVERT_PATH,$(TOPDIR)$(DELIM)nuttx_user.hex)
|
||||
USER_BINFILE += $(call CONVERT_PATH,$(TOPDIR)$(DELIM)nuttx_user.bin)
|
||||
|
||||
@ -46,9 +45,12 @@ USER_LIBGCC = "${shell "$(CC)" $(ARCHCPUFLAGS) -print-libgcc-file-name}"
|
||||
|
||||
# Source files
|
||||
|
||||
ASRCS = esp32s3_user_vectors.S
|
||||
CSRCS = esp32s3_userspace.c
|
||||
|
||||
AOBJS = $(ASRCS:.S=$(OBJEXT))
|
||||
COBJS = $(CSRCS:.c=$(OBJEXT))
|
||||
OBJS = $(COBJS)
|
||||
OBJS = $(AOBJS) $(COBJS)
|
||||
|
||||
ifeq ($(LD),$(CC))
|
||||
LDSTARTGROUP ?= -Wl,--start-group
|
||||
@ -65,6 +67,9 @@ endif
|
||||
all: $(TOPDIR)$(DELIM)nuttx_user.elf
|
||||
.PHONY: nuttx_user.elf depend clean distclean
|
||||
|
||||
$(AOBJS): %$(OBJEXT): %.S
|
||||
$(call ASSEMBLE,$<,$@)
|
||||
|
||||
$(COBJS): %$(OBJEXT): %.c
|
||||
$(call COMPILE,$<,$@)
|
||||
|
||||
|
||||
304
boards/xtensa/esp32s3/common/kernel/esp32s3_user_vectors.S
Normal file
304
boards/xtensa/esp32s3/common/kernel/esp32s3_user_vectors.S
Normal file
@ -0,0 +1,304 @@
|
||||
/****************************************************************************
|
||||
* boards/xtensa/esp32s3/common/kernel/esp32s3_user_vectors.S
|
||||
*
|
||||
* Licensed to the Apache Software Foundation (ASF) under one or more
|
||||
* contributor license agreements. See the NOTICE file distributed with
|
||||
* this work for additional information regarding copyright ownership. The
|
||||
* ASF licenses this file to you under the Apache License, Version 2.0 (the
|
||||
* "License"); you may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at
|
||||
*
|
||||
* http://www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
|
||||
* License for the specific language governing permissions and limitations
|
||||
* under the License.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
.file "esp32s3_user_vectors.S"
|
||||
|
||||
/****************************************************************************
|
||||
* Included Files
|
||||
****************************************************************************/
|
||||
|
||||
#include <nuttx/config.h>
|
||||
|
||||
#include <arch/irq.h>
|
||||
#include <arch/chip/core-isa.h>
|
||||
#include <arch/xtensa/xtensa_abi.h>
|
||||
#include <arch/xtensa/xtensa_specregs.h>
|
||||
|
||||
/****************************************************************************
|
||||
* Public Functions
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Medium-/High-priority interrupt vectors
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Name: _xtensa_level2_vector
|
||||
****************************************************************************/
|
||||
|
||||
.begin literal_prefix .xtensa_level2_vector
|
||||
.section .xtensa_level2_vector.text, "ax"
|
||||
.global _xtensa_level2_vector
|
||||
.type _xtensa_level2_vector, @function
|
||||
.align 4
|
||||
|
||||
_xtensa_level2_vector:
|
||||
j __kernel_vector_table + 0x180
|
||||
|
||||
.size _xtensa_level2_vector, . - _xtensa_level2_vector
|
||||
.end literal_prefix
|
||||
|
||||
/****************************************************************************
|
||||
* Name: _xtensa_level3_vector
|
||||
****************************************************************************/
|
||||
|
||||
.begin literal_prefix .xtensa_level3_vector
|
||||
.section .xtensa_level3_vector.text, "ax"
|
||||
.global _xtensa_level3_vector
|
||||
.type _xtensa_level3_vector, @function
|
||||
.align 4
|
||||
|
||||
_xtensa_level3_vector:
|
||||
j __kernel_vector_table + 0x1c0
|
||||
|
||||
.size _xtensa_level3_vector, . - _xtensa_level3_vector
|
||||
.end literal_prefix
|
||||
|
||||
/****************************************************************************
|
||||
* Name: _xtensa_level4_vector
|
||||
****************************************************************************/
|
||||
|
||||
.begin literal_prefix .xtensa_level4_vector
|
||||
.section .xtensa_level4_vector.text, "ax"
|
||||
.global _xtensa_level4_vector
|
||||
.type _xtensa_level4_vector, @function
|
||||
.align 4
|
||||
|
||||
_xtensa_level4_vector:
|
||||
j __kernel_vector_table + 0x200
|
||||
|
||||
.size _xtensa_level4_vector, . - _xtensa_level4_vector
|
||||
.end literal_prefix
|
||||
|
||||
/****************************************************************************
|
||||
* Name: _xtensa_level5_vector
|
||||
****************************************************************************/
|
||||
|
||||
.begin literal_prefix .xtensa_level5_vector
|
||||
.section .xtensa_level5_vector.text, "ax"
|
||||
.global _xtensa_level5_vector
|
||||
.type _xtensa_level5_vector, @function
|
||||
.align 4
|
||||
|
||||
_xtensa_level5_vector:
|
||||
j __kernel_vector_table + 0x240
|
||||
|
||||
.size _xtensa_level5_vector, . - _xtensa_level5_vector
|
||||
.end literal_prefix
|
||||
|
||||
/****************************************************************************
|
||||
* Name: _debug_exception_vector
|
||||
****************************************************************************/
|
||||
|
||||
.begin literal_prefix .debug_exception_vector
|
||||
.section .debug_exception_vector.text, "ax"
|
||||
.global _debug_exception_vector
|
||||
.type _debug_exception_vector, @function
|
||||
.align 4
|
||||
|
||||
_debug_exception_vector:
|
||||
j __kernel_vector_table + 0x280
|
||||
|
||||
.size _debug_exception_vector, . - _debug_exception_vector
|
||||
.end literal_prefix
|
||||
|
||||
/****************************************************************************
|
||||
* Name: _nmi_exception_vector
|
||||
****************************************************************************/
|
||||
|
||||
.begin literal_prefix .nmi_exception_vector
|
||||
.section .nmi_exception_vector.text, "ax"
|
||||
.global _nmi_exception_vector
|
||||
.type _nmi_exception_vector, @function
|
||||
.align 4
|
||||
|
||||
_nmi_exception_vector:
|
||||
j __kernel_vector_table + 0x2c0
|
||||
|
||||
.size _nmi_exception_vector, . - _nmi_exception_vector
|
||||
.end literal_prefix
|
||||
|
||||
/****************************************************************************
|
||||
* General exception vectors
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Name: _kernel_exception_vector
|
||||
****************************************************************************/
|
||||
|
||||
.begin literal_prefix .kernel_exception_vector
|
||||
.section .kernel_exception_vector.text, "ax"
|
||||
.global _kernel_exception_vector
|
||||
.type _kernel_exception_vector, @function
|
||||
.align 4
|
||||
|
||||
_kernel_exception_vector:
|
||||
j __kernel_vector_table + 0x300
|
||||
|
||||
.size _kernel_exception_vector, . - _kernel_exception_vector
|
||||
.end literal_prefix
|
||||
|
||||
/****************************************************************************
|
||||
* Name: _user_exception_vector
|
||||
****************************************************************************/
|
||||
|
||||
.begin literal_prefix .user_exception_vector
|
||||
.section .user_exception_vector.text, "ax"
|
||||
.global _user_exception_vector
|
||||
.type _user_exception_vector, @function
|
||||
.align 4
|
||||
|
||||
_user_exception_vector:
|
||||
j __kernel_vector_table + 0x340
|
||||
|
||||
.size _user_exception_vector, . - _user_exception_vector
|
||||
.end literal_prefix
|
||||
|
||||
/****************************************************************************
|
||||
* Name: _double_exception_vector
|
||||
****************************************************************************/
|
||||
|
||||
.begin literal_prefix .double_exception_vector
|
||||
.section .double_exception_vector.text, "ax"
|
||||
.global _double_exception_vector
|
||||
.type _double_exception_vector, @function
|
||||
.align 4
|
||||
|
||||
_double_exception_vector:
|
||||
j __kernel_vector_table + 0x3c0
|
||||
|
||||
.size _double_exception_vector, . - _double_exception_vector
|
||||
.end literal_prefix
|
||||
|
||||
/****************************************************************************
|
||||
* Window exception vectors
|
||||
****************************************************************************/
|
||||
|
||||
.section .window_vectors.text, "ax"
|
||||
|
||||
/****************************************************************************
|
||||
* Name: _window_overflow4
|
||||
****************************************************************************/
|
||||
|
||||
.org 0x0
|
||||
.global _window_overflow4
|
||||
_window_overflow4:
|
||||
s32e a0, a5, -16 /* save a0 to call[j+1]'s stack frame */
|
||||
s32e a1, a5, -12 /* save a1 to call[j+1]'s stack frame */
|
||||
s32e a2, a5, -8 /* save a2 to call[j+1]'s stack frame */
|
||||
s32e a3, a5, -4 /* save a3 to call[j+1]'s stack frame */
|
||||
rfwo /* rotates back to call[i] position */
|
||||
|
||||
/****************************************************************************
|
||||
* Name: _window_underflow4
|
||||
****************************************************************************/
|
||||
|
||||
.org 0x40
|
||||
.global _window_underflow4
|
||||
_window_underflow4:
|
||||
l32e a0, a5, -16 /* restore a0 from call[i+1]'s stack frame */
|
||||
l32e a1, a5, -12 /* restore a1 from call[i+1]'s stack frame */
|
||||
l32e a2, a5, -8 /* restore a2 from call[i+1]'s stack frame */
|
||||
l32e a3, a5, -4 /* restore a3 from call[i+1]'s stack frame */
|
||||
rfwu
|
||||
|
||||
/****************************************************************************
|
||||
* Name: _window_overflow8
|
||||
****************************************************************************/
|
||||
|
||||
.org 0x80
|
||||
.global _window_overflow8
|
||||
_window_overflow8:
|
||||
s32e a0, a9, -16 /* save a0 to call[j+1]'s stack frame */
|
||||
l32e a0, a1, -12 /* a0 <- call[j-1]'s sp
|
||||
(used to find end of call[j]'s frame) */
|
||||
s32e a1, a9, -12 /* save a1 to call[j+1]'s stack frame */
|
||||
s32e a2, a9, -8 /* save a2 to call[j+1]'s stack frame */
|
||||
s32e a3, a9, -4 /* save a3 to call[j+1]'s stack frame */
|
||||
s32e a4, a0, -32 /* save a4 to call[j]'s stack frame */
|
||||
s32e a5, a0, -28 /* save a5 to call[j]'s stack frame */
|
||||
s32e a6, a0, -24 /* save a6 to call[j]'s stack frame */
|
||||
s32e a7, a0, -20 /* save a7 to call[j]'s stack frame */
|
||||
rfwo /* rotates back to call[i] position */
|
||||
|
||||
/****************************************************************************
|
||||
* Name: _window_underflow8
|
||||
****************************************************************************/
|
||||
|
||||
.org 0xc0
|
||||
.global _window_underflow8
|
||||
_window_underflow8:
|
||||
l32e a0, a9, -16 /* restore a0 from call[i+1]'s stack frame */
|
||||
l32e a1, a9, -12 /* restore a1 from call[i+1]'s stack frame */
|
||||
l32e a2, a9, -8 /* restore a2 from call[i+1]'s stack frame */
|
||||
l32e a7, a1, -12 /* a7 <- call[i-1]'s sp
|
||||
(used to find end of call[i]'s frame) */
|
||||
l32e a3, a9, -4 /* restore a3 from call[i+1]'s stack frame */
|
||||
l32e a4, a7, -32 /* restore a4 from call[i]'s stack frame */
|
||||
l32e a5, a7, -28 /* restore a5 from call[i]'s stack frame */
|
||||
l32e a6, a7, -24 /* restore a6 from call[i]'s stack frame */
|
||||
l32e a7, a7, -20 /* restore a7 from call[i]'s stack frame */
|
||||
rfwu
|
||||
|
||||
/****************************************************************************
|
||||
* Name: _window_overflow12
|
||||
****************************************************************************/
|
||||
|
||||
.org 0x100
|
||||
.global _window_overflow12
|
||||
_window_overflow12:
|
||||
s32e a0, a13, -16 /* save a0 to call[j+1]'s stack frame */
|
||||
l32e a0, a1, -12 /* a0 <- call[j-1]'s sp
|
||||
(used to find end of call[j]'s frame) */
|
||||
s32e a1, a13, -12 /* save a1 to call[j+1]'s stack frame */
|
||||
s32e a2, a13, -8 /* save a2 to call[j+1]'s stack frame */
|
||||
s32e a3, a13, -4 /* save a3 to call[j+1]'s stack frame */
|
||||
s32e a4, a0, -48 /* save a4 to end of call[j]'s stack frame */
|
||||
s32e a5, a0, -44 /* save a5 to end of call[j]'s stack frame */
|
||||
s32e a6, a0, -40 /* save a6 to end of call[j]'s stack frame */
|
||||
s32e a7, a0, -36 /* save a7 to end of call[j]'s stack frame */
|
||||
s32e a8, a0, -32 /* save a8 to end of call[j]'s stack frame */
|
||||
s32e a9, a0, -28 /* save a9 to end of call[j]'s stack frame */
|
||||
s32e a10, a0, -24 /* save a10 to end of call[j]'s stack frame */
|
||||
s32e a11, a0, -20 /* save a11 to end of call[j]'s stack frame */
|
||||
rfwo /* rotates back to call[i] position */
|
||||
|
||||
/****************************************************************************
|
||||
* Name: _window_underflow12
|
||||
****************************************************************************/
|
||||
|
||||
.org 0x140
|
||||
.global _window_underflow12
|
||||
_window_underflow12:
|
||||
l32e a0, a13, -16 /* restore a0 from call[i+1]'s stack frame */
|
||||
l32e a1, a13, -12 /* restore a1 from call[i+1]'s stack frame */
|
||||
l32e a2, a13, -8 /* restore a2 from call[i+1]'s stack frame */
|
||||
l32e a11, a1, -12 /* a11 <- call[i-1]'s sp
|
||||
(used to find end of call[i]'s frame) */
|
||||
l32e a3, a13, -4 /* restore a3 from call[i+1]'s stack frame */
|
||||
l32e a4, a11, -48 /* restore a4 from end of call[i]'s stack frame */
|
||||
l32e a5, a11, -44 /* restore a5 from end of call[i]'s stack frame */
|
||||
l32e a6, a11, -40 /* restore a6 from end of call[i]'s stack frame */
|
||||
l32e a7, a11, -36 /* restore a7 from end of call[i]'s stack frame */
|
||||
l32e a8, a11, -32 /* restore a8 from end of call[i]'s stack frame */
|
||||
l32e a9, a11, -28 /* restore a9 from end of call[i]'s stack frame */
|
||||
l32e a10, a11, -24 /* restore a10 from end of call[i]'s stack frame */
|
||||
l32e a11, a11, -20 /* restore a11 from end of call[i]'s stack frame */
|
||||
rfwu
|
||||
@ -48,8 +48,6 @@ __kdram_end = ORIGIN(KDRAM) + LENGTH(KDRAM);
|
||||
|
||||
ENTRY(_stext)
|
||||
|
||||
_diram_i_start = 0x40378000;
|
||||
|
||||
SECTIONS
|
||||
{
|
||||
/* Send .iram0 code to iram */
|
||||
@ -104,6 +102,7 @@ SECTIONS
|
||||
|
||||
_iram_text_start = ABSOLUTE(.);
|
||||
*(.iram1 .iram1.*)
|
||||
esp32s3_userspace.*(.literal .text .literal.* .text.*)
|
||||
*librtc.a:(.literal .text .literal.* .text.*)
|
||||
*libkarch.a:esp32s3_spiflash.*(.literal .text .literal.* .text.*)
|
||||
*libkarch.a:xtensa_cpupause.*(.literal .text .literal.* .text.*)
|
||||
@ -127,15 +126,6 @@ SECTIONS
|
||||
_iram_end = ABSOLUTE(.);
|
||||
} >KIRAM
|
||||
|
||||
.dram0.dummy (NOLOAD) :
|
||||
{
|
||||
/* This section is required to skip .iram0.text area because iram0_0_seg
|
||||
* and dram0_0_seg reflect the same address space on different buses.
|
||||
*/
|
||||
|
||||
. = ORIGIN(KDRAM) + MAX(_iram_end, _diram_i_start) - _diram_i_start;
|
||||
} >KDRAM
|
||||
|
||||
/* Shared RAM */
|
||||
|
||||
.dram0.bss (NOLOAD) :
|
||||
@ -203,6 +193,7 @@ SECTIONS
|
||||
KEEP (*(.jcr))
|
||||
*(.dram1 .dram1.*)
|
||||
*libphy.a:(.rodata .rodata.*)
|
||||
esp32s3_userspace.*(.rodata .rodata.*)
|
||||
*libkarch.a:esp32s3_spiflash.*(.rodata .rodata.*)
|
||||
*libkarch.a:xtensa_cpupause.*(.rodata .rodata.*)
|
||||
*libkarch.a:xtensa_copystate.*(.rodata .rodata.*)
|
||||
|
||||
@ -51,17 +51,13 @@
|
||||
|
||||
MEMORY
|
||||
{
|
||||
metadata (RX) : org = 0x0, len = 0x18
|
||||
ROM (RX) : org = 0x18, len = 0x100000
|
||||
metadata (RX) : org = 0x0, len = 0x30
|
||||
ROM (RX) : org = 0x30, len = 0x100000
|
||||
|
||||
/* Below values assume the flash cache is on, and have the blocks this
|
||||
* uses subtracted from the length of the various regions. The 'data access
|
||||
* port' dram/drom regions map to the same iram/irom regions but are
|
||||
* connected to the data port of the CPU and e.g. allow bytewise access.
|
||||
*/
|
||||
/* Instruction RAM */
|
||||
|
||||
KIRAM (RWX) : org = SRAM_IRAM_ORG, len = 48K
|
||||
UIRAM (RWX) : org = ORIGIN(KIRAM) + LENGTH(KIRAM), len = 64K
|
||||
UIRAM (RWX) : org = SRAM_IRAM_ORG, len = 16K
|
||||
KIRAM (RWX) : org = ORIGIN(UIRAM) + LENGTH(UIRAM), len = 32K
|
||||
|
||||
/* Flash mapped instruction data. */
|
||||
|
||||
@ -78,21 +74,21 @@ MEMORY
|
||||
|
||||
/* Shared data RAM, excluding memory reserved for ROM bss/data/stack. */
|
||||
|
||||
KDRAM (RW) : org = SRAM_DRAM_ORG + 0x18000, len = 64K
|
||||
UDRAM (RW) : org = ORIGIN(KDRAM) + LENGTH(KDRAM), len = 192K
|
||||
KDRAM (RW) : org = ORIGIN(KIRAM) + LENGTH(KIRAM) - I_D_SRAM_OFFSET, len = 64K
|
||||
UDRAM (RW) : org = ORIGIN(KDRAM) + LENGTH(KDRAM), len = 256K
|
||||
|
||||
/* Flash mapped constant data */
|
||||
|
||||
/* See KIROM region documentation above for the meaning of the 0x20 offset.
|
||||
*
|
||||
* The 0x18 offset for the UDROM region is a convenience for the User
|
||||
* The 0x30 offset for the UDROM region is a convenience for the User
|
||||
* binary image generation following a custom image format, which defines
|
||||
* a "metadata" output section containing some information that the Kernel
|
||||
* needs for properly configuring the External Flash MMU when loading the
|
||||
* User application image.
|
||||
* needs for properly configuring the External Flash MMU and initializing
|
||||
* SRAM contents when loading the User application image.
|
||||
*/
|
||||
|
||||
KDROM (R) : org = 0x3c000020, len = 0x80000 - 0x20
|
||||
UDROM (R) : org = 0x3c080018, len = 0x180000 - 0x18
|
||||
UDROM (R) : org = 0x3c080030, len = 0x180000 - 0x30
|
||||
}
|
||||
|
||||
|
||||
@ -30,7 +30,17 @@ SECTIONS
|
||||
|
||||
LONG(ADDR(.userspace))
|
||||
LONG(LOADADDR(.userspace))
|
||||
LONG(SIZEOF(.userspace) + SIZEOF(.rodata))
|
||||
LONG(LOADADDR(.rodata) + SIZEOF(.rodata) - LOADADDR(.userspace))
|
||||
|
||||
/* IRAM metadata:
|
||||
* - Destination address (VMA) for IRAM region
|
||||
* - Flash offset (LMA) for start of IRAM region
|
||||
* - Size of IRAM region
|
||||
*/
|
||||
|
||||
LONG(ADDR(.iram0.vectors))
|
||||
LONG(LOADADDR(.iram0.vectors))
|
||||
LONG(LOADADDR(.iram0.text) + SIZEOF(.iram0.text) - LOADADDR(.iram0.vectors))
|
||||
|
||||
/* IROM metadata:
|
||||
* - Destination address (VMA) for IROM region
|
||||
@ -45,6 +55,8 @@ SECTIONS
|
||||
|
||||
/* section info */
|
||||
|
||||
__kernel_vector_table = ORIGIN(KIRAM);
|
||||
|
||||
__ld_uirom_start = ORIGIN(UIROM);
|
||||
__ld_uirom_size = LENGTH(UIROM);
|
||||
__ld_uirom_end = ORIGIN(UIROM) + LENGTH(UIROM);
|
||||
@ -128,25 +140,61 @@ SECTIONS
|
||||
. = ALIGN(4);
|
||||
} >UDROM AT>ROM
|
||||
|
||||
.iram0.text :
|
||||
.iram0.vectors :
|
||||
{
|
||||
_iram_start = ABSOLUTE(.);
|
||||
|
||||
/* Vectors go to IRAM */
|
||||
|
||||
_init_start = ABSOLUTE(.);
|
||||
|
||||
__vectors_start = ABSOLUTE(.);
|
||||
|
||||
/* Vectors according to builds/RF-2015.2-win32/esp108_v1_2_s5_512int_2/config.html */
|
||||
|
||||
. = 0x0;
|
||||
KEEP (*(.window_vectors.text));
|
||||
. = 0x180;
|
||||
KEEP (*(.xtensa_level2_vector.text));
|
||||
. = 0x1c0;
|
||||
KEEP (*(.xtensa_level3_vector.text));
|
||||
. = 0x200;
|
||||
KEEP (*(.xtensa_level4_vector.text));
|
||||
. = 0x240;
|
||||
KEEP (*(.xtensa_level5_vector.text));
|
||||
. = 0x280;
|
||||
KEEP (*(.debug_exception_vector.text));
|
||||
. = 0x2c0;
|
||||
KEEP (*(.nmi_exception_vector.text));
|
||||
. = 0x300;
|
||||
KEEP (*(.kernel_exception_vector.text));
|
||||
. = 0x340;
|
||||
KEEP (*(.user_exception_vector.text));
|
||||
. = 0x3c0;
|
||||
KEEP (*(.double_exception_vector.text));
|
||||
. = 0x400;
|
||||
*(.*_vector.literal)
|
||||
|
||||
. = ALIGN (16);
|
||||
|
||||
__vectors_end = ABSOLUTE(.);
|
||||
|
||||
*(.entry.text)
|
||||
*(.init.literal)
|
||||
*(.init)
|
||||
|
||||
_init_end = ABSOLUTE(.);
|
||||
} >UIRAM AT>ROM
|
||||
|
||||
.iram0.text :
|
||||
{
|
||||
|
||||
*(.iram1)
|
||||
*(.iram1.*)
|
||||
|
||||
_iram_end = ABSOLUTE(.);
|
||||
} >UIRAM AT>ROM
|
||||
|
||||
/* This section is required to skip .iram0.text area because iram0_0_seg
|
||||
* and dram0_0_seg reflect the same address space on different buses.
|
||||
*/
|
||||
|
||||
.dram0.dummy (NOLOAD):
|
||||
{
|
||||
. = ORIGIN(UDRAM) + _iram_end - _iram_start;
|
||||
} >UDRAM
|
||||
|
||||
/* Shared RAM */
|
||||
|
||||
.bss (NOLOAD) :
|
||||
@ -170,6 +218,7 @@ SECTIONS
|
||||
*(.share.mem)
|
||||
*(.gnu.linkonce.b.*)
|
||||
*(COMMON)
|
||||
|
||||
. = ALIGN(8);
|
||||
|
||||
_ebss = ABSOLUTE(.);
|
||||
|
||||
@ -17,7 +17,6 @@ CONFIG_ARCH_CHIP="esp32s3"
|
||||
CONFIG_ARCH_CHIP_ESP32S3=y
|
||||
CONFIG_ARCH_CHIP_ESP32S3WROOM1=y
|
||||
CONFIG_ARCH_STACKDUMP=y
|
||||
CONFIG_ARCH_USE_MPU=y
|
||||
CONFIG_ARCH_XTENSA=y
|
||||
CONFIG_BOARD_LOOPSPERMSEC=16717
|
||||
CONFIG_BUILD_PROTECTED=y
|
||||
@ -25,18 +24,20 @@ CONFIG_BUILTIN=y
|
||||
CONFIG_DEBUG_FULLOPT=y
|
||||
CONFIG_DEBUG_SYMBOLS=y
|
||||
CONFIG_ESP32S3_UART0=y
|
||||
CONFIG_ESP32S3_WCL=y
|
||||
CONFIG_FS_PROCFS=y
|
||||
CONFIG_HAVE_CXX=y
|
||||
CONFIG_HAVE_CXXINITIALIZE=y
|
||||
CONFIG_IDLETHREAD_STACKSIZE=3072
|
||||
CONFIG_INIT_ENTRYPOINT="nsh_main"
|
||||
CONFIG_INIT_STACKSIZE=3072
|
||||
CONFIG_INTELHEX_BINARY=y
|
||||
CONFIG_NSH_ARCHINIT=y
|
||||
CONFIG_NSH_BUILTIN_APPS=y
|
||||
CONFIG_NSH_FILEIOSIZE=512
|
||||
CONFIG_NSH_LINELEN=64
|
||||
CONFIG_NSH_READLINE=y
|
||||
CONFIG_NUTTX_USERSPACE=0x3c080018
|
||||
CONFIG_NUTTX_USERSPACE=0x3c080030
|
||||
CONFIG_PASS1_BUILDIR="boards/xtensa/esp32s3/common/kernel"
|
||||
CONFIG_PREALLOC_TIMERS=4
|
||||
CONFIG_RAM_SIZE=114688
|
||||
|
||||
Loading…
Reference in New Issue
Block a user