Merged in young-mu/nuttx (pull request #187)
Support PWM_PULSECOUNT feature for TI tiva
This commit is contained in:
commit
1ed25c0d73
@ -107,6 +107,23 @@
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#define CC_PWMDIV_64 (0x5) /* (Value) Divided by 64 */
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#define TIVA_PWMn_CTL_ENABLE (0) /* (Bit) PWM Block Enable */
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#define CTL_DISABLE (0) /* (Value) Disable */
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#define CTL_ENABLE (1) /* (Value) Enable */
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#define INTEN_GEN3 (3) /* (Bit) Enable PWM GEN3 Interrupt */
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#define INTEN_GEN2 (2) /* (Bit) Enable PWM GEN2 Interrupt */
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#define INTEN_GEN1 (1) /* (Bit) Enable PWM GEN1 Interrupt */
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#define INTEN_GEN0 (0) /* (Bit) Enable PWM GEN0 Interrupt */
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#define INT_DISABLE (0) /* (Value) Disable */
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#define INT_ENABLE (1) /* (Value) Enable */
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#define INTCMPBD (5) /* (Bit) Interrupt for Counter=PWMnCMPB Down */
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#define INTCMPBU (4) /* (Bit) Interrupt for Counter=PWMnCMPB Up */
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#define INTCMPAD (3) /* (Bit) Interrupt for Counter=PWMnCMPA Down */
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#define INTCMPAU (2) /* (Bit) Interrupt for Counter=PWMnCMPA Up */
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#define INTCNTLOAD (1) /* (Bit) Interrupt for Counter=PWMnLOAD */
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#define INTCNTZERO (0) /* (Bit) Interrupt for Counter=0 */
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#define INT_CLR (0) /* (Value) Bit Clear */
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#define INT_SET (1) /* (Value) Bit Set */
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#endif /* __ARCH_ARM_SRC_TIVA_CHIP_TIVA_PWM_H */
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@ -85,21 +85,57 @@ struct tiva_pwm_chan_s
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uint8_t generator_id;
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uintptr_t generator_base;
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uint8_t channel_id;
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#ifdef CONFIG_PWM_PULSECOUNT
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bool inited;
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uint8_t irq;
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uint32_t count;
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uint32_t cur_count;
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FAR void *handle;
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#endif
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};
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/************************************************************************************
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* Private Function Prototypes
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************************************************************************************/
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#if defined(CONFIG_PWM_PULSECOUNT) && defined(CONFIG_TIVA_PWM0_CHAN0)
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static int tiva_pwm_gen0_interrupt(int irq, FAR void *context);
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#endif
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#if defined(CONFIG_PWM_PULSECOUNT) && defined(CONFIG_TIVA_PWM0_CHAN2)
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static int tiva_pwm_gen1_interrupt(int irq, FAR void *context);
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#endif
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#if defined(CONFIG_PWM_PULSECOUNT) && defined(CONFIG_TIVA_PWM0_CHAN4)
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static int tiva_pwm_gen2_interrupt(int irq, FAR void *context);
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#endif
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#if defined(CONFIG_PWM_PULSECOUNT) && defined(CONFIG_TIVA_PWM0_CHAN6)
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static int tiva_pwm_gen3_interrupt(int irq, FAR void *context);
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#endif
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#if defined(CONFIG_PWM_PULSECOUNT) && \
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(defined(CONFIG_TIVA_PWM0_CHAN0) || defined(CONFIG_TIVA_PWM0_CHAN2) || \
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defined(CONFIG_TIVA_PWM0_CHAN4) || defined(CONFIG_TIVA_PWM0_CHAN6))
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static int tiva_pwm_interrupt(struct tiva_pwm_chan_s *chan);
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#endif
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static inline void tiva_pwm_putreg(struct tiva_pwm_chan_s *chan,
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unsigned int offset, uint32_t regval);
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static inline uint32_t tiva_pwm_getreg(struct tiva_pwm_chan_s *chan,
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unsigned int offset);
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static inline int tiva_pwm_timer(FAR struct tiva_pwm_chan_s *chan,
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FAR const struct pwm_info_s *info);
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static int tiva_pwm_setup(FAR struct pwm_lowerhalf_s *dev);
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static int tiva_pwm_shutdown(FAR struct pwm_lowerhalf_s *dev);
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#ifdef CONFIG_PWM_PULSECOUNT
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static int tiva_pwm_start(FAR struct pwm_lowerhalf_s *dev,
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FAR const struct pwm_info_s *info, FAR void *handle);
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#else
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static int tiva_pwm_start(FAR struct pwm_lowerhalf_s *dev,
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FAR const struct pwm_info_s *info);
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#endif
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static int tiva_pwm_stop(FAR struct pwm_lowerhalf_s *dev);
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static int tiva_pwm_ioctl(FAR struct pwm_lowerhalf_s *dev,
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int cmd, unsigned long arg);
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@ -108,7 +144,7 @@ static int tiva_pwm_ioctl(FAR struct pwm_lowerhalf_s *dev,
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* Private Data
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************************************************************************************/
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static uint32_t g_pwm_freq = 15000000;
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static uint32_t g_pwm_freq = 1875000;
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static uint32_t g_pwm_counter = (1 << 16);
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static const struct pwm_ops_s g_pwm_ops =
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@ -129,6 +165,13 @@ static struct tiva_pwm_chan_s g_pwm_chan0 =
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.generator_id = 0,
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.generator_base = TIVA_PWM0_BASE + TIVA_PWMn_BASE + TIVA_PWMn_INTERVAL * 0,
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.channel_id = 0,
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#ifdef CONFIG_PWM_PULSECOUNT
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.inited = false,
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.irq = TIVA_IRQ_PWM0_GEN0,
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.count = 0,
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.cur_count = 0,
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.handle = NULL,
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#endif
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};
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#endif
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@ -141,6 +184,13 @@ static struct tiva_pwm_chan_s g_pwm_chan1 =
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.generator_id = 0,
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.generator_base = TIVA_PWM0_BASE + TIVA_PWMn_BASE + TIVA_PWMn_INTERVAL * 0,
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.channel_id = 1,
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#ifdef CONFIG_PWM_PULSECOUNT
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.inited = false,
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.irq = TIVA_IRQ_PWM0_GEN0,
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.count = 0,
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.cur_count = 0,
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.handle = NULL,
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#endif
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};
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#endif
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@ -153,6 +203,13 @@ static struct tiva_pwm_chan_s g_pwm_chan2 =
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.generator_id = 1,
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.generator_base = TIVA_PWM0_BASE + TIVA_PWMn_BASE + TIVA_PWMn_INTERVAL * 1,
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.channel_id = 2,
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#ifdef CONFIG_PWM_PULSECOUNT
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.inited = false,
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.irq = TIVA_IRQ_PWM0_GEN1,
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.count = 0,
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.cur_count = 0,
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.handle = NULL,
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#endif
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};
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#endif
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@ -165,6 +222,13 @@ static struct tiva_pwm_chan_s g_pwm_chan3 =
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.generator_id = 1,
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.generator_base = TIVA_PWM0_BASE + TIVA_PWMn_BASE + TIVA_PWMn_INTERVAL * 1,
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.channel_id = 3,
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#ifdef CONFIG_PWM_PULSECOUNT
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.inited = false,
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.irq = TIVA_IRQ_PWM0_GEN1,
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.count = 0,
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.cur_count = 0,
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.handle = NULL,
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#endif
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};
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#endif
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@ -177,6 +241,13 @@ static struct tiva_pwm_chan_s g_pwm_chan4 =
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.generator_id = 2,
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.generator_base = TIVA_PWM0_BASE + TIVA_PWMn_BASE + TIVA_PWMn_INTERVAL * 2,
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.channel_id = 4,
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#ifdef CONFIG_PWM_PULSECOUNT
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.inited = false,
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.irq = TIVA_IRQ_PWM0_GEN2,
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.count = 0,
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.cur_count = 0,
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.handle = NULL,
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#endif
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};
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#endif
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@ -189,6 +260,13 @@ static struct tiva_pwm_chan_s g_pwm_chan5 =
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.generator_id = 2,
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.generator_base = TIVA_PWM0_BASE + TIVA_PWMn_BASE + TIVA_PWMn_INTERVAL * 2,
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.channel_id = 5,
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#ifdef CONFIG_PWM_PULSECOUNT
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.inited = false,
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.irq = TIVA_IRQ_PWM0_GEN2,
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.count = 0,
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.cur_count = 0,
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.handle = NULL,
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#endif
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};
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#endif
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@ -198,9 +276,16 @@ static struct tiva_pwm_chan_s g_pwm_chan6 =
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.ops = &g_pwm_ops,
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.controller_id = 0,
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.controller_base = TIVA_PWM0_BASE,
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.generator_id = 3,
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.generator_id = 3,
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.generator_base = TIVA_PWM0_BASE + TIVA_PWMn_BASE + TIVA_PWMn_INTERVAL * 3,
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.channel_id = 6,
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#ifdef CONFIG_PWM_PULSECOUNT
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.inited = false,
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.irq = TIVA_IRQ_PWM0_GEN3,
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.count = 0,
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.cur_count = 0,
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.handle = NULL,
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#endif
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};
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#endif
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@ -213,6 +298,13 @@ static struct tiva_pwm_chan_s g_pwm_chan7 =
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.generator_id = 3,
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.generator_base = TIVA_PWM0_BASE + TIVA_PWMn_BASE + TIVA_PWMn_INTERVAL * 3,
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.channel_id = 7,
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#ifdef CONFIG_PWM_PULSECOUNT
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.inited = false,
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.irq = TIVA_IRQ_PWM0_GEN3,
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.count = 0,
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.cur_count = 0,
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.handle = NULL,
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#endif
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};
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#endif
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@ -220,6 +312,60 @@ static struct tiva_pwm_chan_s g_pwm_chan7 =
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* Private Functions
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************************************************************************************/
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#if defined(CONFIG_PWM_PULSECOUNT) && defined(CONFIG_TIVA_PWM0_CHAN0)
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static int tiva_pwm_gen0_interrupt(int irq, FAR void *context)
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{
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return tiva_pwm_interrupt(&g_pwm_chan0);
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}
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#endif
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#if defined(CONFIG_PWM_PULSECOUNT) && defined(CONFIG_TIVA_PWM0_CHAN2)
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static int tiva_pwm_gen1_interrupt(int irq, FAR void *context)
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{
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return tiva_pwm_interrupt(&g_pwm_chan2);
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}
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#endif
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#if defined(CONFIG_PWM_PULSECOUNT) && defined(CONFIG_TIVA_PWM0_CHAN4)
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static int tiva_pwm_gen2_interrupt(int irq, FAR void *context)
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{
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return tiva_pwm_interrupt(&g_pwm_chan4);
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}
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#endif
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#if defined(CONFIG_PWM_PULSECOUNT) && defined(CONFIG_TIVA_PWM0_CHAN6)
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static int tiva_pwm_gen3_interrupt(int irq, FAR void *context)
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{
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return tiva_pwm_interrupt(&g_pwm_chan6);
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}
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#endif
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#if defined(CONFIG_PWM_PULSECOUNT) && \
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(defined(CONFIG_TIVA_PWM0_CHAN0) || defined(CONFIG_TIVA_PWM0_CHAN2) || \
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defined(CONFIG_TIVA_PWM0_CHAN4) || defined(CONFIG_TIVA_PWM0_CHAN6))
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static int tiva_pwm_interrupt(struct tiva_pwm_chan_s *chan)
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{
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/* Clear interrupt */
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tiva_pwm_putreg(chan, TIVA_PWMn_ISC_OFFSET, INT_SET << INTCMPAD);
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/* Count down current pulse count */
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chan->cur_count--;
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/* Disable PWM generator and reload current pulse count */
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if (chan->cur_count == 0)
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{
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tiva_pwm_putreg(chan, TIVA_PWMn_CTL_OFFSET, CTL_DISABLE << TIVA_PWMn_CTL_ENABLE);
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chan->cur_count = chan->count;
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pwm_expired(chan->handle);
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}
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return 0;
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}
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#endif
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/************************************************************************************
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* Name: tiva_pwm_getreg
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*
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@ -251,7 +397,7 @@ static inline void tiva_pwm_putreg(struct tiva_pwm_chan_s *chan,
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}
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/****************************************************************************
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* Name: pwm_setup
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* Name: tiva_pwm_setup
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*
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* Description:
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* This method is called when the driver is opened. The lower half driver
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@ -288,7 +434,7 @@ static int tiva_pwm_setup(FAR struct pwm_lowerhalf_s *dev)
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}
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/****************************************************************************
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* Name: pwm_shutdown
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* Name: tiva_pwm_shutdown
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*
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* Description:
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* This method is called when the driver is closed. The lower half driver
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@ -320,7 +466,7 @@ static int tiva_pwm_shutdown(FAR struct pwm_lowerhalf_s *dev)
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}
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/****************************************************************************
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* Name: pwm_start
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* Name: tiva_pwm_start
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*
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* Description:
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* (Re-)initialize the timer resources and start the pulsed output
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@ -328,33 +474,117 @@ static int tiva_pwm_shutdown(FAR struct pwm_lowerhalf_s *dev)
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* Input parameters:
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* dev - A reference to the lower half PWM driver state structure
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* info - A reference to the characteristics of the pulsed output
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* handle - This is the handle that was provided to the lower-half
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* start() method.
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*
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* Returned Value:
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* Zero on success; a negated errno value on failure
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*
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****************************************************************************/
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#ifdef CONFIG_PWM_PULSECOUNT
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static int tiva_pwm_start(FAR struct pwm_lowerhalf_s *dev,
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FAR const struct pwm_info_s *info, FAR void *handle)
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{
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FAR struct tiva_pwm_chan_s *chan = (FAR struct tiva_pwm_chan_s *)dev;
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pwminfo("start PWM for channel %d\n", chan->channel_id);
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/* Save the handle */
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chan->handle = handle;
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/* Load pulse count and current pulse count
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*
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* Workaround:
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* Count should be add 1 for the first time
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*/
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chan->count = info->count;
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chan->cur_count = info->count;
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if (!chan->inited)
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{
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chan->count++;
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chan->cur_count++;
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chan->inited = true;
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}
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/* Count 0 means to generate indefinite number of pulses */
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if (info->count == 0)
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{
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pwm_expired(chan->handle);
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/* Disable interrupt */
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uint32_t enable = getreg32(chan->controller_base + TIVA_PWM_INTEN_OFFSET);
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enable &= ~(INT_ENABLE << chan->generator_id);
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putreg32(enable, chan->controller_base + TIVA_PWM_INTEN_OFFSET);
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}
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else
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{
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/* Enable interrupt */
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uint32_t enable = getreg32(chan->controller_base + TIVA_PWM_INTEN_OFFSET);
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enable |= (INT_ENABLE << chan->generator_id);
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putreg32(enable, chan->controller_base + TIVA_PWM_INTEN_OFFSET);
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}
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/* Start the timer */
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return tiva_pwm_timer(chan, info);
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}
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#else
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static int tiva_pwm_start(FAR struct pwm_lowerhalf_s *dev,
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FAR const struct pwm_info_s *info)
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{
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FAR struct tiva_pwm_chan_s *chan = (FAR struct tiva_pwm_chan_s *)dev;
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pwminfo("start PWM for channel %d\n", chan->channel_id);
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/* Start the timer */
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return tiva_pwm_timer(chan, info);
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}
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#endif
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/****************************************************************************
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* Name: tiva_pwm_timer
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*
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* Description:
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* Configure PWM registers and start the PWM timer
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*
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* Input parameters:
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* dev - A reference to the lower half PWM driver state structure
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* info - A reference to the characteristics of the pulsed output
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*
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* Returned Value:
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* Zero on success; a negated errno value on failure
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*
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****************************************************************************/
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static int tiva_pwm_start(FAR struct pwm_lowerhalf_s *dev,
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FAR const struct pwm_info_s *info)
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static inline int tiva_pwm_timer(FAR struct tiva_pwm_chan_s *chan,
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FAR const struct pwm_info_s *info)
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{
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FAR struct tiva_pwm_chan_s *chan = (FAR struct tiva_pwm_chan_s *)dev;
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pwminfo("start PWM for channel %d\n", chan->channel_id);
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uint16_t duty = info->duty;
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uint32_t frequency = info->frequency;
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pwminfo("> frequency = %d\n", frequency);
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pwminfo("> duty = %d\n", duty);
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/* Configure PWM countdown mode (refer to TM4C1294NC 23.4.6) */
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tiva_pwm_putreg(chan, TIVA_PWMn_CTL_OFFSET, 0);
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if (chan->channel_id % 2 == 0)
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{
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tiva_pwm_putreg(chan, TIVA_PWMn_GENA_OFFSET,
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GENx_LOW << TIVA_PWMn_GENx_ACTCMPAD | GENx_HIGH << TIVA_PWMn_GENx_ACTLOAD);
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GENx_LOW << TIVA_PWMn_GENx_ACTCMPAD |
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GENx_HIGH << TIVA_PWMn_GENx_ACTLOAD);
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}
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else
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{
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tiva_pwm_putreg(chan, TIVA_PWMn_GENB_OFFSET,
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GENx_LOW << TIVA_PWMn_GENx_ACTCMPBD | GENx_HIGH << TIVA_PWMn_GENx_ACTLOAD);
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GENx_LOW << TIVA_PWMn_GENx_ACTCMPBD |
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GENx_HIGH << TIVA_PWMn_GENx_ACTLOAD);
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}
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/* Set the PWM period (refer to TM4C1294NC 23.4.7) */
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@ -363,7 +593,7 @@ static int tiva_pwm_start(FAR struct pwm_lowerhalf_s *dev,
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uint32_t pwm_max_freq = g_pwm_freq;
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uint32_t load = (uint32_t)(g_pwm_freq / frequency);
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|
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pwminfo("channel %d: load = %u (%08x)\n", chan->channel_id, load, load);
|
||||
pwminfo("> load = %u (%08x)\n", load, load);
|
||||
|
||||
if (load >= g_pwm_counter || load < 1)
|
||||
{
|
||||
@ -383,7 +613,7 @@ static int tiva_pwm_start(FAR struct pwm_lowerhalf_s *dev,
|
||||
|
||||
uint32_t comp = (uint32_t)((1 - (float)duty / g_pwm_counter) * load);
|
||||
comp = (duty == 0) ? (comp - 1) : (comp);
|
||||
pwminfo("channel %d: comp = %u (%08x)\n", chan->channel_id, comp, comp);
|
||||
pwminfo("> comp = %u (%08x)\n", comp, comp);
|
||||
|
||||
if (chan->channel_id % 2 == 0)
|
||||
{
|
||||
@ -408,7 +638,7 @@ static int tiva_pwm_start(FAR struct pwm_lowerhalf_s *dev,
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Name: pwm_stop
|
||||
* Name: tiva_pwm_stop
|
||||
*
|
||||
* Description:
|
||||
* Stop the pulsed output and reset the timer resources
|
||||
@ -441,7 +671,7 @@ static int tiva_pwm_stop(FAR struct pwm_lowerhalf_s *dev)
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Name: pwm_ioctl
|
||||
* Name: tiva_pwm_ioctl
|
||||
*
|
||||
* Description:
|
||||
* Lower-half logic may support platform-specific ioctl commands
|
||||
@ -550,11 +780,12 @@ FAR struct pwm_lowerhalf_s *tiva_pwm_initialize(int channel)
|
||||
return NULL;
|
||||
}
|
||||
|
||||
pwminfo("channel %d: channel_id=%d, ", channel, chan->channel_id);
|
||||
pwminfo("controller_id=%d, controller_base=%08x, ",
|
||||
chan->controller_id, chan->controller_base);
|
||||
pwminfo("generator_id=%d, generator_base=%08x\n",
|
||||
chan->generator_id, chan->generator_base);
|
||||
pwminfo("channel %d:\n", channel);
|
||||
pwminfo("> channel_id = %d\n", chan->channel_id);
|
||||
pwminfo("> controller_id = %d\n", chan->controller_id);
|
||||
pwminfo("> controller_base = %08x\n", chan->controller_base);
|
||||
pwminfo("> generator_id = %d\n", chan->generator_id);
|
||||
pwminfo("> generator_base = %08x\n", chan->generator_base);
|
||||
|
||||
/* Enable PWM controller (refer to TM4C1294NC 23.4.1) */
|
||||
|
||||
@ -564,14 +795,55 @@ FAR struct pwm_lowerhalf_s *tiva_pwm_initialize(int channel)
|
||||
|
||||
/* Configure PWM Clock Configuration (refer to TM4C1294NC 23.4.5)
|
||||
*
|
||||
* On TM4C1294NC, configure the PWM clock source as 15MHz (the system
|
||||
* clock 120MHz divided by 8)
|
||||
* On TM4C1294NC, configure the PWM clock source as 1.875MHz (the system
|
||||
* clock 120MHz divided by 64)
|
||||
*
|
||||
* TODO: need an algorithm to choose the best divider and load value combo.
|
||||
*/
|
||||
|
||||
putreg32(CC_USEPWM << TIVA_PWM_CC_USEPWM | CC_PWMDIV_8 << TIVA_PWM_CC_PWMDIV,
|
||||
putreg32(CC_USEPWM << TIVA_PWM_CC_USEPWM | CC_PWMDIV_64 << TIVA_PWM_CC_PWMDIV,
|
||||
chan->controller_base + TIVA_PWM_CC);
|
||||
|
||||
#ifdef CONFIG_PWM_PULSECOUNT
|
||||
|
||||
/* Enable interrupt INTCMPAD mode */
|
||||
|
||||
tiva_pwm_putreg(chan, TIVA_PWMn_INTEN_OFFSET, INT_SET << INTCMPAD);
|
||||
|
||||
/* Attach IRQ handler and enable interrupt*/
|
||||
|
||||
switch (chan->channel_id)
|
||||
{
|
||||
#ifdef CONFIG_TIVA_PWM0_CHAN0
|
||||
case 0:
|
||||
irq_attach(chan->irq, tiva_pwm_gen0_interrupt);
|
||||
up_enable_irq(chan->irq);
|
||||
break;
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_TIVA_PWM0_CHAN2
|
||||
case 2:
|
||||
irq_attach(chan->irq, tiva_pwm_gen1_interrupt);
|
||||
up_enable_irq(chan->irq);
|
||||
break;
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_TIVA_PWM0_CHAN4
|
||||
case 4:
|
||||
irq_attach(chan->irq, tiva_pwm_gen2_interrupt);
|
||||
up_enable_irq(chan->irq);
|
||||
break;
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_TIVA_PWM0_CHAN6
|
||||
case 6:
|
||||
irq_attach(chan->irq, tiva_pwm_gen3_interrupt);
|
||||
up_enable_irq(chan->irq);
|
||||
break;
|
||||
#endif
|
||||
}
|
||||
|
||||
#endif
|
||||
|
||||
return (FAR struct pwm_lowerhalf_s *)chan;
|
||||
}
|
||||
|
Loading…
Reference in New Issue
Block a user