SAM3/4 T/C driver updated to get closer to coding standard
This commit is contained in:
Gregory Nutt
parent
61555fe5e1
commit
1fb0384fe7
@ -55,14 +55,18 @@
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//#define CONFIG_SAM34_TC_REGDEBUG
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#if defined(CONFIG_TIMER) && (defined(CONFIG_SAM34_TC0) || defined(CONFIG_SAM34_TC1) || defined(CONFIG_SAM34_TC2) || defined(CONFIG_SAM34_TC3) || defined(CONFIG_SAM34_TC4) || defined(CONFIG_SAM34_TC5))
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#if defined(CONFIG_TIMER) && (defined(CONFIG_SAM34_TC0) || \
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defined(CONFIG_SAM34_TC1) || defined(CONFIG_SAM34_TC2) || \
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defined(CONFIG_SAM34_TC3) || defined(CONFIG_SAM34_TC4) || \
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defined(CONFIG_SAM34_TC5))
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/****************************************************************************
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* Pre-Processor Definitions
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****************************************************************************/
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/* Clocking *****************************************************************/
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#warning "TODO: allow selection of any of the input clocks"
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/* TODO: Allow selection of any of the input clocks */
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#define TC_FCLK (BOARD_SLCK_FREQUENCY)
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#define TC_MAXTIMEOUT ((1000000ULL * (1ULL + TC_RVALUE_MASK)) / TC_FCLK)
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@ -184,6 +188,7 @@ static uint32_t sam34_getreg(uint32_t addr)
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{
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lldbg("...\n");
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}
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return val;
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}
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}
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@ -250,6 +255,7 @@ static void sam34_putreg(uint32_t val, uint32_t addr)
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* Always returns OK.
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*
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****************************************************************************/
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static int sam34_interrupt(int irq, FAR void *context)
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{
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FAR struct sam34_lowerhalf_s *priv = &g_tcdev;
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@ -258,16 +264,20 @@ static int sam34_interrupt(int irq, FAR void *context)
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tcvdbg("Entry\n");
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/* Check if the interrupt is really pending */
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regval = sam34_getreg(SAM_TC0_SR);
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if ((regval & TC_INT_CPCS) != 0)
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{
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/* Is there a registered handler? */
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if (priv->handler)
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{
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priv->handler(irq, context);
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/* Is there a registered handler? */
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if (priv->handler)
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{
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priv->handler(irq, context);
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}
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/* TC_INT_CPCS is cleared by reading SAM_TC0_SR */
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}
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/* TC_INT_CPCS is cleared by reading SAM_TC0_SR */
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}
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return OK;
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}
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@ -298,22 +308,25 @@ static int sam34_start(FAR struct timer_lowerhalf_s *lower)
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sam34_putreg(TC_CCR_CLKDIS, SAM_TC0_CCR); // disable counter
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// TC_CMR_WAVE - waveform mode
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// TC_CMR_WAVSEL_UPAUTO - reset on RC compare (interval timer)
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// TC_CMR_TCCLKS_TIMERCLOCK5 = SCLK
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/* TC_CMR_WAVE - waveform mode
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* TC_CMR_WAVSEL_UPAUTO - reset on RC compare (interval timer)
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* TC_CMR_TCCLKS_TIMERCLOCK5 = SCLK
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*/
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mr_val |= (TC_CMR_WAVE + TC_CMR_WAVSEL_UPAUTO + TC_CMR_TCCLKS_TIMERCLOCK5);
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sam34_putreg(mr_val, SAM_TC0_CMR);
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sam34_putreg(priv->reload, SAM_TC0_RC); // set interval
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#warning "isr active without user handle for now..."
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// if(priv->handler)
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// {
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// clear status
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sam34_getreg(SAM_TC0_SR);
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sam34_putreg(TC_INT_CPCS, SAM_TC0_IMR);
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sam34_putreg(TC_INT_CPCS, SAM_TC0_IER);
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// }
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/* TODO: isr active without user handle for now... */
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// if (priv->handler)
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{
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/* Clear status */
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sam34_getreg(SAM_TC0_SR);
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sam34_putreg(TC_INT_CPCS, SAM_TC0_IMR);
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sam34_putreg(TC_INT_CPCS, SAM_TC0_IER);
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}
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sam34_putreg(TC_CCR_SWTRG + TC_CCR_CLKEN, SAM_TC0_CCR); // start counter
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@ -434,11 +447,13 @@ static int sam34_settimeout(FAR struct timer_lowerhalf_s *lower,
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}
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#warning "-1 or no?"
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reload = (((uint64_t)timeout * TC_FCLK) / 1000000) - 1;
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/* TODOR: -1 or no? */
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reload = (((uint64_t)timeout * TC_FCLK) / 1000000) - 1;
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/* Make sure that the final reload value is within range */
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#warning "+1 or no?"
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/* TODOR: +1 or no? */
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if (reload > TC_CV_MASK)
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{
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reload = TC_CV_MASK;
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@ -458,7 +473,7 @@ static int sam34_settimeout(FAR struct timer_lowerhalf_s *lower,
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tcvdbg("fwdt=%d reload=%d timout=%d\n",
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TC_FCLK, reload, priv->timeout);
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// Don't commit to MR register until started!
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/* Don't commit to MR register until started! */
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return OK;
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}
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@ -585,6 +600,7 @@ static int sam34_ioctl(FAR struct timer_lowerhalf_s *lower, int cmd,
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* None
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*
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****************************************************************************/
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void sam_tcinitialize(FAR const char *devpath, int irq)
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{
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FAR struct sam34_lowerhalf_s *priv = &g_tcdev;
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@ -601,16 +617,23 @@ void sam_tcinitialize(FAR const char *devpath, int irq)
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*/
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priv->ops = &g_tcops;
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#warning "add irq + switch in sam34_interrupt or something (also need register base address..."
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/* TODO: Add irq + switch in sam34_interrupt or something (also need register
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* base address...
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*/
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(void)irq_attach(irq, sam34_interrupt);
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// enable interrupt.
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#warning "may want to enable/disable in start/stop..."
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/* enable interrupt.
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*
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* TODO: May want to enable/disable in start/stop...
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*/
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up_enable_irq(irq);
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/* Register the timer driver as /dev/timerX */
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(void)timer_register(devpath, (FAR struct timer_lowerhalf_s *)priv);
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(void)timer_register(devpath, (FAR struct timer_lowerhalf_s *)priv);
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}
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#endif /* CONFIG_TIMER && CONFIG_SAM34_TCx */
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@ -1,7 +1,7 @@
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/****************************************************************************
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* arch/arm/src/sam34/sam_tc.h
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*
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* Copyright (C) 2012 Gregory Nutt. All rights reserved.
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* Copyright (C) 2014 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <gnutt@nuttx.org>
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*
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* Redistribution and use in source and binary forms, with or without
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@ -56,7 +56,8 @@
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#undef EXTERN
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#if defined(__cplusplus)
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#define EXTERN extern "C"
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extern "C" {
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extern "C"
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{
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#else
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#define EXTERN extern
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#endif
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@ -82,8 +83,10 @@ extern "C" {
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*
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****************************************************************************/
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#if defined(CONFIG_SAM34_TC0) || defined(CONFIG_SAM34_TC1) || defined(CONFIG_SAM34_TC2) || defined(CONFIG_SAM34_TC3) || defined(CONFIG_SAM34_TC4) || defined(CONFIG_SAM34_TC5)
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EXTERN void sam_tcinitialize(FAR const char *devpath, int irq);
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#if defined(CONFIG_SAM34_TC0) || defined(CONFIG_SAM34_TC1) || \
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defined(CONFIG_SAM34_TC2) || defined(CONFIG_SAM34_TC3) || \
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defined(CONFIG_SAM34_TC4) || defined(CONFIG_SAM34_TC5)
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void sam_tcinitialize(FAR const char *devpath, int irq);
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#endif
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#undef EXTERN
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