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Xtensa: Timer code now compiles okay

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This commit is contained in:
Gregory Nutt 2016-10-23 11:31:48 -06:00
parent 2b33768d09
commit 1fcced12eb
5 changed files with 31 additions and 32 deletions
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1
arch/xtensa/include/esp32/core-isa.h
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@ -443,6 +443,7 @@
/* Interrupt numbers assigned to specific interrupt sources: */
#define XTHAL_TIMER_UNCONFIGURED -1 /* REVISIT: should be in hal.h */
#define XCHAL_TIMER0_INTERRUPT 6 /* CCOMPARE0 */
#define XCHAL_TIMER1_INTERRUPT 15 /* CCOMPARE1 */
#define XCHAL_TIMER2_INTERRUPT 16 /* CCOMPARE2 */

8
arch/xtensa/include/xtensa/core.h
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@ -685,10 +685,10 @@
/* Internal I/D RAMS/ROMS and XLMI ******************************************/
#define XCHAL_NUM_IROM XCHAL_NUM_INSTROM /* (DEPRECATED) */
#define XCHAL_NUM_IRAM XCHAL_NUM_INSTRAM /* (DEPRECATED) */
#define XCHAL_NUM_DROM XCHAL_NUM_DATAROM /* (DEPRECATED) */
#define XCHAL_NUM_DRAM XCHAL_NUM_DATARAM /* (DEPRECATED) */
#define XCHAL_NUM_IROM XCHAL_NUM_INSTROM /* (DEPRECATED) */
#define XCHAL_NUM_IRAM XCHAL_NUM_INSTRAM /* (DEPRECATED) */
#define XCHAL_NUM_DROM XCHAL_NUM_DATAROM /* (DEPRECATED) */
#define XCHAL_NUM_DRAM XCHAL_NUM_DATARAM /* (DEPRECATED) */
#define XCHAL_IROM0_VADDR XCHAL_INSTROM0_VADDR /* (DEPRECATED) */
#define XCHAL_IROM0_PADDR XCHAL_INSTROM0_PADDR /* (DEPRECATED) */

20
arch/xtensa/src/common/xtensa_timer.h
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@ -1,5 +1,5 @@
/****************************************************************************
* arch/xtensa/src/common/xtensa_irq.S
* arch/xtensa/src/common/xtensa_timer.h
*
* Adapted from use in NuttX by:
*
@ -34,12 +34,12 @@
#define __ARCH_XTENSA_SRC_COMMON_XTENSA_TIMER_H
#ifdef __ASSEMBLER__
#include <xtensa/coreasm.h>
# include <xtensa/coreasm.h>
#endif
#include <arch/xtensa/core.h>
#include <arch/xtensa/xtensa_corebits.h>
//#include <xtensa/config/system.h>
#include <arch/board/board.h>
/* Select timer to use for periodic tick, and determine its interrupt number
* and priority. User may specify a timer by defining XT_TIMER_INDEX with -D,
@ -85,7 +85,7 @@
#endif
#define XT_CCOMPARE (CCOMPARE + XT_TIMER_INDEX)
#define XT_TIMER_INTNUM XTENSA_TIMER_INTERRUPT(XT_TIMER_INDEX)
#define XT_TIMER_INTNUM XCHAL_TIMER_INTERRUPT(XT_TIMER_INDEX)
#define XT_TIMER_INTPRI XCHAL_INT_LEVEL(XT_TIMER_INTNUM)
#define XT_TIMER_INTEN (1 << XT_TIMER_INTNUM)
@ -115,12 +115,12 @@
* anyway!).
*/
#if defined(XT_SIMULATOR) && !defined(XT_CLOCK_FREQ)
# define XT_CLOCK_FREQ
#if defined(XT_SIMULATOR) && !defined(BOARD_CLOCK_FREQUENCY)
# define BOARD_CLOCK_FREQUENCY
#endif
#if !defined(XT_CLOCK_FREQ) && !defined(XT_BOARD)
# error "XT_CLOCK_FREQ must be defined for the target platform."
#if !defined(BOARD_CLOCK_FREQUENCY) && !defined(XT_BOARD)
# warning "BOARD_CLOCK_FREQUENCY must be defined for the target platform."
#endif
/* Default number of timer "ticks" per second (default 100 for 10ms tick).
@ -136,8 +136,8 @@
/* Derivation of clock divisor for timer tick and interrupt (one per tick). */
#ifdef XT_CLOCK_FREQ
# define XT_TICK_DIVISOR (XT_CLOCK_FREQ / XT_TICK_PER_SEC)
#ifdef BOARD_CLOCK_FREQUENCY
# define XT_TICK_DIVISOR (BOARD_CLOCK_FREQUENCY / XT_TICK_PER_SEC)
#endif
#ifndef __ASSEMBLER__

30
arch/xtensa/src/esp32/esp32_timerisr.c
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@ -44,20 +44,13 @@
#include <debug.h>
#include <nuttx/arch.h>
#include <arch/board/board.h>
#include <arch/xtensa/xtensa_specregs.h>
#include <arch/board/board.h>
#include "clock/clock.h"
#include "xtensa_timer.h"
#include "xtensa.h"
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
#warning REVISIT .. Need XT_CLOCK_FREQ
#define XT_CLOCK_FREQ 80000000
/****************************************************************************
* Private data
****************************************************************************/
@ -99,7 +92,7 @@ static inline uint32_t xtensa_getcompare(void)
__asm__ __volatile__
(
"rsr %0, XT_CCOMPARE" : "=r"(compare)
"rsr %0, %1" : "=r"(compare) : "I"(XT_CCOMPARE)
);
return compare;
@ -111,7 +104,7 @@ static inline void xtensa_setcompare(uint32_t compare)
{
__asm__ __volatile__
(
"wsr %0, XT_CCOMPARE" : : "r"(compare)
"wsr %0, %1" : : "r"(compare), "I"(XT_CCOMPARE)
);
}
@ -123,10 +116,11 @@ static inline void xtensa_enable_timer(void)
{
__asm__ __volatile__
(
"rsr a2, INTENABLE\n"
"ori a2, XT_TIMER_INTEN\n"
"wsr a2, INTENABLE\n"
: : : "a2"
"movi a3, %0\n"
"rsr a2, INTENABLE\n"
"or a2, a2, a3\n"
"wsr a2, INTENABLE\n"
: : "I"(XT_TIMER_INTEN) : "a2", "a3"
);
}
@ -198,14 +192,14 @@ void xtensa_timer_initialize(void)
/* Configured the timer0 as the system timer.
*
* divisor = XT_CLOCK_FREQ / ticks_per_sec
* = XT_CLOCK_FREQ / (ticks_per_usec * 1000000)
* = (1000000 * XT_CLOCK_FREQ) / ticks_per_usec
* divisor = BOARD_CLOCK_FREQUENCY / ticks_per_sec
* = BOARD_CLOCK_FREQUENCY / (ticks_per_usec * 1000000)
* = (1000000 * BOARD_CLOCK_FREQUENCY) / ticks_per_usec
*
* A long long calculation is used to preserve accuracy in all cases.
*/
divisor = (1000000ull * (uint64_t)XT_CLOCK_FREQ) / CONFIG_USEC_PER_TICK;
divisor = (1000000ull * (uint64_t)BOARD_CLOCK_FREQUENCY) / CONFIG_USEC_PER_TICK;
DEBUGASSERT(divisor <= UINT32_MAX)
g_tick_divisor = divisor;

4
configs/esp32-core/include/board.h
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@ -40,4 +40,8 @@
* Pre-processor Definitions
****************************************************************************/
/* Clocking ****************************************************************/
#define BOARD_CLOCK_FREQUENCY 80000000
#endif /* __CONFIGS_ESP32_CORE_INCLUDE_BOARD_H */