Add courier system driver
This change implements a system for allowing the D0 core (which runs NuttX) to receive forwarded interrupts from the M0 core. This makes it possible for drivers that rely on interrupts to work with peripherals attached to the M0 core.
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142a1e186e
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210ea76b04
@ -31,10 +31,18 @@
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/* Map RISC-V exception code to NuttX IRQ */
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#define NR_IRQS (RISCV_IRQ_SEXT + 57)
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#define NR_IRQS (RISCV_IRQ_SEXT + 114)
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#define BL808_IRQ_NUM_BASE (16)
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#define BL808_M0_IRQ_OFFSET (64) // IRQs tied to M0 core are given a virtual IRQ number
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/* D0 IRQs ******************************************************************/
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#define BL808_IRQ_UART3 (RISCV_IRQ_SEXT + BL808_IRQ_NUM_BASE + 4)
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#define BL808_IRQ_D0_IPC (RISCV_IRQ_SEXT + BL808_IRQ_NUM_BASE + 38)
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/* M0 IRQs ******************************************************************/
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#define BL808_IRQ_UART0 (RISCV_IRQ_SEXT + BL808_IRQ_NUM_BASE + BL808_M0_IRQ_OFFSET + 28)
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#define BL808_IRQ_UART1 (RISCV_IRQ_SEXT + BL808_IRQ_NUM_BASE + BL808_M0_IRQ_OFFSET + 29)
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#define BL808_IRQ_UART2 (RISCV_IRQ_SEXT + BL808_IRQ_NUM_BASE + BL808_M0_IRQ_OFFSET + 30)
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#endif /* __ARCH_RISCV_INCLUDE_BL808_IRQ_H */
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@ -28,3 +28,4 @@ HEAD_ASRC = bl808_head.S
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CHIP_CSRCS = bl808_start.c bl808_irq_dispatch.c bl808_irq.c
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CHIP_CSRCS += bl808_timerisr.c bl808_allocateheap.c
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CHIP_CSRCS += bl808_mm_init.c bl808_pgalloc.c bl808_serial.c
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CHIP_CSRCS += bl808_courier.c
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123
arch/risc-v/src/bl808/bl808_courier.c
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123
arch/risc-v/src/bl808/bl808_courier.c
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@ -0,0 +1,123 @@
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/****************************************************************************
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* arch/risc-v/src/bl808/bl808_courier.c
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*
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* Licensed to the Apache Software Foundation (ASF) under one or more
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* contributor license agreements. See the NOTICE file distributed with
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* this work for additional information regarding copyright ownership. The
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* ASF licenses this file to you under the Apache License, Version 2.0 (the
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* "License"); you may not use this file except in compliance with the
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* License. You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
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* License for the specific language governing permissions and limitations
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* under the License.
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*
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****************************************************************************/
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/config.h>
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#include <nuttx/arch.h>
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#include <sys/types.h>
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#include <stdint.h>
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#include <stdbool.h>
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#include <unistd.h>
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#include <errno.h>
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#include <debug.h>
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#include <nuttx/irq.h>
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#include "hardware/bl808_ipc.h"
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#include "riscv_internal.h"
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#include "chip.h"
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#include "bl808_courier.h"
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/****************************************************************************
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* Private Functions
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****************************************************************************/
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/****************************************************************************
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* Name: courier_interrupt
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*
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* Description:
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* Interrupt handler for IPC. Reads the IPC message, gets the interrupt
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* number and dispatches the appropriate handler.
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*
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****************************************************************************/
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static int __courier_interrupt(int irq, void *context, void *arg)
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{
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uint32_t msg = getreg32(IPC2_MSG_READ);
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int m0_extirq = msg & BL808_COURIER_IRQN_MASK;
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int irqn = m0_extirq + BL808_M0_IRQ_OFFSET + RISCV_IRQ_SEXT;
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irq_dispatch(irqn, NULL);
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bl808_courier_req_irq_enable(m0_extirq);
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putreg32(msg, IPC2_MSG_ACK);
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return OK;
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}
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/****************************************************************************
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* Public Functions
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****************************************************************************/
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/****************************************************************************
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* Name: bl808_courier_req_irq_disable
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*
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* Description:
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* Sends an IPC message to M0 core to enable m0_extirq.
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*
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****************************************************************************/
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void bl808_courier_req_irq_enable(int m0_extirq)
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{
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putreg32((m0_extirq & BL808_COURIER_IRQN_MASK)
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| (1 << BL808_INT_SIG_SHIFT)
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| (1 << BL808_INT_EN_SHIFT),
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IPC0_MSG_SEND);
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}
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/****************************************************************************
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* Name: bl808_courier_req_irq_disable
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*
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* Description:
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* Sends an IPC message to M0 core to disable m0_extirq.
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*
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****************************************************************************/
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void bl808_courier_req_irq_disable(int m0_extirq)
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{
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putreg32((m0_extirq & BL808_COURIER_IRQN_MASK)
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| (1 << BL808_INT_SIG_SHIFT),
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IPC0_MSG_SEND);
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}
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/****************************************************************************
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* Name: bl808_courier_init
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*
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* Description:
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* Enables the IPC interrupt on D0 core and attaches its handler.
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*
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****************************************************************************/
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int bl808_courier_init(void)
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{
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putreg32((1 << BL808_INT_SIG_SHIFT), IPC2_INT_UNMASK);
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int ret = irq_attach(BL808_IRQ_D0_IPC, __courier_interrupt, NULL);
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if (ret == OK)
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{
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up_enable_irq(BL808_IRQ_D0_IPC);
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}
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return ret;
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}
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66
arch/risc-v/src/bl808/bl808_courier.h
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66
arch/risc-v/src/bl808/bl808_courier.h
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@ -0,0 +1,66 @@
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/****************************************************************************
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* arch/risc-v/src/bl808/bl808_courier.h
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*
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* Licensed to the Apache Software Foundation (ASF) under one or more
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* contributor license agreements. See the NOTICE file distributed with
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* this work for additional information regarding copyright ownership. The
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* ASF licenses this file to you under the Apache License, Version 2.0 (the
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* "License"); you may not use this file except in compliance with the
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* License. You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
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* License for the specific language governing permissions and limitations
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* under the License.
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*
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****************************************************************************/
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#ifndef __ARCH_RISC_V_SRC_BL808_BL808_COURIER_H
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#define __ARCH_RISC_V_SRC_BL808_BL808_COURIER_H
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/****************************************************************************
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* Pre-processor Definitions
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****************************************************************************/
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#define BL808_COURIER_IRQN_MASK 0xff
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#define BL808_INT_SIG_SHIFT 8
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#define BL808_INT_EN_SHIFT 9
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/****************************************************************************
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* Public Functions Prototypes
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****************************************************************************/
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/****************************************************************************
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* Name: bl808_courier_req_irq_enable
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*
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* Description:
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* Sends an IPC message to M0 core to enable m0_extirq.
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*
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****************************************************************************/
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void bl808_courier_req_irq_enable(int m0_extirq);
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/****************************************************************************
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* Name: bl808_courier_req_irq_disable
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*
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* Description:
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* Sends an IPC message to M0 core to disable m0_extirq.
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*
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****************************************************************************/
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void bl808_courier_req_irq_disable(int m0_extirq);
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/****************************************************************************
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* Name: bl808_courier_init
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*
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* Description:
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* Enables the IPC interrupt on D0 core and attaches its handler.
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*
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****************************************************************************/
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int bl808_courier_init(void);
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#endif /* __ARCH_RISC_V_SRC_BL808_BL808_COURIER_H */
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@ -36,6 +36,8 @@
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#include "riscv_ipi.h"
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#include "chip.h"
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#include "bl808_courier.h"
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/****************************************************************************
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* Public Functions
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****************************************************************************/
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@ -137,6 +139,11 @@ void up_disable_irq(int irq)
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modifyreg32(BL808_PLIC_ENABLE1 + (4 * (extirq / 32)),
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1 << (extirq % 32), 0);
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}
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else if (64 <= extirq && extirq <= 127)
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{
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int m0_extirq = extirq - BL808_M0_IRQ_OFFSET;
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bl808_courier_req_irq_disable(m0_extirq);
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}
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else
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{
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PANIC();
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@ -179,6 +186,11 @@ void up_enable_irq(int irq)
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modifyreg32(BL808_PLIC_ENABLE1 + (4 * (extirq / 32)),
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0, 1 << (extirq % 32));
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}
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else if (64 <= extirq && extirq <= 127)
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{
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int m0_extirq = extirq - BL808_M0_IRQ_OFFSET;
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bl808_courier_req_irq_enable(m0_extirq);
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}
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else
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{
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PANIC();
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40
arch/risc-v/src/bl808/hardware/bl808_ipc.h
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40
arch/risc-v/src/bl808/hardware/bl808_ipc.h
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@ -0,0 +1,40 @@
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/****************************************************************************
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* arch/risc-v/src/bl808/hardware/bl808_ipc.h
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*
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* Licensed to the Apache Software Foundation (ASF) under one or more
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* contributor license agreements. See the NOTICE file distributed with
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* this work for additional information regarding copyright ownership. The
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* ASF licenses this file to you under the Apache License, Version 2.0 (the
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* "License"); you may not use this file except in compliance with the
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* License. You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
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* License for the specific language governing permissions and limitations
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* under the License.
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*
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****************************************************************************/
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#ifndef __ARCH_RISCV_SRC_BL808_HARDWARE_BL808_IPC_H
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#define __ARCH_RISCV_SRC_BL808_HARDWARE_BL808_IPC_H
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/****************************************************************************
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* Pre-processor Definitions
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****************************************************************************/
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#define IPC_MSG_SEND_OFFSET 0x0
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#define IPC0_MSG_SEND (IPC0_BASE + IPC_MSG_SEND_OFFSET)
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#define IPC_MSG_READ_OFFSET 0x24
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#define IPC2_MSG_READ (IPC2_BASE + IPC_MSG_READ_OFFSET)
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#define IPC_MSG_ACK_OFFSET 0x28
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#define IPC2_MSG_ACK (IPC2_BASE + IPC_MSG_ACK_OFFSET)
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#define IPC_INT_UNMASK_OFFSET 0x2c
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#define IPC2_INT_UNMASK (IPC2_BASE + IPC_INT_UNMASK_OFFSET)
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#endif /* __ARCH_RISCV_SRC_BL808_HARDWARE_BL808_IPC_H */
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/* Register Base Address ****************************************************/
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#define BL808_UART3_BASE 0x30002000ul
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#define BL808_PLIC_BASE 0xe0000000ul
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#define IPC0_BASE 0x2000a800ul
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#define IPC2_BASE 0x30005000ul
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#define BL808_PLIC_BASE 0xe0000000ul
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#endif /* __ARCH_RISCV_SRC_BL808_HARDWARE_BL808_MEMORYMAP_H */
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@ -34,6 +34,7 @@
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#include <sys/mount.h>
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#include <sys/boardctl.h>
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#include <arch/board/board_memorymap.h>
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#include "bl808_courier.h"
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/****************************************************************************
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* Pre-processor Definitions
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@ -157,6 +158,10 @@ void board_late_initialize(void)
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mount_ramdisk();
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/* Initialize courier to get IRQs from M0 */
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bl808_courier_init();
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/* Perform board-specific initialization */
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#ifdef CONFIG_NSH_ARCHINIT
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