diff --git a/arch/arm/src/stm32h7/stm32_spi.c b/arch/arm/src/stm32h7/stm32_spi.c
index c684f58e89..4b4d2ce5de 100644
--- a/arch/arm/src/stm32h7/stm32_spi.c
+++ b/arch/arm/src/stm32h7/stm32_spi.c
@@ -788,6 +788,46 @@ static inline void spi_putreg8(FAR struct stm32_spidev_s *priv,
   putreg8(value, priv->spibase + offset);
 }
 
+/****************************************************************************
+ * Name: spi_getreg16
+ *
+ * Description:
+ *   Get the contents of the SPI register at offset
+ *
+ * Input Parameters:
+ *   priv   - private SPI device structure
+ *   offset - offset to the register of interest
+ *
+ * Returned Value:
+ *   The contents of the 16-bit register
+ *
+ ****************************************************************************/
+
+static inline uint16_t spi_getreg16(FAR struct stm32_spidev_s *priv,
+                                  uint32_t offset)
+{
+  return getreg16(priv->spibase + offset);
+}
+
+/****************************************************************************
+ * Name: spi_putreg16
+ *
+ * Description:
+ *   Write a 16-bit value to the SPI register at offset
+ *
+ * Input Parameters:
+ *   priv   - private SPI device structure
+ *   offset - offset to the register of interest
+ *   value  - the 16-bit value to be written
+ *
+ ****************************************************************************/
+
+static inline void spi_putreg16(FAR struct stm32_spidev_s *priv,
+                               uint32_t offset, uint16_t value)
+{
+  putreg16(value, priv->spibase + offset);
+}
+
 /****************************************************************************
  * Name: spi_getreg
  *
@@ -874,9 +914,9 @@ static inline uint32_t spi_readword(FAR struct stm32_spidev_s *priv)
 
   while ((spi_getreg(priv, STM32_SPI_SR_OFFSET) & SPI_SR_RXP) == 0);
 
-  /* Then return the received byte */
+  /* Then return the received 16 bit word */
 
-  return spi_getreg(priv, STM32_SPI_RXDR_OFFSET);
+  return spi_getreg16(priv, STM32_SPI_RXDR_OFFSET);
 }
 
 /****************************************************************************
@@ -908,9 +948,9 @@ static inline void spi_writeword(FAR struct stm32_spidev_s *priv,
 
   while ((spi_getreg(priv, STM32_SPI_SR_OFFSET) & SPI_SR_TXP) == 0);
 
-  /* Then send the byte */
+  /* Then send the 16 bit word */
 
-  spi_putreg(priv, STM32_SPI_TXDR_OFFSET, word);
+  spi_putreg16(priv, STM32_SPI_TXDR_OFFSET, word);
 }
 
 /****************************************************************************
@@ -1613,20 +1653,9 @@ static void spi_setbits(FAR struct spi_dev_s *dev, int nbits)
       clrbits = SPI_CFG1_DSIZE_MASK;
       setbits = SPI_CFG1_DSIZE_VAL(nbits);
 
-      /* REVISIT: FIFO threshold level */
+      /* RX FIFO Threshold 1 Frame either 8 or 16 bits */
 
-      /* If nbits is <=8, then we are in byte mode and FRXTH shall be set
-       * (else, transaction will not complete).
-       */
-
-      if (nbits < 9)
-        {
-          setbits |= SPI_CFG1_FTHLV_1DATA; /* RX FIFO Threshold = 1 byte */
-        }
-      else
-        {
-          setbits |= SPI_CFG1_FTHLV_2DATA; /* RX FIFO Threshold = 2 byte */
-        }
+      setbits |= SPI_CFG1_FTHLV_1DATA;
 
       spi_enable(priv, false);
       spi_modifyreg(priv, STM32_SPI_CFG1_OFFSET, clrbits, setbits);
@@ -1821,6 +1850,11 @@ static void spi_exchange_nodma(FAR struct spi_dev_s *dev,
 
   spiinfo("txbuffer=%p rxbuffer=%p nwords=%d\n", txbuffer, rxbuffer, nwords);
 
+  /* Disable the DMA Requests */
+
+  spi_modifyreg(priv, STM32_SPI_CFG1_OFFSET, SPI_CFG1_RXDMAEN |
+                                             SPI_CFG1_TXDMAEN, 0);
+
   /* 8- or 16-bit mode? */
 
   if (priv->nbits > 8)