stm32h7:ethernet Use proper Clock limits for H7
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@ -259,8 +259,10 @@
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# define ETH_MACMDIOAR_CR ETH_MACMDIOAR_CR_DIV42
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# define ETH_MACMDIOAR_CR ETH_MACMDIOAR_CR_DIV42
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#elif STM32_HCLK_FREQUENCY >= 100000000 && STM32_HCLK_FREQUENCY < 150000000
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#elif STM32_HCLK_FREQUENCY >= 100000000 && STM32_HCLK_FREQUENCY < 150000000
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# define ETH_MACMDIOAR_CR ETH_MACMDIOAR_CR_DIV62
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# define ETH_MACMDIOAR_CR ETH_MACMDIOAR_CR_DIV62
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#elif STM32_HCLK_FREQUENCY >= 150000000 && STM32_HCLK_FREQUENCY <= 216000000
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#elif STM32_HCLK_FREQUENCY >= 150000000 && STM32_HCLK_FREQUENCY <= 250000000
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# define ETH_MACMDIOAR_CR ETH_MACMDIOAR_CR_DIV102
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# define ETH_MACMDIOAR_CR ETH_MACMDIOAR_CR_DIV102
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#elif STM32_HCLK_FREQUENCY >= 250000000 && STM32_HCLK_FREQUENCY <= 300000000
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# define ETH_MACMDIOAR_CR ETH_MACMDIOAR_CR_DIV124
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#else
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#else
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# error "STM32_HCLK_FREQUENCY not supportable"
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# error "STM32_HCLK_FREQUENCY not supportable"
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#endif
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#endif
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