Mostly cosmetic changes from Max
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43a578d2d3
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21d67c5b1b
@ -84,7 +84,6 @@ static void dac_shutdown(FAR struct dac_dev_s *dev);
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static void dac_txint(FAR struct dac_dev_s *dev, bool enable);
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static int dac_send(FAR struct dac_dev_s *dev, FAR struct dac_msg_s *msg);
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static int dac_ioctl(FAR struct dac_dev_s *dev, int cmd, unsigned long arg);
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static int dac_interrupt(int irq, void *context);
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/****************************************************************************
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* Private Data
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@ -176,10 +175,6 @@ static int dac_ioctl(FAR struct dac_dev_s *dev, int cmd, unsigned long arg)
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return 0;
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}
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static int dac_interrupt(int irq, void *context)
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{
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}
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/****************************************************************************
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* Public Functions
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****************************************************************************/
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@ -304,7 +304,6 @@ static int pwm_timer(FAR struct lpc17_pwmtimer_s *priv,
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FAR const struct pwm_info_s *info)
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{
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irqstate_t flags;
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uint32_t regval;
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flags = irqsave();
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@ -292,11 +292,11 @@ static int timer_timer(FAR struct lpc17_timer_s *priv,
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flags = irqsave();
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putreg32(info->frequency, LPC17_TMR0_MR1); /* Set TIMER MR0 = number of counts */
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putreg32(info->frequency, LPC17_TMR1_MR0); /* Set TIMER MR0 = number of counts */
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putreg32(info->frequency, LPC17_TMR0_MR1); /* Set TIMER0 MR1 = number of counts */
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putreg32(info->frequency, LPC17_TMR1_MR0); /* Set TIMER1 MR0 = number of counts */
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putreg32(1, LPC17_TMR0_TCR); /* Start timer0 */
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putreg32(1, LPC17_TMR1_TCR); /* Start timer0*/
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putreg32(1, LPC17_TMR1_TCR); /* Start timer1 */
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irqrestore(flags);
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timer_dumpregs(priv, "After starting");
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@ -357,46 +357,6 @@ static int timer_tim1interrupt(int irq, void *context)
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return timer_interrupt(&g_pwm1dev);
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}
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/****************************************************************************
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* Name: timer_set_apb_clock
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*
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* Description:
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* Enable or disable APB clock for the timer peripheral
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*
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* Input parameters:
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* dev - A reference to the lower half PWM driver state structure
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* on - Enable clock if 'on' is 'true' and disable if 'false'
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*
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****************************************************************************/
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static void timer_set_apb_clock(FAR struct lpc17_timer_s *priv, bool on)
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{
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uint32_t en_bit;
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uint32_t regaddr;
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/* Determine which timer to configure */
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switch (priv->timid)
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{
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#ifdef CONFIG_LPC17_TMR0
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case 1:
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regaddr = STM32_RCC_APB2ENR;
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en_bit = RCC_APB2ENR_TIM1EN;
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break;
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#endif
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}
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/* Enable/disable APB 1/2 clock for timer */
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if (on)
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{
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modifyreg32(regaddr, 0, en_bit);
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}
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else
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{
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modifyreg32(regaddr, en_bit, 0);
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}
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}
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#endif /* XXXXX */
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/****************************************************************************
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@ -452,20 +412,25 @@ static int timer_setup(FAR struct pwm_lowerhalf_s *dev)
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putreg32(regval, LPC17_SYSCON_PCLKSEL1);
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priv->pclk = (0x1 << 12) | (0x1 << 4);
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putreg32(500, LPC17_TMR0_MR1); /* Set TIMER0 MR1 = number of counts */
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putreg32(1000, LPC17_TMR0_MR1); /* Set TIMER0 MR1 = number of counts */
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putreg32(1, LPC17_TMR0_PR); /* Prescaler count frequency: Fpclk/1 */
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putreg32(~(0x3 << 0), LPC17_TMR0_CCR); /* Prescaler count frequency: Fpclk/1 */
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putreg32(~(0x3 << 0), LPC17_TMR0_CTCR);/* Prescaler count frequency: Fpclk/1 */
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putreg32((2 << 3), LPC17_TMR0_MCR); /* Reset on match register MR1 */
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putreg32(((1 << 1)|(3 << 6)), LPC17_TMR0_EMR); /* Output bit toggle on external match event*/
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/* Output bit toggle on external match event External match on MR1, Toggle
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* external bit
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*/
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putreg32(((1 << 1)|(3 << 6)), LPC17_TMR0_EMR);
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putreg32((1 << 0), LPC17_TMR0_TCR); /* Start timer0*/
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/* Sonfigure the output pins GPIO3.26*/
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/* Configure the output pins GPIO3.26 */
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lpc17_configgpio(GPIO_MAT0p1_2);
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putreg32(1000, LPC17_TMR1_MR0); /* Set TIMER1 MR0 = number of counts */
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putreg32(500, LPC17_TMR1_MR0); /* Set TIMER1 MR0 = number of counts */
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putreg32(1, LPC17_TMR1_PR); /* Prescaler count frequency:Fpclk/1 */
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putreg32(~(0x3 << 0), LPC17_TMR1_CCR); /* Prescaler count frequency:Fpclk/1 */
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