From 2204b6506b7fcdd4ccee364fec7b96b237fb01ec Mon Sep 17 00:00:00 2001 From: David Sidrane Date: Thu, 1 Aug 2019 19:52:43 +0000 Subject: [PATCH] Merged in david_s5/nuttx/master_stm_hw_hs (pull request #961) stm32{L4|F4|H7}:serial add HW HS on UART 4 & 5 * stm32:serial add HW HS on UART 4 & 5 * stm32f7:serial update copyright date * stm32h7:serial add HW HS on UART 4 & 5 * stm32l4:serial add HW HS on UART 4 & 5 Approved-by: Gregory Nutt --- arch/arm/src/stm32/stm32_serial.c | 39 +++++++++++---------------- arch/arm/src/stm32f7/stm32_serial.c | 4 +-- arch/arm/src/stm32h7/stm32_serial.c | 36 ++++++++++--------------- arch/arm/src/stm32l4/stm32l4_serial.c | 37 +++++++++++-------------- 4 files changed, 47 insertions(+), 69 deletions(-) diff --git a/arch/arm/src/stm32/stm32_serial.c b/arch/arm/src/stm32/stm32_serial.c index e893b46aaf..2227bc4f41 100644 --- a/arch/arm/src/stm32/stm32_serial.c +++ b/arch/arm/src/stm32/stm32_serial.c @@ -1,9 +1,10 @@ /**************************************************************************** * arch/arm/src/stm32/stm32_serial.c * - * Copyright (C) 2009-2014, 2016, 2017 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt - * + * Copyright (C) 2009-2014, 2016, 2017, 2019 Gregory Nutt. All rights reserved. + * Authors: Gregory Nutt + * David Sidrane +* * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: @@ -714,23 +715,19 @@ static struct up_dev_s g_uart4priv = .parity = CONFIG_UART4_PARITY, .bits = CONFIG_UART4_BITS, .stopbits2 = CONFIG_UART4_2STOP, -#ifdef CONFIG_SERIAL_IFLOWCONTROL - .iflow = false, +#if defined(CONFIG_SERIAL_OFLOWCONTROL) && defined(CONFIG_UART4_OFLOWCONTROL) + .oflow = true, + .cts_gpio = GPIO_UART4_CTS, #endif -#ifdef CONFIG_SERIAL_OFLOWCONTROL - .oflow = false, +#if defined(CONFIG_SERIAL_IFLOWCONTROL) && defined(CONFIG_UART4_IFLOWCONTROL) + .iflow = true, + .rts_gpio = GPIO_UART4_RTS, #endif .baud = CONFIG_UART4_BAUD, .apbclock = STM32_PCLK1_FREQUENCY, .usartbase = STM32_UART4_BASE, .tx_gpio = GPIO_UART4_TX, .rx_gpio = GPIO_UART4_RX, -#ifdef CONFIG_SERIAL_OFLOWCONTROL - .cts_gpio = 0, -#endif -#ifdef CONFIG_SERIAL_IFLOWCONTROL - .rts_gpio = 0, -#endif #ifdef CONFIG_UART4_RXDMA .rxdma_channel = DMAMAP_UART4_RX, .rxfifo = g_uart4rxfifo, @@ -779,23 +776,19 @@ static struct up_dev_s g_uart5priv = .parity = CONFIG_UART5_PARITY, .bits = CONFIG_UART5_BITS, .stopbits2 = CONFIG_UART5_2STOP, -#ifdef CONFIG_SERIAL_IFLOWCONTROL - .iflow = false, +#if defined(CONFIG_SERIAL_OFLOWCONTROL) && defined(CONFIG_UART5_OFLOWCONTROL) + .oflow = true, + .cts_gpio = GPIO_UART5_CTS, #endif -#ifdef CONFIG_SERIAL_OFLOWCONTROL - .oflow = false, +#if defined(CONFIG_SERIAL_IFLOWCONTROL) && defined(CONFIG_UART5_IFLOWCONTROL) + .iflow = true, + .rts_gpio = GPIO_UART5_RTS, #endif .baud = CONFIG_UART5_BAUD, .apbclock = STM32_PCLK1_FREQUENCY, .usartbase = STM32_UART5_BASE, .tx_gpio = GPIO_UART5_TX, .rx_gpio = GPIO_UART5_RX, -#ifdef CONFIG_SERIAL_OFLOWCONTROL - .cts_gpio = 0, -#endif -#ifdef CONFIG_SERIAL_IFLOWCONTROL - .rts_gpio = 0, -#endif #ifdef CONFIG_UART5_RXDMA .rxdma_channel = DMAMAP_UART5_RX, .rxfifo = g_uart5rxfifo, diff --git a/arch/arm/src/stm32f7/stm32_serial.c b/arch/arm/src/stm32f7/stm32_serial.c index d1fce90fc4..baa1e4c877 100644 --- a/arch/arm/src/stm32f7/stm32_serial.c +++ b/arch/arm/src/stm32f7/stm32_serial.c @@ -1,9 +1,9 @@ /**************************************************************************** * arch/arm/src/stm32f7/stm32_serial.c * - * Copyright (C) 2015-2018 Gregory Nutt. All rights reserved. + * Copyright (C) 2015-2019 Gregory Nutt. All rights reserved. * Authors: Gregory Nutt - * David Sidrane + * David Sidrane * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions diff --git a/arch/arm/src/stm32h7/stm32_serial.c b/arch/arm/src/stm32h7/stm32_serial.c index 3b5fd93ffd..cce3664368 100644 --- a/arch/arm/src/stm32h7/stm32_serial.c +++ b/arch/arm/src/stm32h7/stm32_serial.c @@ -1,9 +1,9 @@ /**************************************************************************** * arch/arm/src/stm32h7/stm32_serial.c * - * Copyright (C) 2015-2018 Gregory Nutt. All rights reserved. + * Copyright (C) 2015-2019 Gregory Nutt. All rights reserved. * Authors: Gregory Nutt - * David Sidrane + * David Sidrane * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions @@ -460,23 +460,19 @@ static struct up_dev_s g_uart4priv = .parity = CONFIG_UART4_PARITY, .bits = CONFIG_UART4_BITS, .stopbits2 = CONFIG_UART4_2STOP, -#ifdef CONFIG_SERIAL_IFLOWCONTROL - .iflow = false, +#if defined(CONFIG_SERIAL_OFLOWCONTROL) && defined(CONFIG_UART4_OFLOWCONTROL) + .oflow = true, + .cts_gpio = GPIO_UART4_CTS, #endif -#ifdef CONFIG_SERIAL_OFLOWCONTROL - .oflow = false, +#if defined(CONFIG_SERIAL_IFLOWCONTROL) && defined(CONFIG_UART4_IFLOWCONTROL) + .iflow = true, + .rts_gpio = GPIO_UART4_RTS, #endif .baud = CONFIG_UART4_BAUD, .apbclock = STM32_PCLK1_FREQUENCY, .usartbase = STM32_UART4_BASE, .tx_gpio = GPIO_UART4_TX, .rx_gpio = GPIO_UART4_RX, -#ifdef CONFIG_SERIAL_OFLOWCONTROL - .cts_gpio = 0, -#endif -#ifdef CONFIG_SERIAL_IFLOWCONTROL - .rts_gpio = 0, -#endif #ifdef CONFIG_UART4_RS485 .rs485_dir_gpio = GPIO_UART4_RS485_DIR, @@ -518,23 +514,19 @@ static struct up_dev_s g_uart5priv = .parity = CONFIG_UART5_PARITY, .bits = CONFIG_UART5_BITS, .stopbits2 = CONFIG_UART5_2STOP, -#ifdef CONFIG_SERIAL_IFLOWCONTROL - .iflow = false, +#if defined(CONFIG_SERIAL_OFLOWCONTROL) && defined(CONFIG_UART5_OFLOWCONTROL) + .oflow = true, + .cts_gpio = GPIO_UART5_CTS, #endif -#ifdef CONFIG_SERIAL_OFLOWCONTROL - .oflow = false, +#if defined(CONFIG_SERIAL_IFLOWCONTROL) && defined(CONFIG_UART5_IFLOWCONTROL) + .iflow = true, + .rts_gpio = GPIO_UART5_RTS, #endif .baud = CONFIG_UART5_BAUD, .apbclock = STM32_PCLK1_FREQUENCY, .usartbase = STM32_UART5_BASE, .tx_gpio = GPIO_UART5_TX, .rx_gpio = GPIO_UART5_RX, -#ifdef CONFIG_SERIAL_OFLOWCONTROL - .cts_gpio = 0, -#endif -#ifdef CONFIG_SERIAL_IFLOWCONTROL - .rts_gpio = 0, -#endif #ifdef CONFIG_UART5_RS485 .rs485_dir_gpio = GPIO_UART5_RS485_DIR, diff --git a/arch/arm/src/stm32l4/stm32l4_serial.c b/arch/arm/src/stm32l4/stm32l4_serial.c index c493da5ac8..f7e2558559 100644 --- a/arch/arm/src/stm32l4/stm32l4_serial.c +++ b/arch/arm/src/stm32l4/stm32l4_serial.c @@ -1,8 +1,9 @@ /**************************************************************************** * arch/arm/src/stm32l4/stm32l4_serial.c * - * Copyright (C) 2009-2014, 2016-2017 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt + * Copyright (C) 2009-2014, 2016-2017,2019 Gregory Nutt. All rights reserved. + * Authors: Gregory Nutt + * David Sidrane * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions @@ -642,23 +643,19 @@ static struct stm32l4_serial_s g_uart4priv = .parity = CONFIG_UART4_PARITY, .bits = CONFIG_UART4_BITS, .stopbits2 = CONFIG_UART4_2STOP, -#ifdef CONFIG_SERIAL_IFLOWCONTROL - .iflow = false, +#if defined(CONFIG_SERIAL_OFLOWCONTROL) && defined(CONFIG_UART4_OFLOWCONTROL) + .oflow = true, + .cts_gpio = GPIO_UART4_CTS, #endif -#ifdef CONFIG_SERIAL_OFLOWCONTROL - .oflow = false, +#if defined(CONFIG_SERIAL_IFLOWCONTROL) && defined(CONFIG_UART4_IFLOWCONTROL) + .iflow = true, + .rts_gpio = GPIO_UART4_RTS, #endif .baud = CONFIG_UART4_BAUD, .apbclock = STM32L4_PCLK1_FREQUENCY, .usartbase = STM32L4_UART4_BASE, .tx_gpio = GPIO_UART4_TX, .rx_gpio = GPIO_UART4_RX, -#ifdef CONFIG_SERIAL_OFLOWCONTROL - .cts_gpio = 0, -#endif -#ifdef CONFIG_SERIAL_IFLOWCONTROL - .rts_gpio = 0, -#endif #ifdef CONFIG_UART4_RXDMA .rxdma_channel = DMAMAP_UART4_RX, .rxfifo = g_uart4rxfifo, @@ -707,23 +704,19 @@ static struct stm32l4_serial_s g_uart5priv = .parity = CONFIG_UART5_PARITY, .bits = CONFIG_UART5_BITS, .stopbits2 = CONFIG_UART5_2STOP, -#ifdef CONFIG_SERIAL_IFLOWCONTROL - .iflow = false, +#if defined(CONFIG_SERIAL_OFLOWCONTROL) && defined(CONFIG_UART5_OFLOWCONTROL) + .oflow = true, + .cts_gpio = GPIO_UART5_CTS, #endif -#ifdef CONFIG_SERIAL_OFLOWCONTROL - .oflow = false, +#if defined(CONFIG_SERIAL_IFLOWCONTROL) && defined(CONFIG_UART5_IFLOWCONTROL) + .iflow = true, + .rts_gpio = GPIO_UART5_RTS, #endif .baud = CONFIG_UART5_BAUD, .apbclock = STM32L4_PCLK1_FREQUENCY, .usartbase = STM32L4_UART5_BASE, .tx_gpio = GPIO_UART5_TX, .rx_gpio = GPIO_UART5_RX, -#ifdef CONFIG_SERIAL_OFLOWCONTROL - .cts_gpio = 0, -#endif -#ifdef CONFIG_SERIAL_IFLOWCONTROL - .rts_gpio = 0, -#endif #ifdef CONFIG_UART5_RXDMA .rxdma_channel = DMAMAP_UART5_RX, .rxfifo = g_uart5rxfifo,