USB config update
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@2744 42af7a65-404d-4744-a932-0658087f49c3
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patacongo
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@ -208,30 +208,6 @@
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#define LPC17_READOVERRUN_BIT (0x80000000)
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#define LPC17_READOVERRUN(s) (((s) & LPC17_READOVERRUN_BIT) != 0)
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/* USB RAM ********************************************************************
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*
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* UBS_UDCA is is list of 32 pointers to DMA desciptors located at the
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* beginning of USB RAM. Each pointer points to a DMA descriptor with
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* assocated DMA buffer.
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*/
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#define USB_UDCA (uint32_t*)LPC17_USBDEV_RAMBASE)
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#define USB_USCASIZE (LPC17_NPHYSENDPOINTS*sizeof(uint32_t))
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/* Each descriptor must be aligned to a 128 address boundary */
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#define USB_DDALIGNDOWN(a) ((a)&~0x7f)
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#define USB_DDALIGNUP(a) USB_DDALIGNDOWN((a)+0x7f)
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#define USB_DDSIZE USB_DDALIGNDOWN((LPC17_USBDEV_RAMSIZE-USB_USCASIZE)/CONFIG_LPC17_USBDEV_NDMADESCRIPTORS)
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#define USB_DDESC ((struct lpc17_dmadesc_s*)(LPC17_USBDEV_RAMBASE+USB_USCASIZE))
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#ifdef CONFIG_USBDEV_ISOCHRONOUS
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# define USB_DDESCSIZE (5*sizeof(uint32_t))
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#else
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# define USB_DDESCSIZE (4*sizeof(uint32_t))
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#endif
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/* Endpoints ******************************************************************/
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/* Number of endpoints */
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@ -321,14 +297,13 @@ struct lpc17_ep_s
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#ifdef CONFIG_LPC17_USBDEV_DMA
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struct lpc17_dmadesc_s
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{
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uint32_t nextdesc; /* Address of the next DMA descripto in RAM */
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uint32_t nextdesc; /* Address of the next DMA descriptor in RAM */
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uint32_t config; /* Misc. bit encoded configuration information */
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uint32_t start; /* DMA start address */
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uint32_t status; /* Misc. bit encoded status inforamation */
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#ifdef CONFIG_USBDEV_ISOCHRONOUS
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uint32_t size; /* Isochronous packet size address */
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#endif
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uint8_t buffer[USB_DDSIZE-USB_DDESCSIZE];
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};
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#endif
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@ -500,6 +475,26 @@ static const struct usbdev_ops_s g_devops =
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.pullup = lpc17_pullup,
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};
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/* USB Device Communication Area ***********************************************
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*
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* The CPU and DMA controller communicate through a common area of memory, called
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* the USB Device Communication Area, or UDCA. The UDCA is a 32-word array of DMA
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* Descriptor Pointers (DDPs), each of which corresponds to a physical endpoint.
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* Each DDP points to the start address of a DMA Descriptor, if one is defined for
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* the endpoint. DDPs for unrealized endpoints and endpoints disabled for DMA
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* operation are ignored and can be set to a NULL (0x0) value.
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*
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* The start address of the UDCA is stored in the USBUDCAH register. The UDCA can
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* reside at any 128-byte boundary of RAM that is accessible to both the CPU and DMA
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* controller (on other MCU's like the LPC2148, the UDCA lies in a specialized
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* 8Kb memory region).
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*/
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#ifdef CONFIG_LPC17_USBDEV_DMA
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static uint32_t g_udca[LPC17_NPHYSENDPOINTS] __attribute__ ((aligned (128)));
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static struct lpc17_dmadesc_s g_usbddesc[CONFIG_LPC17_USBDEV_NDMADESCRIPTORS];
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#endif
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/*******************************************************************************
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* Public Data
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*******************************************************************************/
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@ -1362,18 +1357,18 @@ static inline void lpc17_dmareset(uint32_t enable)
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for (i = 0; i < LPC17_NPHYSENDPOINTS; ++i)
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{
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USB_UDCA[i] = NULL;
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g_udca[i] = NULL;
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}
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/* Set USB UDCA Head register */
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lpc17_putreg((uint32_t)USB_UDCA, LPC17_USBDEV_UDCAH);
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lpc17_putreg((uint32_t)g_udca, LPC17_USBDEV_UDCAH);
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/* Invalidate all DMA descriptors */
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for (i = 0; i < CONFIG_LPC17_USBDEV_NDMADESCRIPTORS; ++i)
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{
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memset(&USB_DDESC[i], 0, USB_DDESCSIZE);
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memset(&g_usbddesc[i], 0, sizeof(struct lpc17_dmadesc_s));
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}
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/* Enable DMA interrupts */
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@ -2635,8 +2630,8 @@ static FAR void *lpc17_epallocbuffer(FAR struct usbdev_ep_s *ep, uint16_t nbytes
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/* Set UDCA to the allocated DMA descriptor for this endpoint */
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USB_UDCA[privep->epphy] = &USB_DDESC[descndx];
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return &USB_DDESC[descndx]
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g_udca[privep->epphy] = &g_usbddesc[descndx];
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return &g_usbddesc[descndx]
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}
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#endif
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@ -2657,7 +2652,7 @@ static void lpc17_epfreebuffer(FAR struct usbdev_ep_s *ep, FAR void *buf)
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/* Indicate that there is no DMA descriptor associated with this endpoint */
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USB_UDCA[privep->epphy] = NULL;
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g_udca[privep->epphy] = NULL;
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/* Mark the DMA descriptor as free for re-allocation */
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@ -318,7 +318,7 @@ Nucleus 2G Configuration Options
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CONFIG_LPC17_ADC=n
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CONFIG_LPC17_DAC=n
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CONFIG_LPC17_GPDMA=n
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CONFIG_LP17_FLASH=n
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CONFIG_LPC17_FLASH=n
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LPC17xx specific device driver settings
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@ -333,6 +333,21 @@ Nucleus 2G Configuration Options
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CONFIG_UARTn_PARTIY - 0=no parity, 1=odd parity, 2=even parity
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CONFIG_UARTn_2STOP - Two stop bits
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LPC17xx USB Configuration
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CONFIG_LPC17_USBDEV_FRAME_INTERRUPT
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Handle USB Start-Of-Frame events.
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Enable reading SOF from interrupt handler vs. simply reading on demand.
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Probably a bad idea... Unless there is some issue with sampling the SOF
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from hardware asynchronously.
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CONFIG_LPC17_USBDEV_EPFAST_INTERRUPT
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Enable high priority interrupts. I have no idea why you might want to
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do that
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CONFIG_LPC17_USBDEV_NDMADESCRIPTORS
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Number of DMA descriptors to allocate in SRAM.
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CONFIG_LPC17_USBDEV_DMA
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Enable lpc17xx-specific DMA support
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Configurations
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^^^^^^^^^^^^^^
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@ -557,6 +557,27 @@ CONFIG_USBDEV_MAXPOWER=100
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CONFIG_USBDEV_TRACE=n
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CONFIG_USBDEV_TRACE_NRECORDS=128
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#
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# LPC17xx USB Configuration
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#
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# CONFIG_LPC17_USBDEV_FRAME_INTERRUPT
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# Handle USB Start-Of-Frame events.
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# Enable reading SOF from interrupt handler vs. simply reading on demand.
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# Probably a bad idea... Unless there is some issue with sampling the SOF
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# from hardware asynchronously.
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# CONFIG_LPC17_USBDEV_EPFAST_INTERRUPT
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# Enable high priority interrupts. I have no idea why you might want to
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# do that
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# CONFIG_LPC17_USBDEV_NDMADESCRIPTORS
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# Number of DMA descriptors to allocate in SRAM.
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# CONFIG_LPC17_USBDEV_DMA
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# Enable lpc17xx-specific DMA support
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#
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CONFIG_LPC17_USBDEV_FRAME_INTERRUPT=n
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CONFIG_LPC17_USBDEV_EPFAST_INTERRUPT=n
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CONFIG_LPC17_USBDEV_DMA=n
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CONFIG_LPC17_USBDEV_NDMADESCRIPTORS=0
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CONFIG_LPC17_USBDEV_DMAINTMASK=0
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#
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# USB Serial Device Configuration
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#
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