s32k3xx:EDMA fix DMAMUX1 access violation
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18bca596d4
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22390df92d
@ -1017,8 +1017,8 @@ DMACH_HANDLE s32k3xx_dmach_alloc(uint16_t dmamux, uint8_t dchpri)
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/* Make sure that the channel is disabled. */
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putreg8(EDMA_CH_INT, S32K3XX_EDMA_TCD[dmach->chan] +
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S32K3XX_EDMA_CH_INT_OFFSET);
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putreg32(EDMA_CH_INT, S32K3XX_EDMA_TCD[dmach->chan] +
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S32K3XX_EDMA_CH_INT_OFFSET);
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/* Disable the associated DMAMUX for now */
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@ -1085,8 +1085,8 @@ void s32k3xx_dmach_free(DMACH_HANDLE handle)
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/* Make sure that the channel is disabled. */
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putreg8(EDMA_CH_INT, S32K3XX_EDMA_TCD[dmach->chan]
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+ S32K3XX_EDMA_CH_INT_OFFSET);
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putreg32(EDMA_CH_INT, S32K3XX_EDMA_TCD[dmach->chan] +
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S32K3XX_EDMA_CH_INT_OFFSET);
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/* Disable the associated DMAMUX */
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@ -1096,7 +1096,7 @@ void s32k3xx_dmach_free(DMACH_HANDLE handle)
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}
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else
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{
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putreg8(0, S32K3XX_DMAMUX1_CHCFG(dmach->chan));
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putreg8(0, S32K3XX_DMAMUX1_CHCFG(dmach->chan - 16));
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}
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}
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@ -1554,7 +1554,7 @@ void s32k3xx_dmasample(DMACH_HANDLE handle, struct s32k3xx_dmaregs_s *regs)
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}
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else
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{
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regs->dmamux = getreg32(S32K3XX_DMAMUX1_CHCFG(chan)); /* Channel configuration */
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regs->dmamux = getreg32(S32K3XX_DMAMUX1_CHCFG(chan - 16)); /* Channel configuration */
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}
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spin_unlock_irqrestore(NULL, flags);
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