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arch: lc823450: Fix style violations in lc823450_syscontrol.h

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Summary:
- Fix style violations in lc823450_syscontrol.h

Impact:
- This commit affects register naming in syscontrol.
- So some files such as lc823450_start.c lc823450_mux.c were also changed.

Testing:
- Build check only

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
This commit is contained in:
Masayuki Ishikawa 2020-07-30 09:19:10 +09:00 committed by Xiang Xiao
parent f255f4f97d
commit 22a9b497b1
3 changed files with 34 additions and 30 deletions
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16
arch/arm/src/lc823450/lc823450_start.c
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@ -119,7 +119,10 @@ const uintptr_t g_idle_topstack = HEAP_BASE;
int icx_boot_reason;
extern uint32_t _stext_sram, _etext_sram, _ftext, _svect;
extern uint32_t _stext_sram;
extern uint32_t _etext_sram;
extern uint32_t _ftext;
extern uint32_t _svect;
/****************************************************************************
* Private Function prototypes
@ -285,8 +288,9 @@ void __start(void)
#endif /* CONFIG_LC823450_SPIFI_BOOT */
/* Enable Mutex */
/* NOTE: modyfyreg32() can not be used because it might use spin_lock */
/* Enable Mutex
* NOTE: modyfyreg32() can not be used because it might use spin_lock.
*/
uint32_t val = getreg32(MRSTCNTBASIC);
val |= MRSTCNTBASIC_MUTEX_RSTB;
@ -307,8 +311,8 @@ void __start(void)
modifyreg32(MCLKCNTAPB, 0, MCLKCNTAPB_PORT2_CLKEN);
modifyreg32(MRSTCNTAPB, 0, MRSTCNTAPB_PORT2_RSTB);
modifyreg32(rP2DT, 0, 1 << 15 /* GPIO2F */);
modifyreg32(rP2DRC, 0, 1 << 15 /* GPIO2F */);
modifyreg32(P2DT, 0, 1 << 15 /* GPIO2F */);
modifyreg32(P2DRC, 0, 1 << 15 /* GPIO2F */);
#ifdef CONFIG_DEBUG_FEATURES
/* enable TXD0 for debug */
@ -411,6 +415,6 @@ void __start(void)
/* Shouldn't get here */
for (;;);
for (; ; );
#endif
}

24
arch/arm/src/lc823450/lc823450_syscontrol.h
View File

@ -250,19 +250,19 @@
/* GPIO */
#define PORT0_BASE 0x40081000
#define rP0DT (PORT0_BASE + 0x0000 + 0x04)
#define rP1DT (PORT0_BASE + 0x1000 + 0x04)
#define rP2DT (PORT0_BASE + 0x2000 + 0x04)
#define rP3DT (PORT0_BASE + 0x3000 + 0x04)
#define rP4DT (PORT0_BASE + 0x4000 + 0x04)
#define rP5DT (PORT0_BASE + 0x5000 + 0x04)
#define P0DT (PORT0_BASE + 0x0000 + 0x04)
#define P1DT (PORT0_BASE + 0x1000 + 0x04)
#define P2DT (PORT0_BASE + 0x2000 + 0x04)
#define P3DT (PORT0_BASE + 0x3000 + 0x04)
#define P4DT (PORT0_BASE + 0x4000 + 0x04)
#define P5DT (PORT0_BASE + 0x5000 + 0x04)
#define rP0DRC (PORT0_BASE + 0x0000 + 0x00)
#define rP1DRC (PORT0_BASE + 0x1000 + 0x00)
#define rP2DRC (PORT0_BASE + 0x2000 + 0x00)
#define rP3DRC (PORT0_BASE + 0x3000 + 0x00)
#define rP4DRC (PORT0_BASE + 0x4000 + 0x00)
#define rP5DRC (PORT0_BASE + 0x5000 + 0x00)
#define P0DRC (PORT0_BASE + 0x0000 + 0x00)
#define P1DRC (PORT0_BASE + 0x1000 + 0x00)
#define P2DRC (PORT0_BASE + 0x2000 + 0x00)
#define P3DRC (PORT0_BASE + 0x3000 + 0x00)
#define P4DRC (PORT0_BASE + 0x4000 + 0x00)
#define P5DRC (PORT0_BASE + 0x5000 + 0x00)
/****************************************************************************
* Public Types

24
boards/arm/lc823450/lc823450-xgevk/src/lc823450_mux.c
View File

@ -85,38 +85,38 @@ void up_init_default_mux(void)
putreg32(PORT0_MUX, PMDCNT0);
putreg32(PORT0_PUPD, PUDCNT0);
putreg32(PORT0_DRV, PTDRVCNT0);
putreg32(PORT0_DAT, rP0DT);
putreg32(PORT0_DIR, rP0DRC);
putreg32(PORT0_DAT, P0DT);
putreg32(PORT0_DIR, P0DRC);
putreg32(PORT1_MUX, PMDCNT1);
putreg32(PORT1_PUPD, PUDCNT1);
putreg32(PORT1_DRV, PTDRVCNT1);
putreg32(PORT1_DAT, rP1DT);
putreg32(PORT1_DIR, rP1DRC);
putreg32(PORT1_DAT, P1DT);
putreg32(PORT1_DIR, P1DRC);
putreg32(PORT2_MUX, PMDCNT2);
putreg32(PORT2_PUPD, PUDCNT2);
putreg32(PORT2_DRV, PTDRVCNT2);
putreg32(PORT2_DAT, rP2DT);
putreg32(PORT2_DIR, rP2DRC);
putreg32(PORT2_DAT, P2DT);
putreg32(PORT2_DIR, P2DRC);
putreg32(PORT3_MUX, PMDCNT3);
putreg32(PORT3_PUPD, PUDCNT3);
putreg32(PORT3_DRV, PTDRVCNT3);
putreg32(PORT3_DAT, rP3DT);
putreg32(PORT3_DIR, rP3DRC);
putreg32(PORT3_DAT, P3DT);
putreg32(PORT3_DIR, P3DRC);
putreg32(PORT4_MUX, PMDCNT4);
putreg32(PORT4_PUPD, PUDCNT4);
putreg32(PORT4_DRV, PTDRVCNT4);
putreg32(PORT4_DAT, rP4DT);
putreg32(PORT4_DIR, rP4DRC);
putreg32(PORT4_DAT, P4DT);
putreg32(PORT4_DIR, P4DRC);
putreg32(PORT5_MUX, PMDCNT5);
putreg32(PORT5_PUPD, PUDCNT5);
putreg32(PORT5_DRV, PTDRVCNT5);
putreg32(PORT5_DAT, rP5DT);
putreg32(PORT5_DIR, rP5DRC);
putreg32(PORT5_DAT, P5DT);
putreg32(PORT5_DIR, P5DRC);
putreg32(PORT6_PUPD, PUDCNT6);
putreg32(PORT6_DRV, PTDRVCNT6);