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Add ethernet interrupt handler

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git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@3106 42af7a65-404d-4744-a932-0658087f49c3
This commit is contained in:
patacongo 2010-11-13 19:31:01 +00:00
parent ab6ca23572
commit 22d47d2263
3 changed files with 113 additions and 17 deletions
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6
arch/arm/src/lm3s/lm3s_ethernet.c
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@ -160,14 +160,14 @@
/* EMAC statistics (debug only) */
#if defined(CONFIG_DEBUG) && defined(CONFIG_DEBUG_NET)
struct ez80mac_statistics_s
struct lm3s_statistics_s
{
uint32_t rx_int; /* Number of Rx interrupts received */
uint32_t rx_packets; /* Number of packets received (sum of the following): */
uint32_t rx_ip; /* Number of Rx IP packets received */
uint32_t rx_arp; /* Number of Rx ARP packets received */
uint32_t rx_dropped; /* Number of dropped, unsupported Rx packets */
uint32_t rx_pktsize; /* Number of dropped, too small or too bigr */
uint32_t rx_pktsize; /* Number of dropped, too small or too big */
uint32_t rx_errors; /* Number of Rx errors (reception error) */
uint32_t rx_ovrerrors; /* Number of Rx FIFO overrun errors */
uint32_t tx_int; /* Number of Tx interrupts received */
@ -200,7 +200,7 @@ struct lm3s_driver_s
WDOG_ID ld_txtimeout; /* TX timeout timer */
#if defined(CONFIG_DEBUG) && defined(CONFIG_DEBUG_NET)
struct ez80mac_statistics_s ld_stat;
struct lm3s_statistics_s ld_stat;
#endif
/* This holds the information visible to uIP/NuttX */

110
arch/arm/src/lpc17xx/lpc17_ethernet.c
View File

@ -289,6 +289,36 @@
* Private Types
****************************************************************************/
/* EMAC statistics (debug only) */
#if defined(CONFIG_DEBUG) && defined(CONFIG_DEBUG_NET)
struct lpc17_statistics_s
{
#if ENABLE_WOL
uint32_t wol; /* Wake-up interrupts */
#endif
uint32_t rx_finished; /* Rx finished interrupts */
uint32_t rx_done; /* Rx done interrupts */
uint32_t rx_ovrerrors; /* Number of Rx overrun error interrupts */
uint32_t rx_errors; /* Number of Rx error interrupts (OR of other errors) */
uint32_t rx_packets; /* Number of packets received (sum of the following): */
uint32_t rx_ip; /* Number of Rx IP packets received */
uint32_t rx_arp; /* Number of Rx ARP packets received */
uint32_t rx_dropped; /* Number of dropped, unsupported Rx packets */
uint32_t rx_pktsize; /* Number of dropped, too small or too big */
uint32_t tx_packets; /* Number of Tx packets queued */
uint32_t tx_finished; /* Tx finished interrupts */
uint32_t tx_done; /* Tx done interrupts */
uint32_t tx_underrun; /* Number of Tx underrun error interrupts */
uint32_t tx_errors; /* Number of Tx error inerrupts (OR of other errors) */
uint32_t tx_timeouts; /* Number of Tx timeout errors */
};
# define EMAC_STAT(priv,name) priv->lp_stat.name++
#else
# define EMAC_STAT(priv,name)
#endif
/* The lpc17_driver_s encapsulates all state information for a single hardware
* interface
*/
@ -312,6 +342,10 @@ struct lpc17_driver_s
WDOG_ID lp_txpoll; /* TX poll timer */
WDOG_ID lp_txtimeout; /* TX timeout timer */
#if defined(CONFIG_DEBUG) && defined(CONFIG_DEBUG_NET)
struct lpc17_statistics_s lp_stat;
#endif
/* This holds the information visible to uIP/NuttX */
struct uip_driver_s lp_dev; /* Interface understood by uIP */
@ -742,24 +776,86 @@ static void lpc17_txdone(FAR struct lpc17_driver_s *priv)
static int lpc17_interrupt(int irq, FAR void *context)
{
register FAR struct lpc17_driver_s *priv = &g_ethdrvr[0];
uint32_t status;
/* Disable Ethernet interrupts */
/* Get the interrupt status (zero means no interrupts pending). */
/* Get and clear interrupt status bits */
status = lpc17_getreg(LPC17_ETH_INTST);
if (status != 0)
{
/* Handle each pending interrupt */
/* Check for receive errors */
/* Handle interrupts according to status bit settings */
if ((status & ETH_INT_RXOVR) != 0)
{
lpc17_putreg(ETH_INT_RXOVR, LPC17_ETH_INTCLR);
EMAC_STAT(priv, rx_ovrerrors);
}
if ((status & ETH_INT_RXERR) != 0)
{
lpc17_putreg(ETH_INT_RXERR, LPC17_ETH_INTCLR);
EMAC_STAT(priv, rx_errors);
}
/* Check if we received an incoming packet, if so, call lpc17_receive() */
if ((status & ETH_INT_RXFIN) != 0)
{
lpc17_putreg(ETH_INT_RXFIN, LPC17_ETH_INTCLR);
EMAC_STAT(priv, rx_finished);
DEBUGASSERT(lpc17_getreg(LPC17_ETH_RXPRODIDX) == lpc17_getreg(LPC17_ETH_RXCONSIDX));
}
if ((status & ETH_INT_RXDONE) != 0)
{
lpc17_putreg(ETH_INT_RXDONE, LPC17_ETH_INTCLR);
EMAC_STAT(priv, rx_done);
lpc17_receive(priv);
}
/* Check for Tx errors */
if ((status & ETH_INT_TXUNR) != 0)
{
lpc17_putreg(ETH_INT_TXUNR, LPC17_ETH_INTCLR);
EMAC_STAT(priv, tx_underrun);
}
if ((status & ETH_INT_TXERR) != 0)
{
lpc17_putreg(ETH_INT_TXERR, LPC17_ETH_INTCLR);
EMAC_STAT(priv, tx_errors);
}
/* Check is a packet transmission just completed. If so, call lpc17_txdone */
lpc17_txdone(priv);
if ((status & ETH_INT_TXFIN) != 0)
{
lpc17_putreg(ETH_INT_TXFIN, LPC17_ETH_INTCLR);
EMAC_STAT(priv, tx_finished);
}
/* Enable Ethernet interrupts (perhaps excluding the TX done interrupt if
* there are no pending transmissions.
*/
if ((status & ETH_INT_TXDONE) != 0)
{
lpc17_putreg(ETH_INT_TXDONE, LPC17_ETH_INTCLR);
EMAC_STAT(priv, tx_done);
lpc17_txdone(priv);
}
/* Check for Wake-Up on Lan */
#if CONFIG_NET_WOL
if ((status & ETH_INT_WKUP) != 0)
{
lpc17_putreg(ETH_INT_WKUP, LPC17_ETH_INTCLR);
INTCLEAR = EMAC_INT_WOL;
EMAC_STAT(priv, wol);
# warning "Missing logic"
}
#endif
}
return OK;
}

2
arch/arm/src/lpc17xx/lpc17_ethernet.h
View File

@ -459,7 +459,7 @@
#define ETH_RXFLCTRL_PERFEN (1 << 5) /* Bit 5: Accept perfect dest match */
/* Bits 6-11: Reserved */
#define ETH_RXFLCTRL_MPKTEN (1 << 12) /* Bit 12: Magic pkt filter WoL int */
#define ETH_RXFLCTRL_RXFILEN (1 << 13) /* Bit 13: Perfect math WoL interrupt */
#define ETH_RXFLCTRL_RXFILEN (1 << 13) /* Bit 13: Perfect match WoL interrupt */
/* Bits 14-31: Reserved */
/* Receive filter WoL status register (RXFLWOLST) AND
* Receive filter WoL clear register (RXFLWOLCLR)