diff --git a/arch/arm/src/arm/arm_dataabort.c b/arch/arm/src/arm/arm_dataabort.c
index cf704f78ee..ae59292ec9 100644
--- a/arch/arm/src/arm/arm_dataabort.c
+++ b/arch/arm/src/arm/arm_dataabort.c
@@ -143,7 +143,8 @@ void arm_dataabort(uint32_t *regs, uint32_t far, uint32_t fsr)
 
 segfault:
 #endif
-  _alert("Data abort. PC: %08x FAR: %08x FSR: %08x\n",
+  _alert("Data abort. "
+         "PC: %08" PRIx32 " FAR: %08" PRIx32 " FSR: %08" PRIx32 "\n",
          regs[REG_PC], far, fsr);
   PANIC_WITH_REGS("panic", regs);
 }
diff --git a/arch/risc-v/src/common/riscv_misaligned.c b/arch/risc-v/src/common/riscv_misaligned.c
index d92e50bfb7..6d43ea4dac 100644
--- a/arch/risc-v/src/common/riscv_misaligned.c
+++ b/arch/risc-v/src/common/riscv_misaligned.c
@@ -544,7 +544,7 @@ static bool decode_insn(uintptr_t *regs, riscv_insn_ctx_t *ctx)
         break;
 #endif
       default:
-        _alert("Uncompressed: %x\n", insn.insn);
+        _alert("Uncompressed: %lx\n", insn.insn);
         return false;
     }