Squashed commit of the following:
drivers/lcd and include/nuttx/lcd: Add FT80x support for writing to graphics memory. Also add some definitions needed by apps/examples/ft80x for bitmap manipulation. drivers/lcd: Review/update FT80x initializatin logic
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9527f849f4
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237ff11db7
@ -632,26 +632,51 @@ static int ft80x_ioctl(FAR struct file *filep, int cmd, unsigned long arg)
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}
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break;
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/* FT80X_IOC_GETDL32:
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/* FT80X_IOC_GETRAMDL:
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* Description: Read a 32-bit value from the display list.
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* Argument: A reference to an instance of struct ft80x_dlmem_s.
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* Argument: A reference to an instance of struct ft80x_relmem_s.
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* Returns: The 32-bit value read from the display list.
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*/
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case FT80X_IOC_GETDL32:
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case FT80X_IOC_GETRAMDL:
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{
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FAR struct ft80x_dlmem_s *result =
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(FAR struct ft80x_dlmem_s *)((uintptr_t)arg);
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FAR struct ft80x_relmem_s *ramdl =
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(FAR struct ft80x_relmem_s *)((uintptr_t)arg);
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if (result == NULL || ((uintptr_t)&result->offset & 3) != 0 ||
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result->offset >= FT80X_RAM_DL_SIZE)
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if (ramdl == NULL || ((uintptr_t)&ramdl->offset & 3) != 0 ||
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ramdl->offset >= FT80X_RAM_DL_SIZE)
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{
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ret = -EINVAL;
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}
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else
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{
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result->value = ft80x_read_word(priv,
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FT80X_RAM_DL + result->offset);
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ft80x_read_memory(priv, FT80X_RAM_DL + ramdl->offset,
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ramdl->value, ramdl->nbytes);
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ret = OK;
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}
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}
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break;
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/* FT80X_IOC_PUTRAMG
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* Description: Write byte data to FT80x graphics memory (RAM_G)
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* Argument: A reference to an instance of struct ft80x_relmem_s.
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* Returns: None.
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*/
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case FT80X_IOC_PUTRAMG:
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{
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FAR struct ft80x_relmem_s *ramg =
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(FAR struct ft80x_relmem_s *)((uintptr_t)arg);
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if (ramg == NULL ||
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(ramg->offset + ramg->nbytes) >= FT80X_RAM_G_SIZE)
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{
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ret = -EINVAL;
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}
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else
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{
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ft80x_write_memory(priv, FT80X_RAM_G + ramg->offset,
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ramg->value, ramg->nbytes);
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ret = OK;
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}
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}
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@ -974,8 +999,9 @@ static int ft80x_initialize(FAR struct ft80x_dev_s *priv)
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/* Initialization Sequence during the boot up:
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*
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* 1. Use MCU SPI clock not more than 11MHz
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* 2. Send Host command CLKEXT to FT800
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* 3. Send Host command ACTIVE to enable clock to FT800.
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* 2. Send Host command CLKEXT to FT800 to enable PLL input from oscillator
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* or external clock. Should default to 48MHz PLL output.
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* 3. Send Host command ACTIVE to enable clock and wake up the FT80x.
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* 4. Configure video timing registers, except FT80X_REG_PCLK
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* 5. Write first display list
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* 6. Write FT80X_REG_DLSWAP, FT800 swaps display list immediately
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@ -989,14 +1015,30 @@ static int ft80x_initialize(FAR struct ft80x_dev_s *priv)
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DEBUGASSERT(priv->lower->init_frequency <= 11000000);
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priv->frequency = priv->lower->init_frequency;
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/* 2. Send Host command CLKEXT to FT800
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* 3. Send Host command ACTIVE to enable clock to FT800.
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*
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* PLL output should default to 48MHz.
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/* 2. Send Host command CLKEXT to FT800 to enable PLL input from oscillator
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* or external clock.
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*/
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ft80x_host_command(priv, FT80X_CMD_CLKEXT);
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up_mdelay(10);
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#if 0 /* Un-necessary? */
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/* Switch PLL output to 48MHz (should be the default) */
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ft80x_host_command(priv, FT80X_CMD_CLK48M);
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up_mdelay(10);
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#endif
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/* 3. Send Host command ACTIVE to enable clock and wake up the FT80x. */
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ft80x_host_command(priv, FT80X_CMD_ACTIVE);
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up_mdelay(10);
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#if 0 /* Un-necessary? */
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/* Do a core reset for safer */
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ft80x_host_command(priv, FT80X_CMD_CORERST);
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#endif
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/* Verify the chip ID. Read repeatedly until FT80x is ready. */
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@ -105,10 +105,10 @@
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* FT80x display list memory. Display lists should generally be formed as
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* follows:
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*
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* struct ft80x_cmd_dlstart_s dlstart; # Mark the start of the display list
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* # Various display commands follow...
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* FT80X_DISPLAY(); # Finish the last display
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* struct ft80x_cmd_swap_s swap; # Swap to the new display list
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* # Various display commands ...
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* FT80X_DISPLAY(); # Terminate the display list
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*
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* Then write to the REG_DLSWAP register to set REG_swap to the new display list.
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*
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* NOTE: The functionality of FT80X_IOC_CREATEDL is the equivalent to that of
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* the driver write() method. Either the write() method or the FT80X_IOC_CREATEDL
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@ -124,13 +124,18 @@
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* display list offset.
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*
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* Output values from display commands are not automatically written back in
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* either case but must be subsequently obtained using FT80X_IOC_GETDL32.
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* either case but must be subsequently obtained using FT80X_IOC_GETRAMDL.
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*
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* FT80X_IOC_GETDL32:
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* FT80X_IOC_GETRAMDL:
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* Description: Read a 32-bit value from the display list.
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* Argument: A reference to an instance of struct ft80x_dlmem_s below.
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* Argument: A reference to an instance of struct ft80x_relmem_s below.
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* Returns: The 32-bit value read from the display list.
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*
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* FT80X_IOC_PUTRAMG
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* Description: Write byte data to FT80x graphics memory (RAM_G)
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* Argument: A reference to an instance of struct ft80x_relmem_s below.
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* Returns: None.
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*
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* FT80X_IOC_GETREG8:
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* Description: Read an 8-bit register value from the FT80x.
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* Argument: A reference to an instance of struct ft80x_register_s below.
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@ -175,14 +180,15 @@
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#define FT80X_IOC_CREATEDL _LCDIOC(FT80X_NIOCTL_BASE + 0)
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#define FT80X_IOC_APPENDDL _LCDIOC(FT80X_NIOCTL_BASE + 1)
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#define FT80X_IOC_GETDL32 _LCDIOC(FT80X_NIOCTL_BASE + 2)
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#define FT80X_IOC_GETREG8 _LCDIOC(FT80X_NIOCTL_BASE + 3)
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#define FT80X_IOC_GETREG16 _LCDIOC(FT80X_NIOCTL_BASE + 4)
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#define FT80X_IOC_GETREG32 _LCDIOC(FT80X_NIOCTL_BASE + 5)
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#define FT80X_IOC_PUTREG8 _LCDIOC(FT80X_NIOCTL_BASE + 6)
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#define FT80X_IOC_PUTREG16 _LCDIOC(FT80X_NIOCTL_BASE + 7)
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#define FT80X_IOC_PUTREG32 _LCDIOC(FT80X_NIOCTL_BASE + 8)
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#define FT80X_IOC_EVENTNOTIFY _LCDIOC(FT80X_NIOCTL_BASE + 9)
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#define FT80X_IOC_GETRAMDL _LCDIOC(FT80X_NIOCTL_BASE + 2)
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#define FT80X_IOC_PUTRAMG _LCDIOC(FT80X_NIOCTL_BASE + 3)
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#define FT80X_IOC_GETREG8 _LCDIOC(FT80X_NIOCTL_BASE + 4)
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#define FT80X_IOC_GETREG16 _LCDIOC(FT80X_NIOCTL_BASE + 5)
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#define FT80X_IOC_GETREG32 _LCDIOC(FT80X_NIOCTL_BASE + 6)
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#define FT80X_IOC_PUTREG8 _LCDIOC(FT80X_NIOCTL_BASE + 7)
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#define FT80X_IOC_PUTREG16 _LCDIOC(FT80X_NIOCTL_BASE + 8)
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#define FT80X_IOC_PUTREG32 _LCDIOC(FT80X_NIOCTL_BASE + 9)
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#define FT80X_IOC_EVENTNOTIFY _LCDIOC(FT80X_NIOCTL_BASE + 10)
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/* FT80x Memory Map *************************************************************************/
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@ -452,6 +458,21 @@
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((7 << 24) | (((format) & 31) << 19) | (((linestride) & 1023) << 9) | \
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(((height) & 511) << 0))
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/* format */
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#define FT80X_FORMAT_ARGB1555 0
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#define FT80X_FORMAT_L1 1
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#define FT80X_FORMAT_L4 2
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#define FT80X_FORMAT_L8 3
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#define FT80X_FORMAT_RGB332 4
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#define FT80X_FORMAT_ARGB2 5
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#define FT80X_FORMAT_ARGB4 6
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#define FT80X_FORMAT_RGB565 7
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#define FT80X_FORMAT_PALETTED 8
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#define FT80X_FORMAT_TEXT8X8 9
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#define FT80X_FORMAT_TEXTVGA 10
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#define FT80X_FORMAT_BARGRAPH 11
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/* BITMAP_SIZE (0x08) - Set the screen drawing of bitmaps for the current
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* handle
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*/
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@ -460,6 +481,16 @@
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((8 << 24) | (((filter) & 1) << 20) | (((wrapx) & 1) << 19) | \
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(((wrapy) & 1) << 18) | (((width) & 511) << 9) | (((height) & 511) << 0))
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/* filter */
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#define FT80X_FILTER_NEAREST 0
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#define FT80X_FILTER_BILINEAR 1
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/* wrapx/wrapy */
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#define FT80X_WRAP_BORDER 0
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#define FT80X_WRAP_REPEAT 1
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/* BITMAP_SOURCE (0x01) - Set the source address for bitmap graphics */
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#define FT80X_BITMAP_SOURCE(addr) \
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@ -749,10 +780,9 @@
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********************************************************************************************/
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/* FT80x Lower Half Interface Definitions ***************************************************/
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/* Pins relevant to software control. The FT80X is a 48-pin part. Most of
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* the pins are associated with the TFT panel and other board-related
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* support. A few a relevant to software control of the part. Those are
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* listed here:
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/* Pins relevant to software control. The FT80X is a 48-pin part. Most of the pins are
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* associated with the TFT panel and other board-related support. A few a relevant to
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* software control of the part. Those are listed here:
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*
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* FT80X PIN DIR DESCRIPTION
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* 3 I SPI: SCLK, I2C: SCL
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@ -762,17 +792,21 @@
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* 11 OD nINT Host interrupt
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* 12 * nPD Power down input
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*
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* SCL/SDA, SCLK/MISO/MOSI/nCS are handled by generic I2C or SPI logic. nInt
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* and nPD are directly managed by this interface.
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* In addition, if there is a audio amplifier on board (such as TPA6205A or LM4864), then
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* there may also be an active low audio shutdown output:
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*
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* N/A O nSHDN Audio shutdown (active los)
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*
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* SCL/SDA, SCLK/MISO/MOSI/nCS are handled by generic I2C or SPI logic. nInt and nPD are
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* directly managed by this interface.
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*/
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/* A reference to a structure of this type must be passed to the FT80X
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* driver. This structure provides information about the configuration
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* of the FT80X and provides some board-specific hooks.
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/* A reference to a structure of this type must be passed to the FT80X driver. This
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* structure provides information about the configuration of the FT80X and provides some
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* board-specific hooks.
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*
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* Memory for this structure is provided by the caller. It is not copied
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* by the driver and is presumed to persist while the driver is active. The
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* memory may be read-only.
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* Memory for this structure is provided by the caller. It is not copied by the driver and
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* is presumed to persist while the driver is active. The memory may be read-only.
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*/
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struct ft80x_config_s
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@ -785,25 +819,27 @@ struct ft80x_config_s
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uint8_t address; /* 7-bit I2C address */
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#endif
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/* IRQ/GPIO access callbacks. These operations all hidden behind
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* callbacks to isolate the FT80X driver from differences in GPIO
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* interrupt handling by varying boards and MCUs. Interrupts should be
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* configured on the falling edge of nINT.
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/* IRQ/GPIO access callbacks. These operations all hidden behind callbacks to isolate the
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* FT80X driver from differences in GPIO interrupt handling by varying boards and MCUs.
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* Interrupts should be configured on the falling edge of nINT.
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*
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* attach - Attach the ADS7843E interrupt handler to the GPIO interrupt
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* enable - Enable or disable the GPIO interrupt
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* clear - Acknowledge/clear any pending GPIO interrupt
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* pwrdown - Power down the FT80X
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* clear - Acknowledge/clear any pending GPIO interrupt as necessary.
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* pwrdown - Power the FT80X up or down.
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* audio - Enable audio (i.e., set the external audio amplifier shutdown pin to the
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* appropriate level to enable or disable the external audio amplifier)
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* destroy - The driver has been unlinked. Cleanup as necessary.
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*/
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CODE int (*attach)(FAR const struct ft80x_config_s *state, xcpt_t isr,
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CODE int (*attach)(FAR const struct ft80x_config_s *lower, xcpt_t isr,
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FAR void *arg);
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CODE void (*enable)(FAR const struct ft80x_config_s *state, bool enable);
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CODE void (*clear)(FAR const struct ft80x_config_s *state);
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CODE bool (*pwrdown)(FAR const struct ft80x_config_s *state, bool pwrdown);
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CODE void (*enable)(FAR const struct ft80x_config_s *lower, bool enable);
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CODE void (*clear)(FAR const struct ft80x_config_s *lower);
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CODE bool (*pwrdown)(FAR const struct ft80x_config_s *lower, bool pwrdown);
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CODE bool (*audio)(FAR const struct ft80x_config_s *lower, bool enable);
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#ifndef CONFIG_DISABLE_PSEUDOFS_OPERATIONS
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CODE void (*destroy)(FAR const struct ft80x_config_s *state);
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CODE void (*destroy)(FAR const struct ft80x_config_s *lower);
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#endif
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};
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@ -1317,14 +1353,19 @@ struct ft80x_displaylist_s
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struct ft80x_dlcmd_s cmd; /* First command in the display list */
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};
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/* This structure is used with the FT80X_IOC_GETDL32 IOCTL command to
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* retrieve the result of the display list operation from display list memory.
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/* This structure is used with the FT80X_IOC_GETRAMDL and FT80X_IOC_PUTRAMG IOCTL commands to
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* access particular memory regions via an offset.
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*
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* NOTES:
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* - For FT80X_IOC_GET* commands, the value is an output; for FT80X_IOC_PUT* command, the
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* value is an input.
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*/
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struct ft80x_dlmem_s
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struct ft80x_relmem_s
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{
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uint32_t offset; /* 32-bit aligned offset into the display list */
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uint32_t value; /* 32-bit value read from display list + offset */
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uint32_t nbytes; /* Number of bytes to access */
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FAR void *value; /* Value(s) read from memory base + offset */
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};
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/* This structure is used with the FT80X_IOC_EVENTNOTIFY IOCTL command to describe
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@ -50,7 +50,7 @@
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/* IOCTL commands set aside for FT80x character driver */
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#define FT80X_NIOCTL_CMDS 10
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#define FT80X_NIOCTL_CMDS 11
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#define FT80X_NIOCTL_BASE 0x0001
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#endif /* __INCLUDE_NUTTX_INPUT_LCD_IOCTL_H */
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