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Updated LPC1788 SDCARD logic from Rommel Marcelo

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git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@5733 42af7a65-404d-4744-a932-0658087f49c3
This commit is contained in:
patacongo 2013-03-12 00:19:30 +00:00
parent 1549b649a6
commit 23c8c591e9
4 changed files with 16 additions and 10 deletions
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12
arch/arm/src/lpc17xx/chip/lpc17_sdcard.h
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@ -48,10 +48,10 @@
#define LPC17_SDCARD_CMD_OFFSET 0x000c /* SD card command register */
#define LPC17_SDCARD_RESPCMD_OFFSET 0x0010 /* SD card command response register */
#define LPC17_SDCARD_RESP_OFFSET(n) (0x0010+4*(n))
#define LPC17_SDCARD_RESP0_OFFSET 0x0014 /* SD card response 1 register */
#define LPC17_SDCARD_RESP1_OFFSET 0x0018 /* SD card response 2 register */
#define LPC17_SDCARD_RESP2_OFFSET 0x001c /* SD card response 3 register */
#define LPC17_SDCARD_RESP3_OFFSET 0x0020 /* SD card response 4 register */
# define LPC17_SDCARD_RESP0_OFFSET 0x0014 /* SD card response 1 register */
# define LPC17_SDCARD_RESP1_OFFSET 0x0018 /* SD card response 2 register */
# define LPC17_SDCARD_RESP2_OFFSET 0x001c /* SD card response 3 register */
# define LPC17_SDCARD_RESP3_OFFSET 0x0020 /* SD card response 4 register */
#define LPC17_SDCARD_DTIMER_OFFSET 0x0024 /* SD card data timer register */
#define LPC17_SDCARD_DLEN_OFFSET 0x0028 /* SD card data length register */
#define LPC17_SDCARD_DCTRL_OFFSET 0x002c /* SD card data control register */
@ -151,7 +151,7 @@
/* MCI - Data Length Register DATALENGTH - 0x400C 0028 */
#define SDCARD_DATALENGTH_SHIFT (0) /* Bits 0-15: Data length value */
#define SDCARD_DATALENGTH_MASK (0xffff << SDCARD_DATALENGTH_MASK)
#define SDCARD_DATALENGTH_MASK (0xffff << SDCARD_DATALENGTH_SHIFT)
/* Bits 16-31: Reserved */
#define SDCARD_DLEN_RESET (0) /* Reset value */
@ -227,7 +227,7 @@
#define SDCARD_CLEAR_DBCKENDC (1 << 10) /* Bit 10: DBCKEND flag clear bit */
/* Bits 11-31: Reserved */
#define SDCARD_CLEAR_RESET 0x000005ff
#define SDCARD_CLEAR_RESET 0x000007ff
#define SDCARD_CLEAR_STATICFLAGS 0x000005ff
/* MCI - Interrupt Mask Registers - MASK0 - 0x400c 003c */

8
arch/arm/src/lpc17xx/lpc17_sdcard.c
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@ -619,8 +619,12 @@ static void lpc17_setpwrctrl(uint32_t pwrctrl)
{
uint32_t regval;
/* Set the new value of the PWRCTRL field of the PWR register. Also, as a
* side-effect, clear the OPENDRAIN and ROD bits as well.
*/
regval = getreg32(LPC17_SDCARD_PWR);
regval &= ~SDCARD_PWR_CTRL_MASK;
regval &= ~(SDCARD_PWR_CTRL_MASK | SDCARD_PWR_OPENDRAIN | SDCARD_PWR_ROD);
regval |= pwrctrl;
putreg32(regval, LPC17_SDCARD_PWR);
}
@ -643,6 +647,8 @@ static void lpc17_setpwrctrl(uint32_t pwrctrl)
static inline uint32_t lpc17_getpwrctrl(void)
{
/* Extract and return the PWRCTRL field of the PWR register. */
return getreg32(LPC17_SDCARD_PWR) & SDCARD_PWR_CTRL_MASK;
}

2
arch/arm/src/stm32/chip/stm32_sdio.h
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@ -1,7 +1,7 @@
/************************************************************************************
* arch/arm/src/stm32/chip/stm32_sdio.h
*
* Copyright (C) 2009, 2011-2012 Gregory Nutt. All rights reserved.
* Copyright (C) 2009, 2011-2013 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without

4
configs/open1788/include/board.h
View File

@ -151,8 +151,8 @@
* SDCARD_CLOCK=PCLK/(2*(SDCARD_CLKDIV+1))
*/
#define SDCARD_SLOW_CLKDIV 74 /* 400Khz */
#define SDCARD_INIT_CLKDIV (BOARD_PCLK_FREQUENCY/(2*(SDCARD_SLOW_CLKDIV+1)))
#define SDCARD_CLKDIV_INIT 74 /* 400Khz */
#define SDCARD_INIT_CLKDIV (BOARD_PCLK_FREQUENCY/(2*(SDCARD_CLKDIV_INIT+1)))
#define SDCARD_NORMAL_CLKDIV 1 /* DMA ON: SDCARD_CLOCK=15MHz */
#define SDCARD_SLOW_CLKDIV 2 /* DMA OFF: SDCARD_CLOCK=10MHz */