From 241c42447f40af5eaaae2e728bf13483c968dccb Mon Sep 17 00:00:00 2001 From: raiden00pl Date: Sun, 20 Aug 2017 09:44:03 +0200 Subject: [PATCH] stm32f33xxx_comp.h: typos --- arch/arm/src/stm32/chip/stm32f33xxx_comp.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm/src/stm32/chip/stm32f33xxx_comp.h b/arch/arm/src/stm32/chip/stm32f33xxx_comp.h index 0e83a1c965..cb3ce96a8f 100644 --- a/arch/arm/src/stm32/chip/stm32f33xxx_comp.h +++ b/arch/arm/src/stm32/chip/stm32f33xxx_comp.h @@ -76,8 +76,8 @@ # define COMP_CSR_INMSEL_DAC1CH1 (4 << COMP_CSR_INMSEL_SHIFT) /* 0100: DAC1_CH1 output if enabled */ # define COMP_CSR_INMSEL_DAC1CH2 (5 << COMP_CSR_INMSEL_SHIFT) /* 0101: DAC1_CH2 output */ # define COMP_CSR_INMSEL_PA2 (6 << COMP_CSR_INMSEL_SHIFT) /* 0110: PA2 (COMP2 only) */ -# define COMP_CSR_INMSEL_PB2 (7 << COMP4_CSR_INMSEL_SHIFT) /* 0111: PB2 (COMP4 only) */ -# define COMP_CSR_INMSEL_PB15 (7 << COMP6_CSR_INMSEL_SHIFT) /* 0110: PB15 (COMP6 only) */ +# define COMP_CSR_INMSEL_PB2 (7 << COMP_CSR_INMSEL_SHIFT) /* 0111: PB2 (COMP4 only) */ +# define COMP_CSR_INMSEL_PB15 (7 << COMP_CSR_INMSEL_SHIFT) /* 0111: PB15 (COMP6 only) */ /* 1000: DAC2_CH1 output, look at bit 22 */ /* Bits 7-9: Reserved */ #define COMP_CSR_OUTSEL_SHIFT (4) /* Bits 10-13: Comparator output selection */