The ENC28J60 driver is now functional
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@5165 42af7a65-404d-4744-a932-0658087f49c3
This commit is contained in:
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@ -3375,3 +3375,5 @@
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the common tools/Make.mk. Add support for a verbosity options:
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Specify V=1 on the make command line in order to see the exact
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commands used in the build (Contributed by Richard Cochran).
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* drivers/net/enc28j60.c: The ENC28J60 Ethernet driver is
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now functional.
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@ -213,9 +213,6 @@ struct enc_driver_s
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uint8_t ifstate; /* Interface state: See ENCSTATE_* */
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uint8_t bank; /* Currently selected bank */
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#ifndef CONFIG_SPI_OWNBUS
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uint8_t lockcount; /* Avoid recursive locks */
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#endif
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uint16_t nextpkt; /* Next packet address */
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FAR const struct enc_lower_s *lower; /* Low-level MCU-specific support */
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@ -259,13 +256,14 @@ static struct enc_driver_s g_enc28j60[CONFIG_ENC28J60_NINTERFACES];
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/* Low-level SPI helpers */
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static inline void enc_configspi(FAR struct spi_dev_s *spi);
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#ifdef CONFIG_SPI_OWNBUS
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static inline void enc_select(FAR struct enc_driver_s *priv);
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static inline void enc_deselect(FAR struct enc_driver_s *priv);
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static inline void enc_configspi(FAR struct spi_dev_s *spi);
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# define enc_lock(priv);
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# define enc_unlock(priv);
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#else
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static void enc_select(FAR struct enc_driver_s *priv);
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static void enc_deselect(FAR struct enc_driver_s *priv);
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# define enc_configspi(spi)
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static void enc_lock(FAR struct enc_driver_s *priv);
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static inline void enc_unlock(FAR struct enc_driver_s *priv);
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#endif
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/* SPI control register access */
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@ -360,23 +358,21 @@ static int enc_reset(FAR struct enc_driver_s *priv);
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*
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****************************************************************************/
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#ifdef CONFIG_SPI_OWNBUS
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static inline void enc_configspi(FAR struct spi_dev_s *spi)
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{
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/* Configure SPI for the ENC28J60. But only if we own the SPI bus.
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* Otherwise, don't bother because it might change.
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*/
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#ifdef CONFIG_SPI_OWNBUS
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SPI_SETMODE(spi, CONFIG_ENC28J60_SPIMODE);
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SPI_SETBITS(spi, 8);
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#ifdef CONFIG_ENC28J60_FREQUENCY
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SPI_SETFREQUENCY(spi, CONFIG_ENC28J60_FREQUENCY)
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#endif
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#endif
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}
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#endif
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/****************************************************************************
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* Function: enc_select
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* Function: enc_lock
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*
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* Description:
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* Select the SPI, locking and re-configuring if necessary
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@ -391,56 +387,27 @@ static inline void enc_configspi(FAR struct spi_dev_s *spi)
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*
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****************************************************************************/
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#ifdef CONFIG_SPI_OWNBUS
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static inline void enc_select(FAR struct enc_driver_s *priv)
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{
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/* We own the SPI bus, so just select the chip */
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SPI_SELECT(priv->spi, SPIDEV_ETHERNET, true);
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}
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#else
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static void enc_select(FAR struct enc_driver_s *priv)
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#ifndef CONFIG_SPI_OWNBUS
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static void enc_lock(FAR struct enc_driver_s *priv)
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{
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/* Lock the SPI bus in case there are multiple devices competing for the SPI
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* bus. First check if we already hold the lock.
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* bus.
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*/
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if (priv->lockcount > 0)
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{
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/* Yes... just increment the lock count. In this case, we know
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* that the bus has already been configured for the ENC28J60.
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*/
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SPI_LOCK(priv->spi, true);
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DEBUGASSERT(priv->lockcount < 255);
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priv->lockcount++;
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}
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else
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{
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/* No... take the lock and set the lock count to 1 */
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/* Now make sure that the SPI bus is configured for the ENC28J60 (it
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* might have gotten configured for a different device while unlocked)
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*/
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DEBUGASSERT(priv->lockcount == 0);
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SPI_LOCK(priv->spi, true);
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priv->lockcount = 1;
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/* Now make sure that the SPI bus is configured for the ENC28J60 (it
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* might have gotten configured for a different device while unlocked)
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*/
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SPI_SETMODE(priv->spi, CONFIG_ENC28J60_SPIMODE);
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SPI_SETBITS(priv->spi, 8);
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#ifdef CONFIG_ENC28J60_FREQUENCY
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SPI_SETFREQUENCY(priv->spi, CONFIG_ENC28J60_FREQUENCY);
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#endif
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}
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/* Select ENC28J60 chip. */
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SPI_SELECT(priv->spi, SPIDEV_ETHERNET, true);
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SPI_SETMODE(priv->spi, CONFIG_ENC28J60_SPIMODE);
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SPI_SETBITS(priv->spi, 8);
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SPI_SETFREQUENCY(priv->spi, CONFIG_ENC28J60_FREQUENCY);
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}
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#endif
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/****************************************************************************
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* Function: enc_deselect
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* Function: enc_unlock
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*
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* Description:
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* De-select the SPI
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@ -455,34 +422,12 @@ static void enc_select(FAR struct enc_driver_s *priv)
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*
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****************************************************************************/
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#ifdef CONFIG_SPI_OWNBUS
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static inline void enc_deselect(FAR struct enc_driver_s *priv)
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#ifndef CONFIG_SPI_OWNBUS
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static inline void enc_unlock(FAR struct enc_driver_s *priv)
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{
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/* We own the SPI bus, so just de-select the chip */
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/* Relinquish the lock on the bus. */
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SPI_SELECT(priv->spi, SPIDEV_ETHERNET, false);
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}
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#else
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static void enc_deselect(FAR struct enc_driver_s *priv)
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{
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/* De-select ENC28J60 chip. */
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SPI_SELECT(priv->spi, SPIDEV_ETHERNET, false);
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/* And relinquishthe lock on the bus. If the lock count is > 1 then we
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* are in a nested lock and we only need to decrement the lock cound.
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*/
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if (priv->lockcount <= 1)
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{
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DEBUGASSERT(priv->lockcount == 1);
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SPI_LOCK(priv->spi, false);
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priv->lockcount = 0;
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}
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else
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{
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priv->lockcount--;
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}
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SPI_LOCK(priv->spi, false);
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}
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#endif
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@ -512,7 +457,7 @@ static uint8_t enc_rdgreg2(FAR struct enc_driver_s *priv, uint8_t cmd)
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/* Select ENC28J60 chip */
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enc_select(priv);
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SPI_SELECT(priv->spi, SPIDEV_ETHERNET, true);;
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/* Send the read command and collect the data. The sequence requires
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* 16-clocks: 8 to clock out the cmd + 8 to clock in the data.
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@ -523,7 +468,7 @@ static uint8_t enc_rdgreg2(FAR struct enc_driver_s *priv, uint8_t cmd)
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/* De-select ENC28J60 chip */
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enc_deselect(priv);
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SPI_SELECT(priv->spi, SPIDEV_ETHERNET, false);
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enc_rddump(cmd, rddata);
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return rddata;
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@ -555,7 +500,7 @@ static void enc_wrgreg2(FAR struct enc_driver_s *priv, uint8_t cmd,
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/* Select ENC28J60 chip */
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enc_select(priv);
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SPI_SELECT(priv->spi, SPIDEV_ETHERNET, true);;
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/* Send the write command and data. The sequence requires 16-clocks:
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* 8 to clock out the cmd + 8 to clock out the data.
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@ -566,7 +511,7 @@ static void enc_wrgreg2(FAR struct enc_driver_s *priv, uint8_t cmd,
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/* De-select ENC28J60 chip. */
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enc_deselect(priv);
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SPI_SELECT(priv->spi, SPIDEV_ETHERNET, false);
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enc_wrdump(cmd, wrdata);
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}
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@ -599,7 +544,7 @@ static inline void enc_src(FAR struct enc_driver_s *priv)
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/* Select ENC28J60 chip */
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enc_select(priv);
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SPI_SELECT(priv->spi, SPIDEV_ETHERNET, true);;
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/* Send the system reset command. */
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@ -620,7 +565,7 @@ static inline void enc_src(FAR struct enc_driver_s *priv)
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/* De-select ENC28J60 chip. */
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enc_deselect(priv);
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SPI_SELECT(priv->spi, SPIDEV_ETHERNET, false);
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enc_cmddump(ENC_SRC);
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}
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@ -696,7 +641,7 @@ static uint8_t enc_rdbreg(FAR struct enc_driver_s *priv, uint8_t ctrlreg)
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/* Re-select ENC28J60 chip */
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enc_select(priv);
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SPI_SELECT(priv->spi, SPIDEV_ETHERNET, true);;
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/* Send the RCR command and collect the data. How we collect the data
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* depends on if this is a PHY/CAN or not. The normal sequence requires
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@ -717,7 +662,7 @@ static uint8_t enc_rdbreg(FAR struct enc_driver_s *priv, uint8_t ctrlreg)
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/* De-select ENC28J60 chip */
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enc_deselect(priv);
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SPI_SELECT(priv->spi, SPIDEV_ETHERNET, false);
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enc_rddump(ENC_RCR | GETADDR(ctrlreg), rddata);
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return rddata;
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}
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@ -753,7 +698,7 @@ static void enc_wrbreg(FAR struct enc_driver_s *priv, uint8_t ctrlreg,
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/* Re-select ENC28J60 chip */
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enc_select(priv);
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SPI_SELECT(priv->spi, SPIDEV_ETHERNET, true);;
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/* Send the WCR command and data. The sequence requires 16-clocks:
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* 8 to clock out the cmd + 8 to clock out the data.
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@ -764,7 +709,7 @@ static void enc_wrbreg(FAR struct enc_driver_s *priv, uint8_t ctrlreg,
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/* De-select ENC28J60 chip. */
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enc_deselect(priv);
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SPI_SELECT(priv->spi, SPIDEV_ETHERNET, false);
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enc_wrdump(ENC_WCR | GETADDR(ctrlreg), wrdata);
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}
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@ -847,9 +792,9 @@ static void enc_rxdump(FAR struct enc_driver_s *priv)
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lib_lowprintf(" MAMXFL: %02x %02x\n",
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enc_rdbreg(priv, ENC_MAMXFLH), enc_rdbreg(priv, ENC_MAMXFLL));
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lib_lowprintf(" MAADR: %02x:%02x:%02x:%02x:%02x:%02x\n",
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enc_rdgreg(priv, ENC_MAADR1), enc_rdgreg(priv, ENC_MAADR2),
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enc_rdgreg(priv, ENC_MAADR3), enc_rdgreg(priv, ENC_MAADR4),
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enc_rdgreg(priv, ENC_MAADR5), enc_rdgreg(priv, ENC_MAADR6));
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enc_rdbreg(priv, ENC_MAADR1), enc_rdbreg(priv, ENC_MAADR2),
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enc_rdbreg(priv, ENC_MAADR3), enc_rdbreg(priv, ENC_MAADR4),
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enc_rdbreg(priv, ENC_MAADR5), enc_rdbreg(priv, ENC_MAADR6));
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}
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#endif
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@ -907,7 +852,7 @@ static void enc_rdbuffer(FAR struct enc_driver_s *priv, FAR uint8_t *buffer,
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/* Select ENC28J60 chip */
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enc_select(priv);
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SPI_SELECT(priv->spi, SPIDEV_ETHERNET, true);;
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/* Send the read buffer memory command (ignoring the response) */
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@ -919,7 +864,7 @@ static void enc_rdbuffer(FAR struct enc_driver_s *priv, FAR uint8_t *buffer,
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/* De-select ENC28J60 chip. */
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enc_deselect(priv);
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SPI_SELECT(priv->spi, SPIDEV_ETHERNET, false);
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enc_bmdump(ENC_WBM, buffer, buflen);
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}
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@ -952,7 +897,7 @@ static inline void enc_wrbuffer(FAR struct enc_driver_s *priv,
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* "The WBM command is started by lowering the CS pin. ..."
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*/
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enc_select(priv);
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SPI_SELECT(priv->spi, SPIDEV_ETHERNET, true);;
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/* Send the write buffer memory command (ignoring the response)
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*
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@ -1002,7 +947,7 @@ static inline void enc_wrbuffer(FAR struct enc_driver_s *priv,
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* "The WBM command is terminated by bringing up the CS pin. ..."
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*/
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enc_deselect(priv);
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SPI_SELECT(priv->spi, SPIDEV_ETHERNET, false);
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enc_bmdump(ENC_WBM, buffer, buflen+1);
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}
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@ -1483,14 +1428,15 @@ static void enc_pktif(FAR struct enc_driver_s *priv)
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priv->stats.pktifs++;
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#endif
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/* Set the read pointer to the start of the received packet */
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/* Set the read pointer to the start of the received packet (ERDPT) */
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DEBUGASSERT(priv->nextpkt <= PKTMEM_RX_END);
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enc_wrbreg(priv, ENC_ERDPTL, (priv->nextpkt));
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enc_wrbreg(priv, ENC_ERDPTH, (priv->nextpkt) >> 8);
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/* Read the next packet pointer and the 4 byte read status vector (RSV)
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* at the beginning of the received packet
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* at the beginning of the received packet. (ERDPT should auto-increment
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* and wrap to the beginning of the read buffer as necessary)
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*/
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enc_rdbuffer(priv, rsv, 6);
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@ -1540,7 +1486,10 @@ static void enc_pktif(FAR struct enc_driver_s *priv)
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priv->dev.d_len = pktlen - 4;
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/* Copy the data data from the receive buffer to priv->dev.d_buf */
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/* Copy the data data from the receive buffer to priv->dev.d_buf.
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* ERDPT should be correctly positioned from the last call to to
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* end_rdbuffer (above).
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*/
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enc_rdbuffer(priv, priv->dev.d_buf, priv->dev.d_len);
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enc_dumppacket("Received Packet", priv->dev.d_buf, priv->dev.d_len);
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@ -1587,9 +1536,10 @@ static void enc_irqworker(FAR void *arg)
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DEBUGASSERT(priv);
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/* Get exclusive access to uIP. */
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/* Get exclusive access to both uIP and the SPI bus. */
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lock = uip_lock();
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enc_lock(priv);
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/* Disable further interrupts by clearing the global interrupt enable bit.
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* "After an interrupt occurs, the host controller should clear the global
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@ -1773,14 +1723,15 @@ static void enc_irqworker(FAR void *arg)
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}
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}
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/* Release lock on uIP */
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uip_unlock(lock);
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/* Enable Ethernet interrupts */
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enc_bfsgreg(priv, ENC_EIE, EIE_INTIE);
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/* Release lock on the SPI bus and uIP */
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enc_unlock(priv);
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uip_unlock(lock);
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/* Enable GPIO interrupts */
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priv->lower->enable(priv->lower);
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@ -1851,9 +1802,10 @@ static void enc_toworker(FAR void *arg)
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nlldbg("Tx timeout\n");
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DEBUGASSERT(priv);
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/* Get exclusive access to uIP. */
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/* Get exclusive access to both uIP and the SPI bus. */
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lock = uip_lock();
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enc_lock(priv);
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/* Increment statistics and dump debug info */
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@ -1874,8 +1826,9 @@ static void enc_toworker(FAR void *arg)
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(void)uip_poll(&priv->dev, enc_uiptxpoll);
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/* Release lock on uIP */
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/* Release lock on the SPI bus and uIP */
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enc_unlock(priv);
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uip_unlock(lock);
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}
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@ -1943,9 +1896,10 @@ static void enc_pollworker(FAR void *arg)
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DEBUGASSERT(priv);
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/* Get exclusive access to uIP. */
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/* Get exclusive access to both uIP and the SPI bus. */
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lock = uip_lock();
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enc_lock(priv);
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/* Verify that the hardware is ready to send another packet. The driver
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* start a transmission process by setting ECON1.TXRTS. When the packet is
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@ -1963,8 +1917,9 @@ static void enc_pollworker(FAR void *arg)
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(void)uip_timer(&priv->dev, enc_uiptxpoll, ENC_POLLHSEC);
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}
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/* Release lock on uIP */
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/* Release lock on the SPI bus and uIP */
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enc_unlock(priv);
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uip_unlock(lock);
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/* Setup the watchdog poll timer again */
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@ -2037,6 +1992,10 @@ static int enc_ifup(struct uip_driver_s *dev)
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dev->d_ipaddr & 0xff, (dev->d_ipaddr >> 8) & 0xff,
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(dev->d_ipaddr >> 16) & 0xff, dev->d_ipaddr >> 24 );
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/* Lock the SPI bus so that we have exclusive access */
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enc_lock(priv);
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/* Initialize Ethernet interface, set the MAC address, and make sure that
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* the ENC28J80 is not in power save mode.
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*/
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@ -2072,6 +2031,9 @@ static int enc_ifup(struct uip_driver_s *dev)
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priv->lower->enable(priv->lower);
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}
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/* Un-lock the SPI bus */
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enc_unlock(priv);
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return ret;
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}
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@ -2101,6 +2063,10 @@ static int enc_ifdown(struct uip_driver_s *dev)
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dev->d_ipaddr & 0xff, (dev->d_ipaddr >> 8) & 0xff,
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(dev->d_ipaddr >> 16) & 0xff, dev->d_ipaddr >> 24 );
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/* Lock the SPI bus so that we have exclusive access */
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enc_lock(priv);
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/* Disable the Ethernet interrupt */
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flags = irqsave();
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@ -2118,6 +2084,10 @@ static int enc_ifdown(struct uip_driver_s *dev)
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priv->ifstate = ENCSTATE_DOWN;
|
||||
irqrestore(flags);
|
||||
|
||||
/* Un-lock the SPI bus */
|
||||
|
||||
enc_unlock(priv);
|
||||
return ret;
|
||||
}
|
||||
|
||||
@ -2145,10 +2115,13 @@ static int enc_txavail(struct uip_driver_s *dev)
|
||||
FAR struct enc_driver_s *priv = (FAR struct enc_driver_s *)dev->d_private;
|
||||
irqstate_t flags;
|
||||
|
||||
flags = irqsave();
|
||||
/* Lock the SPI bus so that we have exclusive access */
|
||||
|
||||
enc_lock(priv);
|
||||
|
||||
/* Ignore the notification if the interface is not yet up */
|
||||
|
||||
flags = irqsave();
|
||||
if (priv->ifstate == ENCSTATE_UP)
|
||||
{
|
||||
/* Check if the hardware is ready to send another packet. The driver
|
||||
@ -2165,7 +2138,10 @@ static int enc_txavail(struct uip_driver_s *dev)
|
||||
}
|
||||
}
|
||||
|
||||
/* Un-lock the SPI bus */
|
||||
|
||||
irqrestore(flags);
|
||||
enc_unlock(priv);
|
||||
return OK;
|
||||
}
|
||||
|
||||
@ -2192,9 +2168,17 @@ static int enc_addmac(struct uip_driver_s *dev, FAR const uint8_t *mac)
|
||||
{
|
||||
FAR struct enc_driver_s *priv = (FAR struct enc_driver_s *)dev->d_private;
|
||||
|
||||
/* Lock the SPI bus so that we have exclusive access */
|
||||
|
||||
enc_lock(priv);
|
||||
|
||||
/* Add the MAC address to the hardware multicast routing table */
|
||||
|
||||
#warning "Multicast MAC support not implemented"
|
||||
|
||||
/* Un-lock the SPI bus */
|
||||
|
||||
enc_unlock(priv);
|
||||
return OK;
|
||||
}
|
||||
#endif
|
||||
@ -2222,9 +2206,17 @@ static int enc_rmmac(struct uip_driver_s *dev, FAR const uint8_t *mac)
|
||||
{
|
||||
FAR struct enc_driver_s *priv = (FAR struct enc_driver_s *)dev->d_private;
|
||||
|
||||
/* Lock the SPI bus so that we have exclusive access */
|
||||
|
||||
enc_lock(priv);
|
||||
|
||||
/* Add the MAC address to the hardware multicast routing table */
|
||||
|
||||
#warning "Multicast MAC support not implemented"
|
||||
|
||||
/* Un-lock the SPI bus */
|
||||
|
||||
enc_unlock(priv);
|
||||
return OK;
|
||||
}
|
||||
#endif
|
||||
|
Loading…
Reference in New Issue
Block a user