arch/arm/src/sama5/hardware/_sama5d3x_memorymap.h: Restore lines (#464)
Restore lines from bad nxstyle fixes; restore file to previous state
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@ -103,6 +103,7 @@
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# define SAM_ISI_OFFSET 0x00034000 /* 0x00034000-0x00037fff: ISI */
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# define SAM_SFR_OFFSET 0x00038000 /* 0x00038000-0x0003bfff: SFR */
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/* 0x0003c000-0x07ffffff: Reserved */
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#define SAM_PERIPHB_PSECTION 0xf8000000 /* 0xf8000000-0xffffbfff: Internal Peripherals B */
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# define SAM_HSMCI1_OFFSET 0x00000000 /* 0x00000000-0x00000fff: HSMCI1 */
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# define SAM_HSMCI2_OFFSET 0x00004000 /* 0x00004000-0x00007fff: HSMCI2 */
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# define SAM_SPI1_OFFSET 0x00008000 /* 0x00008000-0x0000bfff: SPI1 */
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@ -121,6 +122,7 @@
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# define SAM_TDES_OFFSET 0x0003c000 /* 0x0003c000-0x0003ffff: TDES */
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# define SAM_TRNG_OFFSET 0x00040000 /* 0x00040000-0x00043fff: TRNG */
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/* 0x00044000-0x00ffbfff: Reserved */
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#define SAM_SYSC_PSECTION 0xfff00000 /* 0xfff00000-0xffffffff: System Controller */
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# define SAM_SYSC_PADDR 0xffffc000 /* 0xffffc000-0xffffffff: System Controller */
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# define SAM_SYSC_OFFSET 0x00000000 /* 0x0fffc000-0x0fffffff: System Controller */
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@ -130,6 +132,7 @@
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#define SAM_HSMC_OFFSET 0x00000000 /* 0x00000000-0x00000fff: HSMC */
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/* 0x00001000-0x000023ff: Reserved */
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#define SAM_FUSE_OFFSET 0x00002400 /* 0x00002400-0x000025ff: FUSE */
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#define SAM_DMAC0_OFFSET 0x00002600 /* 0x00002600-0x000027ff: DMAC0 */
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#define SAM_DMAC1_OFFSET 0x00002800 /* 0x00002800-0x000029ff: DMAC1 */
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#define SAM_MPDDRC_OFFSET 0x00002a00 /* 0x00002a00-0x00002bff: MPDDRC */
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@ -146,11 +149,13 @@
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#define SAM_RSTC_OFFSET 0x00003e00 /* 0x00003e00-0x00003e0f: RSTC */
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#define SAM_SHDC_OFFSET 0x00003e10 /* 0x00003e10-0x00003e1f: SHDC */
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/* 0x00003e20-0x00003e2f: Reserved */
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#define SAM_PITC_OFFSET 0x00003e30 /* 0x00003e30-0x00003e3f: PITC */
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#define SAM_WDT_OFFSET 0x00003e40 /* 0x00003e40-0x00003e4f: WDT */
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#define SAM_SCKCR_OFFSET 0x00003e50 /* 0x00003e50-0x00003e53: SCKCR */
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#define SAM_BSC_OFFSET 0x00003e54 /* 0x00003e54-0x00003e5f: BSC */
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#define SAM_GPBR_OFFSET 0x00003e60 /* 0x00003e60-0x00003e6f: GPBR */
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/* 0x00003e70-0x00003eaf: Reserved */
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#define SAM_RTCC_OFFSET 0x00003eb0 /* 0x00003eb0-0x00003edf: RTCC */
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/* 0x00003ee0-0x00003fff: Reserved */
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/* Sizes of memory regions in bytes.
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@ -161,6 +166,7 @@
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*/
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/* 0x00000000-0x0fffffff: Internal Memories */
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#define SAM_BOOTMEM_SIZE (1*1024*1024) /* 0x00000000-0x000fffff: Boot memory */
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#define SAM_ROM_SIZE (1*1024*1024) /* 0x00100000-0x001fffff: ROM */
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#define SAM_NFCSRAM_SIZE (1*1024*1024) /* 0x00200000-0x002fffff: NFC SRAM */
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/* 0x00300000-0x003fffff: SRAM0 and SRAM1 */
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@ -174,6 +180,7 @@
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#define SAM_DAP_SIZE (1*1024*1024) /* 0x00900000-0x009fffff: DAP */
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#define SAM_NFCCR_SIZE (256*1024*1024) /* 0x70000000-0x7fffffff: NFC Command Registers */
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/* 0xf0000000-0xffffffff: Internal Peripherals */
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#define SAM_PERIPHA_SIZE (240*1024) /* 0xf0000000-0xf003bfff: Internal Peripherals */
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#define SAM_PERIPHB_SIZE (272*1024) /* 0xf8000000-0xf8043fff: Internal Peripherals */
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#define SAM_SYSC_SIZE (1*1024*1024) /* 0xfff00000-0x0ffffedf: Internal Peripherals */
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@ -355,8 +362,8 @@
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#define SAM_PERIPH_VSECTION 0xf0000000 /* 0xf0000000-0xffffffff: Internal Peripherals */
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# define SAM_PERIPHA_VSECTION 0xf0000000 /* 0xf0000000-0xf7ffffff: Internal Peripherals A */
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# define SAM_PERIPHB_VSECTION 0xf8000000 /* 0xf8000000-0xffefffff: Internal Peripherals B */
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# define SAM_SYSC_VSECTION 0xf8048000 /* 0xf8048000-0xf8048fff: System Controller */
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# define SAM_SYSC_VADDR 0xf80fc000 /* 0xf8048000-0xf8048fff: System Controller */
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# define SAM_SYSC_VSECTION 0xfff00000 /* 0xfff00000-0xffffbfff: System Controller */
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# define SAM_SYSC_VADDR 0xffffc000 /* 0xffffc000-0xffffffff: System Controller */
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#else
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#define SAM_PERIPH_VSECTION 0xf0000000 /* 0xf0000000-0xffffffff: Internal Peripherals */
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# define SAM_PERIPHA_VSECTION 0xf0000000 /* 0xf0000000-0xf00fffff: Internal Peripherals A */
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