stm32: configure PLLSAI clock to enable ltdc register access
Signed-off-by: Marco Krahl <ocram.lhark@gmail.com>
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@ -746,6 +746,32 @@ static void stm32_stdclockconfig(void)
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while ((getreg32(STM32_RCC_CFGR) & RCC_CFGR_SWS_MASK) != RCC_CFGR_SWS_PLL)
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{
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}
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#ifdef CONFIG_STM32_LTDC
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/* Configure PLLSAI */
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regval = getreg32(STM32_RCC_PLLSAICFGR);
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regval |= (STM32_RCC_PLLSAICFGR_PLLSAIN
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| STM32_RCC_PLLSAICFGR_PLLSAIR
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| STM32_RCC_PLLSAICFGR_PLLSAIQ);
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putreg32(regval, STM32_RCC_PLLSAICFGR);
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regval = getreg32(STM32_RCC_DCKCFGR);
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regval |= STM32_RCC_DCKCFGR_PLLSAIDIVR;
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putreg32(regval, STM32_RCC_DCKCFGR);
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/* Enable PLLSAI */
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regval = getreg32(STM32_RCC_CR);
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regval |= RCC_CR_PLLSAION;
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putreg32(regval, STM32_RCC_CR);
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/* Wait until the PLLSAI is ready */
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while ((getreg32(STM32_RCC_CR) & RCC_CR_PLLSAIRDY) == 0)
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{
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}
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#endif
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}
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}
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#endif
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