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Kinetis: Add architectural support for the K26Z128VLH4. From Derek B. Noonburg

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This commit is contained in:
Gregory Nutt 2015-02-11 07:15:45 -06:00
parent 28c2d93212
commit 24e51794f9
3 changed files with 93 additions and 4 deletions
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39
arch/arm/include/kl/chip.h
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@ -87,6 +87,45 @@
# undef KL_NTAMPER /* No tamper detect */
# undef KL_NCRC /* No CRC */
#elif defined(CONFIG_ARCH_CHIP_MKL26Z128)
# define KL_Z128 1 /* Kinetics KL25Z128 family */
# define KL_FLASH_SIZE (128*1024) /* 64Kb */
# define KL_SRAM_SIZE (16*1024) /* 16Kb */
# undef KL_MPU /* No memory protection unit */
# undef KL_EXTBUS /* No external bus interface */
# define KL_NDMACH 4 /* Up to 4 DMA channels */
# undef KL_NENET /* No Ethernet controller */
# define KL_NUSBHOST 1 /* One USB host controller */
# define KL_NUSBOTG 1 /* With USB OTG controller */
# define KL_NUSBDEV 1 /* One USB device controller */
# undef KL_NSDHC /* No SD host controller */
# define KL_NTOUCHIF 1 /* Xtrinsic touch sensing interface */
# define KL_NI2C 2 /* Two I2C modules */
# define KL_NUART 3 /* Three UARTs */
# define KL_NSPI 2 /* Two SPI modules */
# undef KL_NCAN /* No CAN in 64-pin chips */
# define KL_NI2S 1 /* One I2S module */
# undef KL_NSLCD /* One segment LCD interface (up to 25x8/29x4) */
# define KL_NADC16 1 /* One 16-bit ADC */
# undef KL_NADC12 /* No 12-channel ADC */
# undef KL_NADC13 /* No 13-channel ADC */
# undef KL_NADC15 /* No 15-channel ADC */
# undef KL_NADC18 /* No 18-channel ADC */
# undef KL_NPGA /* No Programmable Gain Amplifiers */
# define KL_NCMP 1 /* One analog comparator */
# define KL_NDAC6 1 /* Three 6-bit DAC */
# define KL_NDAC12 1 /* Two 12-bit DAC */
# define KL_NVREF 1 /* Voltage reference */
# define KL_NTIMERS8 1 /* One 8 channel timers */
# undef KL_NTIMERS12 /* No 12 channel timers */
# undef KL_NTIMERS20 /* No 20 channel timers */
# undef KL_NRNG /* No random number generator */
# define KL_NRTC 1 /* Real time clock */
# undef KL_NMMCAU /* No hardware encryption */
# undef KL_NTAMPER /* No tamper detect */
# undef KL_NCRC /* No CRC */
#else
# error "Unsupported Kinetis chip"
#endif

46
arch/arm/include/kl/irq.h
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@ -125,6 +125,52 @@
# define NR_VECTORS (64) /* 64 vectors */
# define NR_IRQS (48) /* 64 interrupts but 48 IRQ numbers */
#elif defined(CONFIG_ARCH_CHIP_MKL26Z128)
# define KL_IRQ_DMACH0 (16) /* Vector 16: DMA channel 0 transfer complete */
# define KL_IRQ_DMACH1 (17) /* Vector 17: DMA channel 1 transfer complete */
# define KL_IRQ_DMACH2 (18) /* Vector 18: DMA channel 2 transfer complete */
# define KL_IRQ_DMACH3 (19) /* Vector 19: DMA channel 3 transfer complete */
/* Vector 20: Reserved */
# define KL_IRQ_FTFA (21) /* Vector 21: FTFA */
# define KL_IRQ_LVDLVW (22) /* Vector 22: LVD_LVW */
# define KL_IRQ_LLW (23) /* Vector 23: LLW */
# define KL_IRQ_I2C0 (24) /* Vector 24: I2C0 */
# define KL_IRQ_I2C1 (25) /* Vector 25: I2C1 */
# define KL_IRQ_SPI0 (26) /* Vector 26: SPI0 */
# define KL_IRQ_SPI1 (27) /* Vector 27: SPI1 */
# define KL_IRQ_UART0 (28) /* Vector 28: UART0 */
# define KL_IRQ_UART1 (29) /* Vector 29: UART1 */
# define KL_IRQ_UART2 (30) /* Vector 30: UART2 */
# define KL_IRQ_ADC0 (31) /* Vector 31: Analog Device Converter 0 */
# define KL_IRQ_CMP0 (32) /* Vector 32: Comparator 0 */
# define KL_IRQ_TPM0 (33) /* Vector 33: Timer/PWM Module 0 */
# define KL_IRQ_TPM1 (34) /* Vector 34: Timer/PWM Module 1 */
# define KL_IRQ_TPM2 (35) /* Vector 35: Timer/PWM Module 2 */
# define KL_IRQ_RTC (36) /* Vector 36: Realtime Clock */
# define KL_IRQ_RTCSEC (37) /* Vector 37: Realtime Clock, seconds interrupt */
# define KL_IRQ_PIT (38) /* Vector 38: Programmable Interrupt Timer */
/* Vector 39: Reserved */
# define KL_IRQ_USB0 (40) /* Vector 40: USB0 */
# define KL_IRQ_DAC0 (41) /* Vector 41: Digital Analog Converter 0 */
# define KL_IRQ_TSI0 (42) /* Vector 42: TSI0 */
# define KL_IRQ_MCG (43) /* Vector 43: MCG */
# define KL_IRQ_LPTIMER (44) /* Vector 44: Low Power Timer */
/* Vector 45: Reserved */
# define KL_IRQ_PORTA (46) /* Vector 46: GPIO Port A */
# define KL_IRQ_PORTD (47) /* Vector 47: GPIO Port D */
/* Note that the total number of IRQ numbers supported is equal to the number of
* valid interrupt vectors. This is wasteful in that certain tables are sized by
* this value. There are only 94 valid interrupts so, potentially the numver of
* IRQs to could be reduced to 94. However, equating IRQ numbers with vector numbers
* also simplifies operations on NVIC registers and (at least in my state of mind
* now) seems to justify the waste.
*/
# define NR_VECTORS (64) /* 64 vectors */
# define NR_IRQS (48) /* 64 interrupts but 48 IRQ numbers */
#else
/* The interrupt vectors for other parts are defined in other documents and may or
* may not be the same as above (the family members are all very similar) This

12
arch/arm/src/kl/Kconfig
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@ -14,6 +14,10 @@ config ARCH_CHIP_MKL25Z128
bool "MKL25Z128"
select ARCH_FAMILY_KL2X
config ARCH_CHIP_MKL26Z128
bool "MKL26Z128"
select ARCH_FAMILY_KL2X
endchoice
# Chip families
@ -305,8 +309,8 @@ config KL_TPM1_PWM
config KL_TPM1_CHANNEL
int "TPM1 PWM Output Channel"
default 0
range 0 1 if ARCH_CHIP_MKL25Z128
range 0 5 if !ARCH_CHIP_MKL25Z128
range 0 1 if ARCH_CHIP_MKL25Z128 || ARCH_CHIP_MKL26Z128
range 0 5 if !ARCH_CHIP_MKL25Z128 && !ARCH_CHIP_MKL26Z128
depends on KL_TPM1_PWM
---help---
If TIM1 is enabled for PWM usage, you also need specifies the timer output
@ -327,8 +331,8 @@ config KL_TPM2_PWM
config KL_TPM2_CHANNEL
int "TPM2 PWM Output Channel"
default 0
range 0 1 if ARCH_CHIP_MKL25Z128
range 0 5 if !ARCH_CHIP_MKL25Z128
range 0 1 if ARCH_CHIP_MKL25Z128 || ARCH_CHIP_MKL26Z128
range 0 5 if !ARCH_CHIP_MKL25Z128 && !ARCH_CHIP_MKL26Z128
depends on KL_TPM2_PWM
---help---
If TIM2 is enabled for PWM usage, you also need specifies the timer output