More AVR build fixes
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@3680 42af7a65-404d-4744-a932-0658087f49c3
This commit is contained in:
patacongo
parent
b80d72379f
commit
252dabc2d8
arch/avr
include
src
@ -104,23 +104,6 @@
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****************************************************************************/
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#ifndef __ASSEMBLY__
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/* Save the current interrupt enable state & disable all interrupts */
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static inline irqstate_t irqsave(void)
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{
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/* Needs to return the current interrupt state, then disable interrupts */
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#warning "Not implemented"
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return 0
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}
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/* Restore saved interrupt state */
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static inline void irqrestore(irqstate_t flags)
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{
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/* Based on the provided interrupt flags, conditionally enable interrupts */
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#warning "Not implemented"
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}
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#endif /* __ASSEMBLY__ */
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/****************************************************************************
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@ -101,23 +101,6 @@
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****************************************************************************/
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#ifndef __ASSEMBLY__
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/* Save the current interrupt enable state & disable all interrupts */
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static inline irqstate_t irqsave(void)
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{
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/* Needs to return the current interrupt state, then disable interrupts */
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#warning "Not implemented"
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return 0
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}
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/* Restore saved interrupt state */
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static inline void irqrestore(irqstate_t flags)
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{
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/* Based on the provided interrupt flags, conditionally enable interrupts */
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#warning "Not implemented"
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}
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#endif /* __ASSEMBLY__ */
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/****************************************************************************
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@ -98,7 +98,7 @@ struct xcptcontext
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static inline irqstate_t getsreg(void)
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{
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irqstate_t sreg;
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asm volatile ("in %0, __SREG__" : =r (sreg) :: );
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asm volatile ("in %0, __SREG__" : "=r" (sreg) :: );
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return sreg;
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}
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@ -127,7 +127,7 @@ static inline irqstate_t irqsave(void)
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asm volatile
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(
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"\tin %0, __SREG__\n"
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"\tcli\n
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"\tcli\n"
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: "=&r" (sreg) ::
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);
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return sreg;
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@ -137,7 +137,7 @@ static inline irqstate_t irqsave(void)
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static inline void irqrestore(irqstate_t flags)
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{
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asm volatile ("out __SREG__, %s" : : "r" (flags) : );
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asm volatile ("out __SREG__, %0" : : "r" (flags) : );
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}
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#endif /* __ASSEMBLY__ */
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@ -33,26 +33,30 @@
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#
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############################################################################
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-include $(TOPDIR)/.config
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-include $(TOPDIR)/Make.defs
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-include chip/Make.defs
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ARCH_SRCDIR = $(TOPDIR)/arch/$(CONFIG_ARCH)/src
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ifeq ($(CONFIG_ARCH_AVR32),y)
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ARCH_SUBDIR = avr32
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endif
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ifeq ($(CONFIG_ARCH_AVR),y)
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ARCH_SUBDIR = avr
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endif
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ifeq ($(WINTOOL),y)
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NUTTX = "${shell cygpath -w $(TOPDIR)/nuttx}"
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INCLUDES = -I "${shell cygpath -w $(ARCH_SRCDIR)/chip}" \
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-I "${shell cygpath -w $(ARCH_SRCDIR)/common}" \
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-I "${shell cygpath -w $(ARCH_SRCDIR)/$(ARCH_SUBDIR)}" \
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-I "${shell cygpath -w $(TOPDIR)/sched}"
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INCLUDES += -I "${shell cygpath -w $(ARCH_SRCDIR)/chip}"
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INCLUDES += -I "${shell cygpath -w $(ARCH_SRCDIR)/common}"
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INCLUDES += -I "${shell cygpath -w $(ARCH_SRCDIR)/$(ARCH_SUBDIR)}"
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INCLUDES += -I "${shell cygpath -w $(TOPDIR)/sched}"
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else
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NUTTX = $(TOPDIR)/nuttx
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INCLUDES = -I$(ARCH_SRCDIR)/chip -I$(ARCH_SRCDIR)/common \
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-I$(ARCH_SRCDIR)/$(ARCH_SUBDIR) -I$(TOPDIR)/sched
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NUTTX = "$(TOPDIR)/nuttx"
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INCLUDES += -I "$(ARCH_SRCDIR)/chip"
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INCLUDES += -I "$(ARCH_SRCDIR)/common"
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INCLUDES += -I "$(ARCH_SRCDIR)/$(ARCH_SUBDIR)"
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INCLUDES += -I "$(TOPDIR)/sched"
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endif
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CPPFLAGS += $(INCLUDES)
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@ -39,26 +39,21 @@ HEAD_ASRC = at90usb_head.S
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# Common AVR files
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CMN_ASRCS = up_exceptions.S up_fullcontextrestore.S up_switchcontext.S
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CMN_CSRCS = up_assert.c up_allocateheap.c up_blocktask.c up_copystate.c \
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up_createstack.c up_mdelay.c up_udelay.c up_exit.c up_idle.c \
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up_initialize.c up_initialstate.c up_interruptcontext.c \
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up_modifyreg8.c up_modifyreg16.c up_modifyreg32.c \
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up_releasepending.c up_releasestack.c up_reprioritizertr.c \
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up_schedulesigaction.c up_sigdeliver.c up_unblocktask.c \
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up_usestack.c up_doirq.c
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CMN_ASRCS =
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CMN_CSRCS = up_allocateheap.c up_createstack.c up_exit.c up_idle.c \
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up_initialize.c up_interruptcontext.c up_lowputs.c up_mdelay.c \
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up_modifyreg8.c up_modifyreg16.c up_modifyreg32.c up_puts.c \
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up_releasestack.c up_udelay.c up_usestack.c
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# Required ATMEGA files
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# Required aT90USB files
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CHIP_ASRCS =
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CHIP_CSRCS = at90usb_clkinit.c at90usb_gpio.c at90usb_irq.c \
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at90usb_lowconsole.c at90usb_lowinit.c at90usb_serial.c \
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at90usb_timerisr.c
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CHIP_CSRCS =
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# Configuration-dependent ATMEGA files
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# Configuration-dependent aT90USB files
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ifeq ($(CONFIG_AVR_GPIOIRQ),y)
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CHIP_CSRCS += at90usb_gpioirq.c
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CHIP_CSRCS +=
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endif
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62
arch/avr/src/at90usb/at90usb_config.h
Normal file
62
arch/avr/src/at90usb/at90usb_config.h
Normal file
@ -0,0 +1,62 @@
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/************************************************************************************
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* arch/avr/src/at90usb/at90usb_config.h
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*
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* Copyright (C) 2011 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name NuttX nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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************************************************************************************/
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#ifndef __ARCH_AVR_SRC_ATMEGA_ATMEGA_CONFIG_H
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#define __ARCH_AVR_SRC_ATMEGA_ATMEGA_CONFIG_H
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/************************************************************************************
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* Included Files
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************************************************************************************/
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#include <nuttx/config.h>
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/************************************************************************************
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* Pre-processor Definitions
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************************************************************************************/
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/************************************************************************************
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* Public Types
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************************************************************************************/
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/************************************************************************************
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* Public Data
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************************************************************************************/
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/************************************************************************************
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* Public Functions
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************************************************************************************/
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#endif /* __ARCH_AVR_SRC_ATMEGA_ATMEGA_CONFIG_H */
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@ -52,60 +52,60 @@
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* External Symbols
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****************************************************************************/
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.file "up_nommuhead.S"
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.global _sbss /* Start of .bss. Defined by ld.script */
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.global _ebss /* End of .bss. Defined by ld.script */
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.global _sdata /* Start of .data section in RAM */
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.global _edata /* End of .data section in RAM */
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.global _eronly /* Start of .data section in FLASH */
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.global up_lowinit /* Perform low level initialization */
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.global os_start /* NuttX entry point */
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.file "up_nommuhead.S"
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.global _sbss /* Start of .bss. Defined by ld.script */
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.global _ebss /* End of .bss. Defined by ld.script */
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.global _sdata /* Start of .data section in RAM */
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.global _edata /* End of .data section in RAM */
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.global _eronly /* Start of .data section in FLASH */
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.global up_lowinit /* Perform low level initialization */
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.global os_start /* NuttX entry point */
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.global vectortab
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.global at90usb_int0 /* External interrupt request 0 */
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.global at90usb_int1 /* External interrupt request 1 */
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.global at90usb_int2 /* External interrupt request 2 */
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.global at90usb_int3 /* External interrupt request 3 */
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.global at90usb_int4 /* External interrupt request 4 */
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.global at90usb_int5 /* External interrupt request 5 */
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.global at90usb_int6 /* External interrupt request 6 */
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.global at90usb_int7 /* External interrupt request 7 */
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.global at90usb_pcint0 /* PCINT0 Pin Change Interrupt Request 0 */
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.global at90usb_usbgen /* USB General USB General Interrupt request */
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.global at90usb_usbep /* USB Endpoint/Pipe USB ENdpoint/Pipe Interrupt request */
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.global at90usb_wdt /* Watchdog Time-out Interrupt */
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.global at90usb_t2compa /* TIMER2 COMPA Timer/Counter2 Compare Match A */
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.global at90usb_t2compb /* TIMER2 COMPB Timer/Counter2 Compare Match B */
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.global at90usb_t2ovf /* TIMER2 OVF Timer/Counter2 Overflow */
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.global at90usb_t1capt /* TIMER1 CAPT Timer/Counter1 Capture Event */
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.global at90usb_t1compa /* TIMER1 COMPA Timer/Counter1 Compare Match A */
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.global at90usb_t1compb /* TIMER1 COMPB Timer/Counter1 Compare Match B */
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.global at90usb_t1compc /* TIMER1 COMPC Timer/Counter1 Compare Match c */
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.global at90usb_t1ovf /* TIMER1 OVF Timer/Counter1 Overflow */
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.global at90usb_t0compa /* TIMER0 COMPA Timer/Counter0 Compare Match A */
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.global at90usb_t0compb /* TIMER0 COMPB Timer/Counter0 Compare Match B */
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.global at90usb_t0ovf /* TIMER0 OVF Timer/Counter0 Overflow */
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.global at90usb_spi /* STC SPI Serial Transfer Complete */
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.global at90usb_u1rx /* USART1 Rx Complete */
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.global at90usb_u1dre /* USART1 Data Register Empty */
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.global at90usb_u1tx /* USART1 Tx Complete */
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.global at90usb_anacomp /* ANALOG COMP Analog Comparator */
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.global at90usb_adc /* ADC Conversion Complete */
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.global at90usb_ee /* EEPROM Ready */
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.global at90usb_t3capt /* TIMER3 CAPT Timer/Counter3 Capture Event */
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.global at90usb_t3compa /* TIMER3 COMPA Timer/Counter3 Compare Match A */
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.global at90usb_t3compb /* TIMER3 COMPB Timer/Counter3 Compare Match B */
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.global at90usb_t3compc /* TIMER3 COMPC Timer/Counter3 Compare Match C */
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.global at90usb_t3ovf /* TIMER3 OVF Timer/Counter3 Overflow */
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.global at90usb_twi /* TWI Two-wire Serial Interface */
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.global at90usb_spmrdy /* Store Program Memory Ready */
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.global vectortab
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.global at90usb_int0 /* External interrupt request 0 */
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.global at90usb_int1 /* External interrupt request 1 */
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.global at90usb_int2 /* External interrupt request 2 */
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.global at90usb_int3 /* External interrupt request 3 */
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.global at90usb_int4 /* External interrupt request 4 */
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.global at90usb_int5 /* External interrupt request 5 */
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.global at90usb_int6 /* External interrupt request 6 */
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.global at90usb_int7 /* External interrupt request 7 */
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.global at90usb_pcint0 /* PCINT0 Pin Change Interrupt Request 0 */
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.global at90usb_usbgen /* USB General USB General Interrupt request */
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.global at90usb_usbep /* USB Endpoint/Pipe USB ENdpoint/Pipe Interrupt request */
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.global at90usb_wdt /* Watchdog Time-out Interrupt */
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.global at90usb_t2compa /* TIMER2 COMPA Timer/Counter2 Compare Match A */
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.global at90usb_t2compb /* TIMER2 COMPB Timer/Counter2 Compare Match B */
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.global at90usb_t2ovf /* TIMER2 OVF Timer/Counter2 Overflow */
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.global at90usb_t1capt /* TIMER1 CAPT Timer/Counter1 Capture Event */
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.global at90usb_t1compa /* TIMER1 COMPA Timer/Counter1 Compare Match A */
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.global at90usb_t1compb /* TIMER1 COMPB Timer/Counter1 Compare Match B */
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.global at90usb_t1compc /* TIMER1 COMPC Timer/Counter1 Compare Match c */
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.global at90usb_t1ovf /* TIMER1 OVF Timer/Counter1 Overflow */
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.global at90usb_t0compa /* TIMER0 COMPA Timer/Counter0 Compare Match A */
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.global at90usb_t0compb /* TIMER0 COMPB Timer/Counter0 Compare Match B */
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.global at90usb_t0ovf /* TIMER0 OVF Timer/Counter0 Overflow */
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.global at90usb_spi /* STC SPI Serial Transfer Complete */
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.global at90usb_u1rx /* USART1 Rx Complete */
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.global at90usb_u1dre /* USART1 Data Register Empty */
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.global at90usb_u1tx /* USART1 Tx Complete */
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.global at90usb_anacomp /* ANALOG COMP Analog Comparator */
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.global at90usb_adc /* ADC Conversion Complete */
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.global at90usb_ee /* EEPROM Ready */
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.global at90usb_t3capt /* TIMER3 CAPT Timer/Counter3 Capture Event */
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.global at90usb_t3compa /* TIMER3 COMPA Timer/Counter3 Compare Match A */
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.global at90usb_t3compb /* TIMER3 COMPB Timer/Counter3 Compare Match B */
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.global at90usb_t3compc /* TIMER3 COMPC Timer/Counter3 Compare Match C */
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.global at90usb_t3ovf /* TIMER3 OVF Timer/Counter3 Overflow */
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.global at90usb_twi /* TWI Two-wire Serial Interface */
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.global at90usb_spmrdy /* Store Program Memory Ready */
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/****************************************************************************
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* Macros
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****************************************************************************/
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.macro vector name
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jmp \name
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.macro vector name
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jmp \name
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.endm
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/****************************************************************************
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@ -116,90 +116,106 @@
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* vector.
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*/
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.section .vectors, "ax", @progbits
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.func vectortab
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.section .vectors, "ax", @progbits
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.func vectortab
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vectortab:
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jmp __start /* 0: Vector 0 is the reset vector */
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vector at90usb_int0 /* 1: External interrupt request 0 */
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vector at90usb_int1 /* 2: External interrupt request 1 */
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vector at90usb_int2 /* 3: External interrupt request 2 */
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vector at90usb_int3 /* 4: External interrupt request 3 */
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vector at90usb_int4 /* 5: External interrupt request 4 */
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vector at90usb_int5 /* 6: External interrupt request 5 */
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vector at90usb_int6 /* 7: External interrupt request 6 */
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vector at90usb_int7 /* 8: External interrupt request 7 */
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vector at90usb_pcint0 /* 9: PCINT0 Pin Change Interrupt Request 0 */
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vector at90usb_usbgen /* 10: USB General USB General Interrupt request */
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vector at90usb_usbep /* 11: USB Endpoint/Pipe USB ENdpoint/Pipe Interrupt request */
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vector at90usb_wdt /* 12: Watchdog Time-out Interrupt */
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vector at90usb_t2compa /* 13: TIMER2 COMPA Timer/Counter2 Compare Match A */
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vector at90usb_t2compb /* 14: TIMER2 COMPB Timer/Counter2 Compare Match B */
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vector at90usb_t2ovf /* 15: TIMER2 OVF Timer/Counter2 Overflow */
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vector at90usb_t1capt /* 16: TIMER1 CAPT Timer/Counter1 Capture Event */
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vector at90usb_t1compa /* 17: TIMER1 COMPA Timer/Counter1 Compare Match A */
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vector at90usb_t1compb /* 18: TIMER1 COMPB Timer/Counter1 Compare Match B */
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vector at90usb_t1compc /* 19: TIMER1 COMPC Timer/Counter1 Compare Match c */
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vector at90usb_t1ovf /* 20: TIMER1 OVF Timer/Counter1 Overflow */
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vector at90usb_t0compa /* 21: TIMER0 COMPA Timer/Counter0 Compare Match A */
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vector at90usb_t0compb /* 22: TIMER0 COMPB Timer/Counter0 Compare Match B */
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vector at90usb_t0ovf /* 23: TIMER0 OVF Timer/Counter0 Overflow */
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vector at90usb_spi /* 24: STC SPI Serial Transfer Complete */
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vector at90usb_u1rx /* 25: USART1 Rx Complete */
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vector at90usb_u1dre /* 26: USART1 Data Register Empty */
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vector at90usb_u1tx /* 27: USART1 Tx Complete */
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vector at90usb_anacomp /* 28: ANALOG COMP Analog Comparator */
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vector at90usb_adc /* 29: ADC Conversion Complete */
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vector at90usb_ee /* 30: EEPROM Ready */
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vector at90usb_t3capt /* 31: TIMER3 CAPT Timer/Counter3 Capture Event */
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vector at90usb_t3compa /* 32: TIMER3 COMPA Timer/Counter3 Compare Match A */
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vector at90usb_t3compb /* 33: TIMER3 COMPB Timer/Counter3 Compare Match B */
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vector at90usb_t3compc /* 34: TIMER3 COMPC Timer/Counter3 Compare Match C */
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vector at90usb_t3ovf /* 35: TIMER3 OVF Timer/Counter3 Overflow */
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vector at90usb_twi /* 36: TWI Two-wire Serial Interface */
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vector at90usb_spmrdy /* 37: Store Program Memory Ready */
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jmp __start /* 0: Vector 0 is the reset vector */
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vector at90usb_int0 /* 1: External interrupt request 0 */
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vector at90usb_int1 /* 2: External interrupt request 1 */
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vector at90usb_int2 /* 3: External interrupt request 2 */
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vector at90usb_int3 /* 4: External interrupt request 3 */
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vector at90usb_int4 /* 5: External interrupt request 4 */
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vector at90usb_int5 /* 6: External interrupt request 5 */
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vector at90usb_int6 /* 7: External interrupt request 6 */
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vector at90usb_int7 /* 8: External interrupt request 7 */
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vector at90usb_pcint0 /* 9: PCINT0 Pin Change Interrupt Request 0 */
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vector at90usb_usbgen /* 10: USB General USB General Interrupt request */
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vector at90usb_usbep /* 11: USB Endpoint/Pipe USB ENdpoint/Pipe Interrupt request */
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vector at90usb_wdt /* 12: Watchdog Time-out Interrupt */
|
||||
vector at90usb_t2compa /* 13: TIMER2 COMPA Timer/Counter2 Compare Match A */
|
||||
vector at90usb_t2compb /* 14: TIMER2 COMPB Timer/Counter2 Compare Match B */
|
||||
vector at90usb_t2ovf /* 15: TIMER2 OVF Timer/Counter2 Overflow */
|
||||
vector at90usb_t1capt /* 16: TIMER1 CAPT Timer/Counter1 Capture Event */
|
||||
vector at90usb_t1compa /* 17: TIMER1 COMPA Timer/Counter1 Compare Match A */
|
||||
vector at90usb_t1compb /* 18: TIMER1 COMPB Timer/Counter1 Compare Match B */
|
||||
vector at90usb_t1compc /* 19: TIMER1 COMPC Timer/Counter1 Compare Match c */
|
||||
vector at90usb_t1ovf /* 20: TIMER1 OVF Timer/Counter1 Overflow */
|
||||
vector at90usb_t0compa /* 21: TIMER0 COMPA Timer/Counter0 Compare Match A */
|
||||
vector at90usb_t0compb /* 22: TIMER0 COMPB Timer/Counter0 Compare Match B */
|
||||
vector at90usb_t0ovf /* 23: TIMER0 OVF Timer/Counter0 Overflow */
|
||||
vector at90usb_spi /* 24: STC SPI Serial Transfer Complete */
|
||||
vector at90usb_u1rx /* 25: USART1 Rx Complete */
|
||||
vector at90usb_u1dre /* 26: USART1 Data Register Empty */
|
||||
vector at90usb_u1tx /* 27: USART1 Tx Complete */
|
||||
vector at90usb_anacomp /* 28: ANALOG COMP Analog Comparator */
|
||||
vector at90usb_adc /* 29: ADC Conversion Complete */
|
||||
vector at90usb_ee /* 30: EEPROM Ready */
|
||||
vector at90usb_t3capt /* 31: TIMER3 CAPT Timer/Counter3 Capture Event */
|
||||
vector at90usb_t3compa /* 32: TIMER3 COMPA Timer/Counter3 Compare Match A */
|
||||
vector at90usb_t3compb /* 33: TIMER3 COMPB Timer/Counter3 Compare Match B */
|
||||
vector at90usb_t3compc /* 34: TIMER3 COMPC Timer/Counter3 Compare Match C */
|
||||
vector at90usb_t3ovf /* 35: TIMER3 OVF Timer/Counter3 Overflow */
|
||||
vector at90usb_twi /* 36: TWI Two-wire Serial Interface */
|
||||
vector at90usb_spmrdy /* 37: Store Program Memory Ready */
|
||||
.endfunc
|
||||
|
||||
/****************************************************************************
|
||||
* Reset Entry Point
|
||||
****************************************************************************/
|
||||
|
||||
.section .init, "ax", @progbits
|
||||
.func __start
|
||||
.section .init, "ax", @progbits
|
||||
.func __start
|
||||
__start:
|
||||
|
||||
/* Initialize the IDLE thread stack */
|
||||
/* Clear the zero register, clear the status register and initialize the
|
||||
* IDLE thread stack
|
||||
*/
|
||||
|
||||
clr r1
|
||||
out _SFR_IO_ADDR(SREG), r1
|
||||
ldi r28, lo8(STACKBASE)
|
||||
ldi r29, hi8(STACKBASE)
|
||||
out _SFR_IO_ADDR(SPH), r29
|
||||
out _SFR_IO_ADDR(SPL), r28
|
||||
clr r1
|
||||
out _SFR_IO_ADDR(SREG), r1
|
||||
ldi r28, lo8(STACKBASE)
|
||||
ldi r29, hi8(STACKBASE)
|
||||
out _SFR_IO_ADDR(SPH), r29
|
||||
out _SFR_IO_ADDR(SPL), r28
|
||||
|
||||
/* Copy initial global data values from FLASH into RAM */
|
||||
|
||||
ldi r17, hi8(_edata)
|
||||
ldi r26, lo8(_sdata)
|
||||
ldi r27, hi8(_sdata)
|
||||
ldi r30, lo8(_eronly)
|
||||
ldi r31, hi8(_eronly)
|
||||
ldi r16, hh8(_eronly)
|
||||
out _SFR_IO_ADDR(RAMPZ), r16
|
||||
rjmp .Lcopystart
|
||||
ldi r17, hi8(_edata)
|
||||
ldi r26, lo8(_sdata)
|
||||
ldi r27, hi8(_sdata)
|
||||
ldi r30, lo8(_eronly)
|
||||
ldi r31, hi8(_eronly)
|
||||
ldi r16, hh8(_eronly)
|
||||
out _SFR_IO_ADDR(RAMPZ), r16
|
||||
rjmp .Lcopystart
|
||||
|
||||
.Lcopyloop:
|
||||
elpm r0, Z+
|
||||
st X+, r0
|
||||
elpm r0, Z+
|
||||
st X+, r0
|
||||
|
||||
.Lcopystart:
|
||||
cpi r26, lo8(__data_end)
|
||||
cpc r27, r17
|
||||
brne .Lcopyloop
|
||||
cpi r26, lo8(_edata)
|
||||
cpc r27, r17
|
||||
brne .Lcopyloop
|
||||
|
||||
/* Clear uninitialized data */
|
||||
|
||||
ldi r17, hi8(_ebss)
|
||||
ldi r26, lo8(_sbss)
|
||||
ldi r27, hi8(_sbss)
|
||||
rjmp .Lclearstart
|
||||
|
||||
.Lclearloop:
|
||||
st X+, r1
|
||||
.Lclearstart:
|
||||
cpi r26, lo8(_ebss)
|
||||
cpc r27, r17
|
||||
brne .Lclearloop
|
||||
|
||||
/* Now start NuttX */
|
||||
|
||||
call os_start /* Start NuttX */
|
||||
jmp exit
|
||||
call os_start /* Start NuttX */
|
||||
jmp exit
|
||||
.endfunc
|
||||
|
||||
/****************************************************************************
|
||||
|
||||
@ -39,26 +39,21 @@ HEAD_ASRC = atmega_head.S
|
||||
|
||||
# Common AVR files
|
||||
|
||||
CMN_ASRCS = up_exceptions.S up_fullcontextrestore.S up_switchcontext.S
|
||||
CMN_CSRCS = up_assert.c up_allocateheap.c up_blocktask.c up_copystate.c \
|
||||
up_createstack.c up_mdelay.c up_udelay.c up_exit.c up_idle.c \
|
||||
up_initialize.c up_initialstate.c up_interruptcontext.c \
|
||||
up_modifyreg8.c up_modifyreg16.c up_modifyreg32.c \
|
||||
up_releasepending.c up_releasestack.c up_reprioritizertr.c \
|
||||
up_schedulesigaction.c up_sigdeliver.c up_unblocktask.c \
|
||||
up_usestack.c up_doirq.c
|
||||
CMN_ASRCS =
|
||||
CMN_CSRCS = up_allocateheap.c up_createstack.c up_exit.c up_idle.c \
|
||||
up_initialize.c up_interruptcontext.c up_lowputs.c up_mdelay.c \
|
||||
up_modifyreg8.c up_modifyreg16.c up_modifyreg32.c up_puts.c \
|
||||
up_releasestack.c up_udelay.c up_usestack.c
|
||||
|
||||
# Required ATMEGA files
|
||||
|
||||
CHIP_ASRCS =
|
||||
CHIP_CSRCS = atmega_clkinit.c atmega_gpio.c atmega_irq.c \
|
||||
atmega_lowconsole.c atmega_lowinit.c atmega_serial.c \
|
||||
atmega_timerisr.c
|
||||
CHIP_CSRCS =
|
||||
|
||||
# Configuration-dependent ATMEGA files
|
||||
|
||||
ifeq ($(CONFIG_AVR_GPIOIRQ),y)
|
||||
CHIP_CSRCS += atmega_gpioirq.c
|
||||
CHIP_CSRCS +=
|
||||
endif
|
||||
|
||||
|
||||
|
||||
62
arch/avr/src/atmega/atmega_config.h
Normal file
62
arch/avr/src/atmega/atmega_config.h
Normal file
@ -0,0 +1,62 @@
|
||||
/************************************************************************************
|
||||
* arch/avr/src/atmega/atmega_config.h
|
||||
*
|
||||
* Copyright (C) 2011 Gregory Nutt. All rights reserved.
|
||||
* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in
|
||||
* the documentation and/or other materials provided with the
|
||||
* distribution.
|
||||
* 3. Neither the name NuttX nor the names of its contributors may be
|
||||
* used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
|
||||
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
|
||||
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
************************************************************************************/
|
||||
|
||||
#ifndef __ARCH_AVR_SRC_AT90USB_AT90USB_CONFIG_H
|
||||
#define __ARCH_AVR_SRC_AT90USB_AT90USB_CONFIG_H
|
||||
|
||||
/************************************************************************************
|
||||
* Included Files
|
||||
************************************************************************************/
|
||||
|
||||
#include <nuttx/config.h>
|
||||
|
||||
/************************************************************************************
|
||||
* Pre-processor Definitions
|
||||
************************************************************************************/
|
||||
|
||||
/************************************************************************************
|
||||
* Public Types
|
||||
************************************************************************************/
|
||||
|
||||
/************************************************************************************
|
||||
* Public Data
|
||||
************************************************************************************/
|
||||
|
||||
/************************************************************************************
|
||||
* Public Functions
|
||||
************************************************************************************/
|
||||
|
||||
#endif /* __ARCH_AVR_SRC_AT90USB_AT90USB_CONFIG_H */
|
||||
|
||||
@ -52,57 +52,57 @@
|
||||
* External Symbols
|
||||
****************************************************************************/
|
||||
|
||||
.file "up_nommuhead.S"
|
||||
.global _sbss /* Start of .bss. Defined by ld.script */
|
||||
.global _ebss /* End of .bss. Defined by ld.script */
|
||||
.global _sdata /* Start of .data section in RAM */
|
||||
.global _edata /* End of .data section in RAM */
|
||||
.global _eronly /* Start of .data section in FLASH */
|
||||
.global up_lowinit /* Perform low level initialization */
|
||||
.global os_start /* NuttX entry point */
|
||||
.file "up_nommuhead.S"
|
||||
.global _sbss /* Start of .bss. Defined by ld.script */
|
||||
.global _ebss /* End of .bss. Defined by ld.script */
|
||||
.global _sdata /* Start of .data section in RAM */
|
||||
.global _edata /* End of .data section in RAM */
|
||||
.global _eronly /* Start of .data section in FLASH */
|
||||
.global up_lowinit /* Perform low level initialization */
|
||||
.global os_start /* NuttX entry point */
|
||||
|
||||
.global vectortab
|
||||
.global atmega_int0 /* External interrupt request 0 */
|
||||
.global atmega_int1 /* External interrupt request 1 */
|
||||
.global atmega_int2 /* External interrupt request 2 */
|
||||
.global atmega_int3 /* External interrupt request 3 */
|
||||
.global atmega_int4 /* External interrupt request 4 */
|
||||
.global atmega_int5 /* External interrupt request 5 */
|
||||
.global atmega_int6 /* External interrupt request 6 */
|
||||
.global atmega_int7 /* External interrupt request 7 */
|
||||
.global atmega_t2comp /* TIMER2 COMP timer/counter2 compare match */
|
||||
.global atmega_t2ovf /* TIMER2 OVF timer/counter2 overflow */
|
||||
.global atmega_t1capt /* TIMER1 CAPT timer/counter1 capture event */
|
||||
.global atmega_t1compa /* TIMER1 COMPA timer/counter1 compare match a */
|
||||
.global atmega_t1compb /* TIMER1 COMPB timer/counter1 compare match b */
|
||||
.global atmega_t1ovf /* TIMER1 OVF timer/counter1 overflow */
|
||||
.global atmega_t0comp /* TIMER0 COMP timer/counter0 compare match */
|
||||
.global atmega_t0ovf /* TIMER0 OVF timer/counter0 overflow */
|
||||
.global atmega_spi /* STC SPI serial transfer complete */
|
||||
.global atmega_u0rx /* USART0 RX complete */
|
||||
.global atmega_u0dre /* USART0 data register empty */
|
||||
.global atmega_u0tx /* USART0 TX complete */
|
||||
.global atmega_adc /* ADC conversion complete */
|
||||
.global atmega_ee /* EEPROM ready */
|
||||
.global atmega_anacomp /* ANALOG COMP analog comparator */
|
||||
.global atmega_t1compc /* TIMER1 COMPC timer/countre1 compare match c */
|
||||
.global atmega_t3capt /* TIMER3 CAPT timer/counter3 capture event */
|
||||
.global atmega_t3compa /* TIMER3 COMPA timer/counter3 compare match a */
|
||||
.global atmega_t3compb /* TIMER3 COMPB timer/counter3 compare match b */
|
||||
.global atmega_t3compc /* TIMER3 COMPC timer/counter3 compare match c */
|
||||
.global atmega_t3ovf /* TIMER3 OVF timer/counter3 overflow */
|
||||
.global atmega_u1rx /* USART1 RX complete */
|
||||
.global atmega_u1dre /* USART1 data register empty */
|
||||
.global atmega_u1tx /* USART1 TX complete */
|
||||
.global atmega_twi /* TWI two-wire serial interface */
|
||||
.global atmega_spmrdy /* Store program memory ready */
|
||||
.global vectortab
|
||||
.global atmega_int0 /* External interrupt request 0 */
|
||||
.global atmega_int1 /* External interrupt request 1 */
|
||||
.global atmega_int2 /* External interrupt request 2 */
|
||||
.global atmega_int3 /* External interrupt request 3 */
|
||||
.global atmega_int4 /* External interrupt request 4 */
|
||||
.global atmega_int5 /* External interrupt request 5 */
|
||||
.global atmega_int6 /* External interrupt request 6 */
|
||||
.global atmega_int7 /* External interrupt request 7 */
|
||||
.global atmega_t2comp /* TIMER2 COMP timer/counter2 compare match */
|
||||
.global atmega_t2ovf /* TIMER2 OVF timer/counter2 overflow */
|
||||
.global atmega_t1capt /* TIMER1 CAPT timer/counter1 capture event */
|
||||
.global atmega_t1compa /* TIMER1 COMPA timer/counter1 compare match a */
|
||||
.global atmega_t1compb /* TIMER1 COMPB timer/counter1 compare match b */
|
||||
.global atmega_t1ovf /* TIMER1 OVF timer/counter1 overflow */
|
||||
.global atmega_t0comp /* TIMER0 COMP timer/counter0 compare match */
|
||||
.global atmega_t0ovf /* TIMER0 OVF timer/counter0 overflow */
|
||||
.global atmega_spi /* STC SPI serial transfer complete */
|
||||
.global atmega_u0rx /* USART0 RX complete */
|
||||
.global atmega_u0dre /* USART0 data register empty */
|
||||
.global atmega_u0tx /* USART0 TX complete */
|
||||
.global atmega_adc /* ADC conversion complete */
|
||||
.global atmega_ee /* EEPROM ready */
|
||||
.global atmega_anacomp /* ANALOG COMP analog comparator */
|
||||
.global atmega_t1compc /* TIMER1 COMPC timer/countre1 compare match c */
|
||||
.global atmega_t3capt /* TIMER3 CAPT timer/counter3 capture event */
|
||||
.global atmega_t3compa /* TIMER3 COMPA timer/counter3 compare match a */
|
||||
.global atmega_t3compb /* TIMER3 COMPB timer/counter3 compare match b */
|
||||
.global atmega_t3compc /* TIMER3 COMPC timer/counter3 compare match c */
|
||||
.global atmega_t3ovf /* TIMER3 OVF timer/counter3 overflow */
|
||||
.global atmega_u1rx /* USART1 RX complete */
|
||||
.global atmega_u1dre /* USART1 data register empty */
|
||||
.global atmega_u1tx /* USART1 TX complete */
|
||||
.global atmega_twi /* TWI two-wire serial interface */
|
||||
.global atmega_spmrdy /* Store program memory ready */
|
||||
|
||||
/****************************************************************************
|
||||
* Macros
|
||||
****************************************************************************/
|
||||
|
||||
.macro vector name
|
||||
jmp \name
|
||||
.macro vector name
|
||||
jmp \name
|
||||
.endm
|
||||
|
||||
/****************************************************************************
|
||||
@ -113,87 +113,103 @@
|
||||
* vector.
|
||||
*/
|
||||
|
||||
.section .vectors, "ax", @progbits
|
||||
.func vectortab
|
||||
.section .vectors, "ax", @progbits
|
||||
.func vectortab
|
||||
vectortab:
|
||||
jmp __start /* 0: Vector 0 is the reset vector */
|
||||
vector atmega_int0 /* 1: External interrupt request 0 */
|
||||
vector atmega_int1 /* 2: External interrupt request 1 */
|
||||
vector atmega_int2 /* 3: External interrupt request 2 */
|
||||
vector atmega_int3 /* 4: External interrupt request 3 */
|
||||
vector atmega_int4 /* 5: External interrupt request 4 */
|
||||
vector atmega_int5 /* 6 : External interrupt request 5 */
|
||||
vector atmega_int6 /* 7: External interrupt request 6 */
|
||||
vector atmega_int7 /* 8: External interrupt request 7 */
|
||||
vector atmega_t2comp /* 9: TIMER2 COMP timer/counter2 compare match */
|
||||
vector atmega_t2ovf /* 10: TIMER2 OVF timer/counter2 overflow */
|
||||
vector atmega_t1capt /* 11: TIMER1 CAPT timer/counter1 capture event */
|
||||
vector atmega_t1compa /* 12: TIMER1 COMPA timer/counter1 compare match a */
|
||||
vector atmega_t1compb /* 13: TIMER1 COMPB timer/counter1 compare match b */
|
||||
vector atmega_t1ovf /* 14: TIMER1 OVF timer/counter1 overflow */
|
||||
vector atmega_t0comp /* 15: TIMER0 COMP timer/counter0 compare match */
|
||||
vector atmega_t0ovf /* 16: TIMER0 OVF timer/counter0 overflow */
|
||||
vector atmega_spi /* 17: STC SPI serial transfer complete */
|
||||
vector atmega_u0rx /* 18: USART0 RX complete */
|
||||
vector atmega_u0dre /* 19: USART0 data register empty */
|
||||
vector atmega_u0tx /* 20: USART0 TX complete */
|
||||
vector atmega_adc /* 21: ADC conversion complete */
|
||||
vector atmega_ee /* 22: EEPROM ready */
|
||||
vector atmega_anacomp /* 23: ANALOG COMP analog comparator */
|
||||
vector atmega_t1compc /* 24: TIMER1 COMPC timer/countre1 compare match c */
|
||||
vector atmega_t3capt /* 25: TIMER3 CAPT timer/counter3 capture event */
|
||||
vector atmega_t3compa /* 26: TIMER3 COMPA timer/counter3 compare match a */
|
||||
vector atmega_t3compb /* 27: TIMER3 COMPB timer/counter3 compare match b */
|
||||
vector atmega_t3compc /* 28: TIMER3 COMPC timer/counter3 compare match c */
|
||||
vector atmega_t3ovf /* 29: TIMER3 OVF timer/counter3 overflow */
|
||||
vector atmega_u1rx /* 30: USART1 RX complete */
|
||||
vector atmega_u1dre /* 31: USART1 data register empty */
|
||||
vector atmega_u1tx /* 32: USART1 TX complete */
|
||||
vector atmega_twi /* 33: TWI two-wire serial interface */
|
||||
vector atmega_spmrdy /* 34: Store program memory ready */
|
||||
jmp __start /* 0: Vector 0 is the reset vector */
|
||||
vector atmega_int0 /* 1: External interrupt request 0 */
|
||||
vector atmega_int1 /* 2: External interrupt request 1 */
|
||||
vector atmega_int2 /* 3: External interrupt request 2 */
|
||||
vector atmega_int3 /* 4: External interrupt request 3 */
|
||||
vector atmega_int4 /* 5: External interrupt request 4 */
|
||||
vector atmega_int5 /* 6 : External interrupt request 5 */
|
||||
vector atmega_int6 /* 7: External interrupt request 6 */
|
||||
vector atmega_int7 /* 8: External interrupt request 7 */
|
||||
vector atmega_t2comp /* 9: TIMER2 COMP timer/counter2 compare match */
|
||||
vector atmega_t2ovf /* 10: TIMER2 OVF timer/counter2 overflow */
|
||||
vector atmega_t1capt /* 11: TIMER1 CAPT timer/counter1 capture event */
|
||||
vector atmega_t1compa /* 12: TIMER1 COMPA timer/counter1 compare match a */
|
||||
vector atmega_t1compb /* 13: TIMER1 COMPB timer/counter1 compare match b */
|
||||
vector atmega_t1ovf /* 14: TIMER1 OVF timer/counter1 overflow */
|
||||
vector atmega_t0comp /* 15: TIMER0 COMP timer/counter0 compare match */
|
||||
vector atmega_t0ovf /* 16: TIMER0 OVF timer/counter0 overflow */
|
||||
vector atmega_spi /* 17: STC SPI serial transfer complete */
|
||||
vector atmega_u0rx /* 18: USART0 RX complete */
|
||||
vector atmega_u0dre /* 19: USART0 data register empty */
|
||||
vector atmega_u0tx /* 20: USART0 TX complete */
|
||||
vector atmega_adc /* 21: ADC conversion complete */
|
||||
vector atmega_ee /* 22: EEPROM ready */
|
||||
vector atmega_anacomp /* 23: ANALOG COMP analog comparator */
|
||||
vector atmega_t1compc /* 24: TIMER1 COMPC timer/countre1 compare match c */
|
||||
vector atmega_t3capt /* 25: TIMER3 CAPT timer/counter3 capture event */
|
||||
vector atmega_t3compa /* 26: TIMER3 COMPA timer/counter3 compare match a */
|
||||
vector atmega_t3compb /* 27: TIMER3 COMPB timer/counter3 compare match b */
|
||||
vector atmega_t3compc /* 28: TIMER3 COMPC timer/counter3 compare match c */
|
||||
vector atmega_t3ovf /* 29: TIMER3 OVF timer/counter3 overflow */
|
||||
vector atmega_u1rx /* 30: USART1 RX complete */
|
||||
vector atmega_u1dre /* 31: USART1 data register empty */
|
||||
vector atmega_u1tx /* 32: USART1 TX complete */
|
||||
vector atmega_twi /* 33: TWI two-wire serial interface */
|
||||
vector atmega_spmrdy /* 34: Store program memory ready */
|
||||
.endfunc
|
||||
|
||||
/****************************************************************************
|
||||
* Reset Entry Point
|
||||
****************************************************************************/
|
||||
|
||||
.section .init, "ax", @progbits
|
||||
.func __start
|
||||
.section .init, "ax", @progbits
|
||||
.func __start
|
||||
__start:
|
||||
|
||||
/* Initialize the IDLE thread stack */
|
||||
/* Clear the zero register, clear the status register and initialize the
|
||||
* IDLE thread stack
|
||||
*/
|
||||
|
||||
clr r1
|
||||
out _SFR_IO_ADDR(SREG), r1
|
||||
ldi r28, lo8(STACKBASE)
|
||||
ldi r29, hi8(STACKBASE)
|
||||
out _SFR_IO_ADDR(SPH), r29
|
||||
out _SFR_IO_ADDR(SPL), r28
|
||||
clr r1
|
||||
out _SFR_IO_ADDR(SREG), r1
|
||||
ldi r28, lo8(STACKBASE)
|
||||
ldi r29, hi8(STACKBASE)
|
||||
out _SFR_IO_ADDR(SPH), r29
|
||||
out _SFR_IO_ADDR(SPL), r28
|
||||
|
||||
/* Copy initial global data values from FLASH into RAM */
|
||||
|
||||
ldi r17, hi8(_edata)
|
||||
ldi r26, lo8(_sdata)
|
||||
ldi r27, hi8(_sdata)
|
||||
ldi r30, lo8(_eronly)
|
||||
ldi r31, hi8(_eronly)
|
||||
ldi r16, hh8(_eronly)
|
||||
out _SFR_IO_ADDR(RAMPZ), r16
|
||||
rjmp .Lcopystart
|
||||
ldi r17, hi8(_edata)
|
||||
ldi r26, lo8(_sdata)
|
||||
ldi r27, hi8(_sdata)
|
||||
ldi r30, lo8(_eronly)
|
||||
ldi r31, hi8(_eronly)
|
||||
ldi r16, hh8(_eronly)
|
||||
out _SFR_IO_ADDR(RAMPZ), r16
|
||||
rjmp .Lcopystart
|
||||
|
||||
.Lcopyloop:
|
||||
elpm r0, Z+
|
||||
st X+, r0
|
||||
elpm r0, Z+
|
||||
st X+, r0
|
||||
|
||||
.Lcopystart:
|
||||
cpi r26, lo8(__data_end)
|
||||
cpc r27, r17
|
||||
brne .Lcopyloop
|
||||
cpi r26, lo8(_edata)
|
||||
cpc r27, r17
|
||||
brne .Lcopyloop
|
||||
|
||||
/* Clear uninitialized data */
|
||||
|
||||
ldi r17, hi8(_ebss)
|
||||
ldi r26, lo8(_sbss)
|
||||
ldi r27, hi8(_sbss)
|
||||
rjmp .Lclearstart
|
||||
|
||||
.Lclearloop:
|
||||
st X+, r1
|
||||
.Lclearstart:
|
||||
cpi r26, lo8(_ebss)
|
||||
cpc r27, r17
|
||||
brne .Lclearloop
|
||||
|
||||
/* Now start NuttX */
|
||||
|
||||
call os_start /* Start NuttX */
|
||||
jmp exit
|
||||
call os_start /* Start NuttX */
|
||||
jmp exit
|
||||
.endfunc
|
||||
|
||||
/****************************************************************************
|
||||
|
||||
101
arch/avr/src/avr/avr_internal.h
Normal file
101
arch/avr/src/avr/avr_internal.h
Normal file
@ -0,0 +1,101 @@
|
||||
/****************************************************************************
|
||||
* arch/avr/src/avr/avr_internal.h
|
||||
*
|
||||
* Copyright (C) 2011 Gregory Nutt. All rights reserved.
|
||||
* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in
|
||||
* the documentation and/or other materials provided with the
|
||||
* distribution.
|
||||
* 3. Neither the name NuttX nor the names of its contributors may be
|
||||
* used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
|
||||
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
|
||||
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
#ifndef __ARCH_AVR_SRC_AVR_AVR_INTERNAL_H
|
||||
#define __ARCH_AVR_SRC_AVR_AVR_INTERNAL_H
|
||||
|
||||
/****************************************************************************
|
||||
* Included Files
|
||||
****************************************************************************/
|
||||
|
||||
#ifndef __ASSEMBLY__
|
||||
# include <stdint.h>
|
||||
#endif
|
||||
|
||||
/****************************************************************************
|
||||
* Pre-processor Definitions
|
||||
****************************************************************************/
|
||||
|
||||
/* Macros to handle saving and restore interrupt state. The state is copied
|
||||
* from the stack to the TCB, but only a referenced is passed to get the
|
||||
* state from the TCB.
|
||||
*/
|
||||
|
||||
#define up_savestate(regs) up_copystate(regs, (uint8_t*)current_regs)
|
||||
#define up_restorestate(regs) (current_regs = regs)
|
||||
|
||||
/****************************************************************************
|
||||
* Public Types
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Public Variables
|
||||
****************************************************************************/
|
||||
|
||||
#ifndef __ASSEMBLY__
|
||||
/* This holds a references to the current interrupt level register storage
|
||||
* structure. If is non-NULL only during interrupt processing.
|
||||
*/
|
||||
|
||||
extern volatile uint8_t *current_regs;
|
||||
|
||||
/* This is the beginning of heap as provided from up_head.S. This is the first
|
||||
* address in DRAM after the loaded program+bss+idle stack. The end of the
|
||||
* heap is CONFIG_DRAM_END
|
||||
*/
|
||||
|
||||
extern uint8_t g_heapbase;
|
||||
|
||||
#endif /* __ASSEMBLY__ */
|
||||
|
||||
/****************************************************************************
|
||||
* Inline Functions
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Public Functions
|
||||
****************************************************************************/
|
||||
|
||||
#ifndef __ASSEMBLY__
|
||||
|
||||
extern void up_copystate(uint8_t *dest, uint8_t *src);
|
||||
extern int up_saveusercontext(uint8_t *saveregs);
|
||||
extern void up_fullcontextrestore(uint8_t *restoreregs) __attribute__ ((noreturn));
|
||||
extern void up_switchcontext(uint8_t *saveregs, uint8_t *restoreregs);
|
||||
extern uint8_t *up_doirq(int irq, uint8_t *regs);
|
||||
|
||||
#endif /* __ASSEMBLY__ */
|
||||
#endif /* __ARCH_AVR_SRC_AVR_AVR_INTERNAL_H */
|
||||
|
||||
101
arch/avr/src/avr32/avr32_internal.h
Normal file
101
arch/avr/src/avr32/avr32_internal.h
Normal file
@ -0,0 +1,101 @@
|
||||
/****************************************************************************
|
||||
* arch/avr/src/avr32/up_internal.h
|
||||
*
|
||||
* Copyright (C) 2011 Gregory Nutt. All rights reserved.
|
||||
* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in
|
||||
* the documentation and/or other materials provided with the
|
||||
* distribution.
|
||||
* 3. Neither the name NuttX nor the names of its contributors may be
|
||||
* used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
|
||||
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
|
||||
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
#ifndef __ARCH_AVR_SRC_AVR32_AVR32_INTERNAL_H
|
||||
#define __ARCH_AVR_SRC_AVR32_AVR32_INTERNAL_H
|
||||
|
||||
/****************************************************************************
|
||||
* Included Files
|
||||
****************************************************************************/
|
||||
|
||||
#ifndef __ASSEMBLY__
|
||||
# include <stdint.h>
|
||||
#endif
|
||||
|
||||
/****************************************************************************
|
||||
* Pre-processor Definitions
|
||||
****************************************************************************/
|
||||
|
||||
/* Macros to handle saving and restore interrupt state. The state is copied
|
||||
* from the stack to the TCB, but only a referenced is passed to get the
|
||||
* state from the TCB.
|
||||
*/
|
||||
|
||||
#define up_savestate(regs) up_copystate(regs, (uint32_t*)current_regs)
|
||||
#define up_restorestate(regs) (current_regs = regs)
|
||||
|
||||
/****************************************************************************
|
||||
* Public Types
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Public Variables
|
||||
****************************************************************************/
|
||||
|
||||
#ifndef __ASSEMBLY__
|
||||
/* This holds a references to the current interrupt level register storage
|
||||
* structure. If is non-NULL only during interrupt processing.
|
||||
*/
|
||||
|
||||
extern volatile uint32_ *current_regs;
|
||||
|
||||
/* This is the beginning of heap as provided from up_head.S. This is the first
|
||||
* address in DRAM after the loaded program+bss+idle stack. The end of the
|
||||
* heap is CONFIG_DRAM_END
|
||||
*/
|
||||
|
||||
extern uint32_t g_heapbase;
|
||||
|
||||
#endif /* __ASSEMBLY__ */
|
||||
|
||||
/****************************************************************************
|
||||
* Inline Functions
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Public Functions
|
||||
****************************************************************************/
|
||||
|
||||
#ifndef __ASSEMBLY__
|
||||
|
||||
extern void up_copystate(uint32_t *dest, uint32_t *src);
|
||||
extern int up_saveusercontext(uint32_t *saveregs);
|
||||
extern void up_fullcontextrestore(uint32_t *restoreregs) __attribute__ ((noreturn));
|
||||
extern void up_switchcontext(uint32_t *saveregs, uint32_t *restoreregs);
|
||||
extern uint32_t *up_doirq(int irq, uint32_t *regs);
|
||||
|
||||
#endif /* __ASSEMBLY__ */
|
||||
#endif /* __ARCH_AVR_SRC_AVR32_AVR32_INTERNAL_H */
|
||||
|
||||
@ -40,10 +40,18 @@
|
||||
* Included Files
|
||||
****************************************************************************/
|
||||
|
||||
#include <nuttx/config.h>
|
||||
|
||||
#ifndef __ASSEMBLY__
|
||||
# include <stdint.h>
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_ARCH_AVR32
|
||||
# include "avr32_internal.h"
|
||||
#else
|
||||
# include "avr_internal.h"
|
||||
#endif
|
||||
|
||||
/****************************************************************************
|
||||
* Pre-processor Definitions
|
||||
****************************************************************************/
|
||||
@ -65,14 +73,6 @@
|
||||
# define CONFIG_ARCH_INTERRUPTSTACK 0
|
||||
#endif
|
||||
|
||||
/* Macros to handle saving and restore interrupt state. The state is copied
|
||||
* from the stack to the TCB, but only a referenced is passed to get the
|
||||
* state from the TCB.
|
||||
*/
|
||||
|
||||
#define up_savestate(regs) up_copystate(regs, (uint32_t*)current_regs)
|
||||
#define up_restorestate(regs) (current_regs = regs)
|
||||
|
||||
/****************************************************************************
|
||||
* Public Types
|
||||
****************************************************************************/
|
||||
@ -86,21 +86,6 @@ typedef void (*up_vector_t)(void);
|
||||
****************************************************************************/
|
||||
|
||||
#ifndef __ASSEMBLY__
|
||||
/* This holds a references to the current interrupt level
|
||||
* register storage structure. If is non-NULL only during
|
||||
* interrupt processing.
|
||||
*/
|
||||
|
||||
extern volatile uint32_t *current_regs;
|
||||
|
||||
/* This is the beginning of heap as provided from up_head.S.
|
||||
* This is the first address in DRAM after the loaded
|
||||
* program+bss+idle stack. The end of the heap is
|
||||
* CONFIG_DRAM_END
|
||||
*/
|
||||
|
||||
extern uint32_t g_heapbase;
|
||||
|
||||
/* Address of the saved user stack pointer */
|
||||
|
||||
#if CONFIG_ARCH_INTERRUPTSTACK > 3
|
||||
@ -126,7 +111,8 @@ extern uint32_t _sdata; /* Start of .data */
|
||||
extern uint32_t _edata; /* End+1 of .data */
|
||||
extern uint32_t _sbss; /* Start of .bss */
|
||||
extern uint32_t _ebss; /* End+1 of .bss */
|
||||
#endif
|
||||
|
||||
#endif /* __ASSEMBLY__ */
|
||||
|
||||
/****************************************************************************
|
||||
* Inline Functions
|
||||
@ -141,20 +127,15 @@ extern uint32_t _ebss; /* End+1 of .bss */
|
||||
/* Defined in files with the same name as the function */
|
||||
|
||||
extern void up_boot(void);
|
||||
extern void up_copystate(uint32_t *dest, uint32_t *src);
|
||||
extern void up_irqinitialize(void);
|
||||
#ifdef CONFIG_ARCH_DMA
|
||||
extern void weak_function up_dmainitialize(void);
|
||||
#endif
|
||||
extern int up_saveusercontext(uint32_t *saveregs);
|
||||
extern void up_fullcontextrestore(uint32_t *restoreregs) __attribute__ ((noreturn));
|
||||
extern void up_switchcontext(uint32_t *saveregs, uint32_t *restoreregs);
|
||||
extern void up_sigdeliver(void);
|
||||
extern int up_timerisr(int irq, uint32_t *regs);
|
||||
extern void up_lowputc(char ch);
|
||||
extern void up_puts(const char *str);
|
||||
extern void up_lowputs(const char *str);
|
||||
extern uint32_t *up_doirq(int irq, uint32_t *regs);
|
||||
|
||||
/* Defined in common/up_allocateheap.c or chip/xxx_allocateheap.c */
|
||||
|
||||
|
||||
Loading…
x
Reference in New Issue
Block a user