Change order of includes in apps/Makefile; add clock frequencies to shenzhou, fire, and olimex-stm32 board.h files

git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@5210 42af7a65-404d-4744-a932-0658087f49c3
This commit is contained in:
patacongo 2012-10-04 15:07:06 +00:00
parent e7c5d7b10e
commit 259fe7d5db
3 changed files with 30 additions and 3 deletions

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@ -55,10 +55,19 @@
/* Clocking *************************************************************************/
/* On-board crystal frequency is 8MHz (HSE) */
/* HSI - 8 MHz RC factory-trimmed
* LSI - 40 KHz RC (30-60KHz, uncalibrated)
* HSE - On-board crystal frequency is 8MHz
* LSE - 32.768 kHz crytal
*/
#define STM32_BOARD_XTAL 8000000ul
#define STM32_HSI_FREQUENCY 8000000ul
#define STM32_LSI_FREQUENCY 40000
#define STM32_HSE_FREQUENCY STM32_BOARD_XTAL
#define STM32_LSE_FREQUENCY 32768
/* PLL source is HSE/1, PLL multipler is 9: PLL frequency is 8MHz (XTAL) x 9 = 72MHz */
#define STM32_CFGR_PLLSRC RCC_CFGR_PLLSRC

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@ -55,10 +55,19 @@
/* Clocking *************************************************************************/
/* On-board crystal frequency is 25MHz (HSE) */
/* HSI - 8 MHz RC factory-trimmed
* LSI - 40 KHz RC (30-60KHz, uncalibrated)
* HSE - On-board crystal frequency is 25MHz
* LSE - 32.768 kHz
*/
#define STM32_BOARD_XTAL 25000000ul
#define STM32_HSI_FREQUENCY 8000000ul
#define STM32_LSI_FREQUENCY 40000
#define STM32_HSE_FREQUENCY STM32_BOARD_XTAL
#define STM32_LSE_FREQUENCY 32768
/* PLL ouput is 72MHz */
#define STM32_PLL_PREDIV2 RCC_CFGR2_PREDIV2d5 /* 25MHz / 5 => 5MHz */

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@ -55,10 +55,19 @@
/* Clocking *************************************************************************/
/* On-board crystal frequency is 25MHz (HSE) */
/* HSI - 8 MHz RC factory-trimmed
* LSI - 40 KHz RC (30-60KHz, uncalibrated)
* HSE - On-board crystal frequency is 25MHz
* LSE - 32.768 kHz
*/
#define STM32_BOARD_XTAL 25000000ul
#define STM32_HSI_FREQUENCY 8000000ul
#define STM32_LSI_FREQUENCY 40000
#define STM32_HSE_FREQUENCY STM32_BOARD_XTAL
#define STM32_LSE_FREQUENCY 32768
/* PLL ouput is 72MHz */
#define STM32_PLL_PREDIV2 RCC_CFGR2_PREDIV2d5 /* 25MHz / 5 => 5MHz */