From 259fe7d5db98f465dff0fd27974687e846379585 Mon Sep 17 00:00:00 2001 From: patacongo Date: Thu, 4 Oct 2012 15:07:06 +0000 Subject: [PATCH] Change order of includes in apps/Makefile; add clock frequencies to shenzhou, fire, and olimex-stm32 board.h files git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@5210 42af7a65-404d-4744-a932-0658087f49c3 --- configs/fire-stm32v2/include/board.h | 11 ++++++++++- configs/olimex-stm32-p107/include/board.h | 11 ++++++++++- configs/shenzhou/include/board.h | 11 ++++++++++- 3 files changed, 30 insertions(+), 3 deletions(-) diff --git a/configs/fire-stm32v2/include/board.h b/configs/fire-stm32v2/include/board.h index 9a5d309ab6..acd70933a2 100644 --- a/configs/fire-stm32v2/include/board.h +++ b/configs/fire-stm32v2/include/board.h @@ -55,10 +55,19 @@ /* Clocking *************************************************************************/ -/* On-board crystal frequency is 8MHz (HSE) */ +/* HSI - 8 MHz RC factory-trimmed + * LSI - 40 KHz RC (30-60KHz, uncalibrated) + * HSE - On-board crystal frequency is 8MHz + * LSE - 32.768 kHz crytal + */ #define STM32_BOARD_XTAL 8000000ul +#define STM32_HSI_FREQUENCY 8000000ul +#define STM32_LSI_FREQUENCY 40000 +#define STM32_HSE_FREQUENCY STM32_BOARD_XTAL +#define STM32_LSE_FREQUENCY 32768 + /* PLL source is HSE/1, PLL multipler is 9: PLL frequency is 8MHz (XTAL) x 9 = 72MHz */ #define STM32_CFGR_PLLSRC RCC_CFGR_PLLSRC diff --git a/configs/olimex-stm32-p107/include/board.h b/configs/olimex-stm32-p107/include/board.h index ce0c82472f..96051e25c2 100644 --- a/configs/olimex-stm32-p107/include/board.h +++ b/configs/olimex-stm32-p107/include/board.h @@ -55,10 +55,19 @@ /* Clocking *************************************************************************/ -/* On-board crystal frequency is 25MHz (HSE) */ +/* HSI - 8 MHz RC factory-trimmed + * LSI - 40 KHz RC (30-60KHz, uncalibrated) + * HSE - On-board crystal frequency is 25MHz + * LSE - 32.768 kHz + */ #define STM32_BOARD_XTAL 25000000ul +#define STM32_HSI_FREQUENCY 8000000ul +#define STM32_LSI_FREQUENCY 40000 +#define STM32_HSE_FREQUENCY STM32_BOARD_XTAL +#define STM32_LSE_FREQUENCY 32768 + /* PLL ouput is 72MHz */ #define STM32_PLL_PREDIV2 RCC_CFGR2_PREDIV2d5 /* 25MHz / 5 => 5MHz */ diff --git a/configs/shenzhou/include/board.h b/configs/shenzhou/include/board.h index c105d4ab5e..2897ac2198 100644 --- a/configs/shenzhou/include/board.h +++ b/configs/shenzhou/include/board.h @@ -55,10 +55,19 @@ /* Clocking *************************************************************************/ -/* On-board crystal frequency is 25MHz (HSE) */ +/* HSI - 8 MHz RC factory-trimmed + * LSI - 40 KHz RC (30-60KHz, uncalibrated) + * HSE - On-board crystal frequency is 25MHz + * LSE - 32.768 kHz + */ #define STM32_BOARD_XTAL 25000000ul +#define STM32_HSI_FREQUENCY 8000000ul +#define STM32_LSI_FREQUENCY 40000 +#define STM32_HSE_FREQUENCY STM32_BOARD_XTAL +#define STM32_LSE_FREQUENCY 32768 + /* PLL ouput is 72MHz */ #define STM32_PLL_PREDIV2 RCC_CFGR2_PREDIV2d5 /* 25MHz / 5 => 5MHz */