Reviewed by David Sidrane.
boards/arm/stm32h7/stm32h747i-disco: Remove references to nucleo in the stm32h747i-disco board. arch/arm/include/stm32h7, arch/arm/src/stm32h7, and boards/arm/stm32h7/stm32h747i-disco: Add support for the STM32H747I-DISCO board.
This commit is contained in:
Lwazi Dube
Gregory Nutt
parent
fb31d38394
commit
25aa695a35
@ -63,6 +63,7 @@
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*/
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#if defined(CONFIG_ARCH_CHIP_STM32H743ZI)
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#elif defined(CONFIG_ARCH_CHIP_STM32H747XI)
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#else
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# error STM32 H7 chip not identified
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#endif
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@ -91,6 +92,43 @@
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/* Peripherals */
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# define STM32H7_NGPIO (11) /* GPIOA-GPIOK */
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# define STM32H7_NDMA (4) /* (4) DMA1, DMA2, BDMA and MDMA */
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# define STM32H7_NADC (3) /* (3) ADC1-3*/
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# define STM32H7_NDAC (2) /* (2) DAC1-2*/
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# define STM32H7_NCMP (2) /* (2) ultra-low power comparators */
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# define STM32H7_NPGA (2) /* (2) Operational amplifiers: OPAMP */
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# define STM32H7_NDFSDM (1) /* (1) digital filters for sigma delta modulator */
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# define STM32H7_NUSART (4) /* (4) USART1-3, 6 */
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# define STM32H7_NSPI (6) /* (6) SPI1-6 */
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# define STM32H7_NI2S (3) /* (3) I2S1-3 */
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# define STM32H7_NUART (4) /* (4) UART4-5, 7-8 */
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# define STM32H7_NI2C (4) /* (4) I2C1-4 */
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# define STM32H7_NSAI (4) /* (4) SAI1-4*/
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# define STM32H7_NCAN (2) /* (2) CAN1-2 */
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# define STM32H7_NSDIO (2) /* (2) SDIO */
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#elif defined(CONFIG_STM32H7_STM32H7X7XX)
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/* Memory */
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# define STM32H7_SRAM_SIZE (512*1024) /* 512Kb SRAM on AXI bus Matrix (D1) */
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# define STM32H7_SRAM1_SIZE (128*1024) /* 128Kb SRAM1 on AHB bus Matrix (D2) */
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# define STM32H7_SRAM2_SIZE (128*1024) /* 128Kb SRAM2 on AHB bus Matrix (D2) */
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# define STM32H7_SRAM3_SIZE (32*1024) /* 32Kb SRAM3 on AHB bus Matrix (D2) */
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# define STM32H7_SRAM123_SIZE (288*1024) /* 128Kb SRAM123 on AHB bus Matrix (D2) */
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# define STM32H7_SRAM4_SIZE (64*1024) /* 64Kb SRAM2 on AHB bus Matrix (D3) */
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# if defined(CONFIG_ARMV7M_HAVE_DTCM)
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# define STM32H7_DTCM_SRAM_SIZE (128*1024) /* 128Kb DTCM SRAM on TCM interface */
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# else
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# define STM32H7_DTCM_SRAM_SIZE (0) /* No DTCM SRAM on TCM interface */
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# endif
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# if defined(CONFIG_ARMV7M_HAVE_ITCM)
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# define STM32H7_ITCM_SRAM_SIZE (64*1024) /* 64b ITCM SRAM on TCM interface */
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# else
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# define STM32H7_ITCM_SRAM_SIZE (0) /* No ITCM SRAM on TCM interface */
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# endif
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/* Peripherals */
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# define STM32H7_NGPIO (11) /* GPIOA-GPIOK */
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# define STM32H7_NDMA (4) /* (4) DMA1, DMA2, BDMA and MDMA */
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# define STM32H7_NADC (3) /* (3) ADC1-3*/
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@ -134,7 +172,7 @@
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# define STM32F7_NFMC 0 /* No FMC memory controller */
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#endif
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/* NVIC priority levels **********************************************************o***/
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/* NVIC priority levels **************************************************************/
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/* 16 Programmable interrupt levels */
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#define NVIC_SYSH_PRIORITY_MIN 0xf0 /* All bits set in minimum priority */
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@ -78,6 +78,8 @@
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#if defined(CONFIG_STM32H7_STM32H7X3XX)
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# include <arch/stm32h7/stm32h7x3xx_irq.h>
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#elif defined(CONFIG_STM32H7_STM32H7X7XX)
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# include <arch/stm32h7/stm32h7x7xx_irq.h>
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#else
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# error "Unsupported STM32 H7 chip"
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#endif
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247
arch/arm/include/stm32h7/stm32h7x7xx_irq.h
Normal file
247
arch/arm/include/stm32h7/stm32h7x7xx_irq.h
Normal file
@ -0,0 +1,247 @@
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/****************************************************************************************************
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* arch/arm/include/stm32h7/stm32h7x7xx_irq.h.h
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*
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* Copyright (C) 2018 Gregory Nutt. All rights reserved.
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* Authors: Gregory Nutt <gnutt@nuttx.org>
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* David Sidrane <david_s5@nscdg.com>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name NuttX nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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****************************************************************************************************/
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/* This file should never be included directed but, rather, only indirectly through arch/irq.h */
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#ifndef __ARCH_ARM_INCLUDE_STM32H7_STM32H7X7XX_IRQ_H
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/****************************************************************************************************
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* Included Files
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****************************************************************************************************/
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#include <nuttx/config.h>
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/****************************************************************************************************
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* Pre-processor Definitions
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****************************************************************************************************/
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/* IRQ numbers. The IRQ number corresponds vector number and hence map directly to bits in the
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* NVIC. This does, however, waste several words of memory in the IRQ to handle mapping tables.
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*
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* Processor Exceptions (vectors 0-15). These common definitions can be found in the file
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* nuttx/arch/arm/include/stm32h7/irq.h which includes this file
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*
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* External interrupts (vectors >= 16)
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*/
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#define STM32_IRQ_WWDG1 (STM32_IRQ_FIRST + 0) /* 0: Window Watchdog interrupt */
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#define STM32_IRQ_PVDPVM (STM32_IRQ_FIRST + 1) /* 1: PVD through EXTI line detection interrupt */
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#define STM32_IRQ_RTC (STM32_IRQ_FIRST + 2) /* 2: RTC tamper, timestamp */
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#define STM32_IRQ_CSSLSE (STM32_IRQ_FIRST + 2) /* 2: CSS LSE */
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#define STM32_IRQ_RTCWKUP (STM32_IRQ_FIRST + 3) /* 3: RTC Wakeup interrupt through the EXTI line */
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#define STM32_IRQ_FLASH (STM32_IRQ_FIRST + 4) /* 4: Flash memory global interrupt */
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#define STM32_IRQ_RCC (STM32_IRQ_FIRST + 5) /* 5: RCC global interrupt */
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#define STM32_IRQ_EXTI0 (STM32_IRQ_FIRST + 6) /* 6: EXTI Line 0 interrupt */
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#define STM32_IRQ_EXTI1 (STM32_IRQ_FIRST + 7) /* 7: EXTI Line 1 interrupt */
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#define STM32_IRQ_EXTI2 (STM32_IRQ_FIRST + 8) /* 8: EXTI Line 2 interrupt */
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#define STM32_IRQ_EXTI3 (STM32_IRQ_FIRST + 9) /* 9: EXTI Line 3 interrupt */
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#define STM32_IRQ_EXTI4 (STM32_IRQ_FIRST + 10) /* 10: EXTI Line 4 interrupt */
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#define STM32_IRQ_DMA1S0 (STM32_IRQ_FIRST + 11) /* 11: DMA1 Stream0 global interrupt */
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#define STM32_IRQ_DMA1S1 (STM32_IRQ_FIRST + 12) /* 12: DMA1 Stream1 global interrupt */
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#define STM32_IRQ_DMA1S2 (STM32_IRQ_FIRST + 13) /* 13: DMA1 Stream2 global interrupt */
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#define STM32_IRQ_DMA1S3 (STM32_IRQ_FIRST + 14) /* 14: DMA1 Stream3 global interrupt */
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#define STM32_IRQ_DMA1S4 (STM32_IRQ_FIRST + 15) /* 15: DMA1 Stream4 global interrupt */
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#define STM32_IRQ_DMA1S5 (STM32_IRQ_FIRST + 16) /* 16: DMA1 Stream5 global interrupt */
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#define STM32_IRQ_DMA1S6 (STM32_IRQ_FIRST + 17) /* 17: DMA1 Stream6 global interrupt */
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#define STM32_IRQ_ADC12 (STM32_IRQ_FIRST + 18) /* 18: ADC1 and ADC2 global interrupt */
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#define STM32_IRQ_FDCAN1_0 (STM32_IRQ_FIRST + 19) /* 19: FDCAN1 Interrupt 0 */
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#define STM32_IRQ_FDCAN2_0 (STM32_IRQ_FIRST + 20) /* 20: FDCAN2 Interrupt 0 */
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#define STM32_IRQ_FDCAN1_1 (STM32_IRQ_FIRST + 21) /* 21: FDCAN1 Interrupt 1 */
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#define STM32_IRQ_FDCAN2_1 (STM32_IRQ_FIRST + 22) /* 22: FDCAN2 Interrupt 1 */
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#define STM32_IRQ_EXTI95 (STM32_IRQ_FIRST + 23) /* 23: EXTI Line[9:5] interrupts */
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#define STM32_IRQ_TIM1BRK (STM32_IRQ_FIRST + 24) /* 24: TIM1 break interrupt */
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#define STM32_IRQ_TIM1UP (STM32_IRQ_FIRST + 25) /* 25: TIM1 update interrupt */
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#define STM32_IRQ_TIM1TRGCOM (STM32_IRQ_FIRST + 26) /* 26: TIM1 trigger and commutation interrupts */
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#define STM32_IRQ_TIMCC (STM32_IRQ_FIRST + 27) /* 27: TIM1 capture / compare interrupt */
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#define STM32_IRQ_TIM2 (STM32_IRQ_FIRST + 28) /* 28: TIM2 global interrupt */
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#define STM32_IRQ_TIM3 (STM32_IRQ_FIRST + 29) /* 29: TIM3 global interrupt */
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#define STM32_IRQ_TIM4 (STM32_IRQ_FIRST + 30) /* 30: TIM4 global interrupt */
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#define STM32_IRQ_I2C1EV (STM32_IRQ_FIRST + 31) /* 31: I2C1 event interrupt */
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#define STM32_IRQ_I2C1ER (STM32_IRQ_FIRST + 32) /* 32: I2C1 error interrupt */
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#define STM32_IRQ_I2C2EV (STM32_IRQ_FIRST + 33) /* 33: I2C2 event interrupt */
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#define STM32_IRQ_I2C2ER (STM32_IRQ_FIRST + 34) /* 34: I2C2 error interrupt */
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#define STM32_IRQ_SPI1 (STM32_IRQ_FIRST + 35) /* 35: SPI1 global interrupt */
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#define STM32_IRQ_SPI2 (STM32_IRQ_FIRST + 36) /* 36: SPI2 global interrupt */
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#define STM32_IRQ_USART1 (STM32_IRQ_FIRST + 37) /* 37: USART1 global interrupt */
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#define STM32_IRQ_USART2 (STM32_IRQ_FIRST + 38) /* 38: USART2 global interrupt */
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#define STM32_IRQ_USART3 (STM32_IRQ_FIRST + 39) /* 39: USART3 global interrupt */
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#define STM32_IRQ_EXTI1510 (STM32_IRQ_FIRST + 40) /* 40: EXTI Line[15:10] interrupts */
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#define STM32_IRQ_RTCALARM (STM32_IRQ_FIRST + 41) /* 41: RTC alarms (A and B) through EXTI Line interrupts */
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#define STM32_IRQ_RESERVED42 (STM32_IRQ_FIRST + 42) /* 42: Reserved */
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#define STM32_IRQ_TIM8BRK (STM32_IRQ_FIRST + 43) /* 43: TIM8 break interrupt */
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#define STM32_IRQ_TIM12 (STM32_IRQ_FIRST + 43) /* 43: TIM12 global interrupt */
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#define STM32_IRQ_TIM8UP (STM32_IRQ_FIRST + 44) /* 44: TIM8 update interrupt */
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#define STM32_IRQ_TIM13 (STM32_IRQ_FIRST + 44) /* 44: TIM13 global interrupt */
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#define STM32_IRQ_TIM8TRGCOM (STM32_IRQ_FIRST + 45) /* 45: TIM8 trigger /commutation interrupt */
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#define STM32_IRQ_TIM14 (STM32_IRQ_FIRST + 45) /* 45: TIM14 global interrupts */
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#define STM32_IRQ_TIM8CC (STM32_IRQ_FIRST + 46) /* 46: TIM8 capture / compare interrupts */
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#define STM32_IRQ_DMA1S7 (STM32_IRQ_FIRST + 47) /* 47: DMA1 Stream7 global interrupt */
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#define STM32_IRQ_FMC (STM32_IRQ_FIRST + 48) /* 48: FMC global interrupt */
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#define STM32_IRQ_SDMMC1 (STM32_IRQ_FIRST + 49) /* 49: SDMMC1 global interrupt */
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#define STM32_IRQ_TIM5 (STM32_IRQ_FIRST + 50) /* 50: TIM5 global interrupt */
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#define STM32_IRQ_SPI3 (STM32_IRQ_FIRST + 51) /* 51: SPI3 global interrupt */
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#define STM32_IRQ_UART4 (STM32_IRQ_FIRST + 52) /* 52: UART4 global interrupt */
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#define STM32_IRQ_UART5 (STM32_IRQ_FIRST + 53) /* 53: UART5 global interrupt */
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#define STM32_IRQ_TIM6 (STM32_IRQ_FIRST + 54) /* 54: TIM6 global interrupt */
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#define STM32_IRQ_DAC1 (STM32_IRQ_FIRST + 54) /* 54: DAC1 underrun error interrupt */
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#define STM32_IRQ_TIM7 (STM32_IRQ_FIRST + 55) /* 55: TIM7 global interrupt */
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#define STM32_IRQ_DMA2S0 (STM32_IRQ_FIRST + 56) /* 56: DMA2 Stream0 interrupt */
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#define STM32_IRQ_DMA2S1 (STM32_IRQ_FIRST + 57) /* 57: DMA2 Stream1 interrupt */
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#define STM32_IRQ_DMA2S2 (STM32_IRQ_FIRST + 58) /* 58: FMA2 Stream2 interrupt */
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#define STM32_IRQ_DMA2S3 (STM32_IRQ_FIRST + 59) /* 59: DMA2 Stream3 interrupt */
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#define STM32_IRQ_DMA2S4 (STM32_IRQ_FIRST + 60) /* 60: DMA2 Stream4 interrupt */
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#define STM32_IRQ_ETH (STM32_IRQ_FIRST + 61) /* 61: Ethernet global interrupt */
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#define STM32_IRQ_ETHWKUP (STM32_IRQ_FIRST + 62) /* 62: Ethernet wakeup through EXTI line interrupt */
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#define STM32_IRQ_FDCANCAL (STM32_IRQ_FIRST + 63) /* 63: CAN2TX interrupts */
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#define STM32_IRQ_RESERVED64 (STM32_IRQ_FIRST + 64) /* 64: Reserved */
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#define STM32_IRQ_RESERVED65 (STM32_IRQ_FIRST + 65) /* 65: Reserved */
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#define STM32_IRQ_RESERVED66 (STM32_IRQ_FIRST + 66) /* 66: Reserved */
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#define STM32_IRQ_RESERVED67 (STM32_IRQ_FIRST + 67) /* 67: Reserved */
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#define STM32_IRQ_DMA2S5 (STM32_IRQ_FIRST + 68) /* 68: DMA2 Stream5 interrupt */
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#define STM32_IRQ_DMA2S6 (STM32_IRQ_FIRST + 69) /* 69: DMA2 Stream6 interrupt */
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#define STM32_IRQ_DMA2S7 (STM32_IRQ_FIRST + 70) /* 70: DMA2 Stream7 interrupt */
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#define STM32_IRQ_USART6 (STM32_IRQ_FIRST + 71) /* 71: USART6 global interrupt */
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#define STM32_IRQ_I2C3EV (STM32_IRQ_FIRST + 72) /* 72: I2C3 event interrupt */
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#define STM32_IRQ_I2C3ER (STM32_IRQ_FIRST + 73) /* 73: I2C3 error interrupt*/
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#define STM32_IRQ_OTGHS_EP1OUT (STM32_IRQ_FIRST + 74) /* 74: OTG_HS out global interrupt */
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#define STM32_IRQ_OTGHS_EP1IN (STM32_IRQ_FIRST + 75) /* 75: OTG_HS in global interrupt */
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#define STM32_IRQ_OTGHS_WKUP (STM32_IRQ_FIRST + 76) /* 76: OTG_HS wakeup interrupt */
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#define STM32_IRQ_OTGHS (STM32_IRQ_FIRST + 77) /* 77: OTG_HS global interrupt */
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#define STM32_IRQ_DCMI (STM32_IRQ_FIRST + 78) /* 78: DCMI global interrupt */
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#define STM32_IRQ_CRYP (STM32_IRQ_FIRST + 79) /* 79: CRYP global interrupt */
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#define STM32_IRQ_HASH (STM32_IRQ_FIRST + 80) /* 80: HASH global interrupt */
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#define STM32_IRQ_RNG (STM32_IRQ_FIRST + 80) /* 80: RNG global interrupt */
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#define STM32_IRQ_FPU (STM32_IRQ_FIRST + 81) /* 81: CPU FPU */
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#define STM32_IRQ_UART7 (STM32_IRQ_FIRST + 82) /* 82: UART7 global interrupt */
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#define STM32_IRQ_UART8 (STM32_IRQ_FIRST + 83) /* 83: UART8 global interrupt */
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#define STM32_IRQ_SPI4 (STM32_IRQ_FIRST + 84) /* 84: SPI4 global interrupt */
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#define STM32_IRQ_SPI5 (STM32_IRQ_FIRST + 85) /* 85: SPI5 global interrupt */
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#define STM32_IRQ_SPI6 (STM32_IRQ_FIRST + 86) /* 86: SPI6 global interrupt */
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#define STM32_IRQ_SAI1 (STM32_IRQ_FIRST + 87) /* 87: SAI1 global interrupt */
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#define STM32_IRQ_LTDC (STM32_IRQ_FIRST + 88) /* 88: LCD-TFT global interrupt */
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#define STM32_IRQ_LTDCER (STM32_IRQ_FIRST + 89) /* 89: LCD-TFT error interrupt */
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#define STM32_IRQ_DMA2D (STM32_IRQ_FIRST + 90) /* 90: DMA2D global interrupt */
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#define STM32_IRQ_SAI2 (STM32_IRQ_FIRST + 91) /* 91: SAI2 global interrupt */
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#define STM32_IRQ_QUADSPI (STM32_IRQ_FIRST + 92) /* 92: QuadSPI global interrupt */
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#define STM32_IRQ_LPTIM1 (STM32_IRQ_FIRST + 93) /* 93: LPTIM1 global interrupt */
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#define STM32_IRQ_CEC (STM32_IRQ_FIRST + 94) /* 94: HDMI-CEC global interrupt */
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#define STM32_IRQ_I2C4EV (STM32_IRQ_FIRST + 95) /* 95: I2C4 event interrupt */
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#define STM32_IRQ_I2C4ER (STM32_IRQ_FIRST + 96) /* 96: I2C4 error interrupt */
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#define STM32_IRQ_SPDIF (STM32_IRQ_FIRST + 97) /* 97: SPDIFRX global interrupt */
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#define STM32_IRQ_OTGFS_EP1OUT (STM32_IRQ_FIRST + 98) /* 98: OTG_FS out global interrupt */
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#define STM32_IRQ_OTGFS_EP1IN (STM32_IRQ_FIRST + 99) /* 99: OTG_FS in global interrupt */
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#define STM32_IRQ_OTGFS_WKUP (STM32_IRQ_FIRST + 100) /* 100: OTG_FS wakeup */
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#define STM32_IRQ_OTGFS (STM32_IRQ_FIRST + 101) /* 101: OTG_FS global interrupt */
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#define STM32_IRQ_DMAMUX1OV (STM32_IRQ_FIRST + 102) /* 102: DMAMUX1 overrun interrupt */
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#define STM32_IRQ_HRTIM1MST (STM32_IRQ_FIRST + 103) /* 103: HRTIM1 master timer interrupt */
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#define STM32_IRQ_HRTIM1TIMA (STM32_IRQ_FIRST + 104) /* 104: HRTIM1 timer A interrupt */
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#define STM32_IRQ_HRTIMTIMB (STM32_IRQ_FIRST + 105) /* 105: HRTIM1 timer B interrupt */
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#define STM32_IRQ_HRTIM1TIMC (STM32_IRQ_FIRST + 106) /* 106: HRTIM1 timer C interrupt */
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#define STM32_IRQ_HRTIM1TIMD (STM32_IRQ_FIRST + 107) /* 107: HRTIM1 timer D interrupt */
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#define STM32_IRQ_HRTIMTIME (STM32_IRQ_FIRST + 108) /* 108: HRTIM1 timer E interrupt */
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#define STM32_IRQ_HRTIM1FLT (STM32_IRQ_FIRST + 109) /* 109: HRTIM1 fault interrupt */
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#define STM32_IRQ_DFSDM1FLT0 (STM32_IRQ_FIRST + 110) /* 110: DFSDM1 filter 0 interrupt */
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#define STM32_IRQ_DFSDM1FLT1 (STM32_IRQ_FIRST + 111) /* 111: DFSDM1 filter 1 interrupt */
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#define STM32_IRQ_DFSDM1FLT2 (STM32_IRQ_FIRST + 112) /* 112: DFSDM1 filter 2 interrupt */
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#define STM32_IRQ_DFSDM1FLT3 (STM32_IRQ_FIRST + 113) /* 113: DFSDM1 filter 3 interrupt */
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#define STM32_IRQ_SAI3 (STM32_IRQ_FIRST + 114) /* 114: SAI3 global interrupt */
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#define STM32_IRQ_SWPMI1 (STM32_IRQ_FIRST + 115) /* 115: SWPMI global interrupt/wakeup */
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#define STM32_IRQ_TIM15 (STM32_IRQ_FIRST + 116) /* 116: TIM15 global interrupt */
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#define STM32_IRQ_TIM16 (STM32_IRQ_FIRST + 117) /* 117: TIM16 global interrupt */
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#define STM32_IRQ_TIM17 (STM32_IRQ_FIRST + 118) /* 118: TIM17 global interrupt */
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#define STM32_IRQ_MDIOSWKUP (STM32_IRQ_FIRST + 119) /* 119: MDIOS wakeup */
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#define STM32_IRQ_MDIOS (STM32_IRQ_FIRST + 120) /* 120: MDIOS global interrupt */
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#define STM32_IRQ_JPEG (STM32_IRQ_FIRST + 121) /* 121: JPEG global interrupt */
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#define STM32_IRQ_MDMA (STM32_IRQ_FIRST + 122) /* 122: MDMA */
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#define STM32_IRQ_RESERVED123 (STM32_IRQ_FIRST + 123) /* 123: Reserved */
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#define STM32_IRQ_SDMMC (STM32_IRQ_FIRST + 124) /* 124: SDMMC global interrupt */
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#define STM32_IRQ_HSEM0 (STM32_IRQ_FIRST + 125) /* 125: HSEM global interrupt 1 */
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#define STM32_IRQ_RESERVED126 (STM32_IRQ_FIRST + 126) /* 126: Reserved */
|
||||
#define STM32_IRQ_ADC3 (STM32_IRQ_FIRST + 127) /* 127: ADC3 global interrupt */
|
||||
#define STM32_IRQ_DMAMUX2OVR (STM32_IRQ_FIRST + 128) /* 128: DMAMUX2 overrun interrupt */
|
||||
#define STM32_IRQ_BDMACH1 (STM32_IRQ_FIRST + 129) /* 129: BDMA channel 1 interrupt */
|
||||
#define STM32_IRQ_BDMACH2 (STM32_IRQ_FIRST + 130) /* 130: BDMA channel 2 interrupt */
|
||||
#define STM32_IRQ_BDMACH3 (STM32_IRQ_FIRST + 131) /* 131: BDMA channel 3 interrupt */
|
||||
#define STM32_IRQ_BDMACH4 (STM32_IRQ_FIRST + 132) /* 132: BDMA channel 4 interrupt */
|
||||
#define STM32_IRQ_BDMACH5 (STM32_IRQ_FIRST + 133) /* 133: BDMA channel 5 interrupt */
|
||||
#define STM32_IRQ_BDMACH6 (STM32_IRQ_FIRST + 134) /* 134: BDMA channel 6 interrupt */
|
||||
#define STM32_IRQ_BDMACH7 (STM32_IRQ_FIRST + 135) /* 135: BDMA channel 7 interrupt */
|
||||
#define STM32_IRQ_BDMACH8 (STM32_IRQ_FIRST + 136) /* 136: BDMA channel 8 interrupt */
|
||||
#define STM32_IRQ_COMP (STM32_IRQ_FIRST + 137) /* 137: COMP1 and COMP2 exti_comp1_wkup global interrupt */
|
||||
#define STM32_IRQ_LPTIM2 (STM32_IRQ_FIRST + 138) /* 138: LPTIM2 timer interrupt */
|
||||
#define STM32_IRQ_LPTIM3 (STM32_IRQ_FIRST + 139) /* 139: LPTIM2 timer interrupt */
|
||||
#define STM32_IRQ_LPTIM4 (STM32_IRQ_FIRST + 140) /* 140: LPTIM2 timer interrupt */
|
||||
#define STM32_IRQ_LPTIM5 (STM32_IRQ_FIRST + 141) /* 141: LPTIM2 timer interrupt */
|
||||
#define STM32_IRQ_LPUART (STM32_IRQ_FIRST + 142) /* 142: LPUART global interrupt */
|
||||
#define STM32_IRQ_WWDG1RST (STM32_IRQ_FIRST + 143) /* 143: Window Watchdog interrupt */
|
||||
#define STM32_IRQ_CRS (STM32_IRQ_FIRST + 144) /* 144: Clock Recovery System global interrupt */
|
||||
#define STM32_IRQ_RESERVED145 (STM32_IRQ_FIRST + 145) /* 145: Reserved */
|
||||
#define STM32_IRQ_SAI4 (STM32_IRQ_FIRST + 146) /* 146: SAI4 global interrupt */
|
||||
#define STM32_IRQ_RESERVED147 (STM32_IRQ_FIRST + 147) /* 147: Reserved */
|
||||
#define STM32_IRQ_RESERVED148 (STM32_IRQ_FIRST + 148) /* 148: Reserved */
|
||||
#define STM32_IRQ_WKUP (STM32_IRQ_FIRST + 149) /* 149: WKUP1 to WKUP6 pins */
|
||||
|
||||
#define STM32_IRQ_NEXTINTS 150
|
||||
#define NR_IRQS (STM32_IRQ_FIRST + STM32_IRQ_NEXTINTS)
|
||||
|
||||
/****************************************************************************************************
|
||||
* Public Types
|
||||
****************************************************************************************************/
|
||||
|
||||
/****************************************************************************************************
|
||||
* Public Data
|
||||
****************************************************************************************************/
|
||||
|
||||
#ifndef __ASSEMBLY__
|
||||
#ifdef __cplusplus
|
||||
#define EXTERN extern "C"
|
||||
extern "C"
|
||||
{
|
||||
#else
|
||||
#define EXTERN extern
|
||||
#endif
|
||||
|
||||
/****************************************************************************************************
|
||||
* Public Functions
|
||||
****************************************************************************************************/
|
||||
|
||||
#undef EXTERN
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
#endif
|
||||
|
||||
#endif /* __ARCH_ARM_INCLUDE_STM32H7_STM32H7X7XX_IRQ_H */
|
||||
@ -20,6 +20,14 @@ config ARCH_CHIP_STM32H743ZI
|
||||
---help---
|
||||
STM32 H7 Cortex M7, 2048 FLASH, 1024K Kb SRAM
|
||||
|
||||
config ARCH_CHIP_STM32H747XI
|
||||
bool "STM32H747XI"
|
||||
select STM32H7_STM32H7X7XX
|
||||
select STM32H7_FLASH_CONFIG_I
|
||||
# TODO: IO_CONFIG
|
||||
---help---
|
||||
Dual core STM32 H7 Cortex M7+M4, 2048 FLASH, 1024K Kb SRAM
|
||||
|
||||
endchoice # STM32 H7 Chip Selection
|
||||
|
||||
config STM32H7_STM32H7X3XX
|
||||
@ -39,6 +47,23 @@ config STM32H7_STM32H7X3XX
|
||||
bool
|
||||
default n
|
||||
|
||||
config STM32H7_STM32H7X7XX
|
||||
bool
|
||||
default n
|
||||
select ARCH_HAVE_FPU
|
||||
select ARCH_HAVE_DPFPU
|
||||
select ARCH_HAVE_SDIO_DELAYED_INVLDT
|
||||
select ARMV7M_HAVE_ICACHE
|
||||
select ARMV7M_HAVE_DCACHE
|
||||
select ARMV7M_HAVE_ITCM
|
||||
select ARMV7M_HAVE_DTCM
|
||||
select STM32H7_HAVE_ETHERNET
|
||||
select STM32H7_HAVE_SPI4
|
||||
select STM32H7_HAVE_SPI5
|
||||
select STM32H7_HAVE_SPI6
|
||||
bool
|
||||
default n
|
||||
|
||||
config STM32H7_FLASH_CONFIG_B
|
||||
bool
|
||||
default n
|
||||
|
||||
@ -204,6 +204,8 @@
|
||||
|
||||
#if defined(CONFIG_STM32H7_STM32H7X3XX)
|
||||
# include "hardware/stm32h7x3xx_dmamux.h"
|
||||
#elif defined(CONFIG_STM32H7_STM32H7X7XX)
|
||||
# include "hardware/stm32h7x3xx_dmamux.h"
|
||||
#else
|
||||
# error "Unsupported STM32 H7 sub family"
|
||||
#endif
|
||||
|
||||
@ -45,6 +45,8 @@
|
||||
|
||||
#if defined(CONFIG_STM32H7_STM32H7X3XX)
|
||||
# include "hardware/stm32h7x3xx_flash.h"
|
||||
#elif defined(CONFIG_STM32H7_STM32H7X7XX)
|
||||
# include "hardware/stm32h7x3xx_flash.h"
|
||||
#else
|
||||
# error "Unsupported STM32 H7 part"
|
||||
#endif
|
||||
|
||||
@ -45,6 +45,8 @@
|
||||
|
||||
#if defined(CONFIG_STM32H7_STM32H7X3XX)
|
||||
# include "hardware/stm32h7x3xx_gpio.h"
|
||||
#elif defined(CONFIG_STM32H7_STM32H7X7XX)
|
||||
# include "hardware/stm32h7x3xx_gpio.h"
|
||||
#else
|
||||
# error "Unsupported STM32 H7 part"
|
||||
#endif
|
||||
|
||||
@ -46,6 +46,8 @@
|
||||
|
||||
#if defined(CONFIG_STM32H7_STM32H7X3XX)
|
||||
# include "hardware/stm32h7x3xx_memorymap.h"
|
||||
#elif defined(CONFIG_STM32H7_STM32H7X7XX)
|
||||
# include "hardware/stm32h7x3xx_memorymap.h"
|
||||
#else
|
||||
# error "Unsupported STM32 H7 memory map"
|
||||
#endif
|
||||
|
||||
@ -45,6 +45,8 @@
|
||||
|
||||
#if defined(CONFIG_STM32H7_STM32H7X3XX)
|
||||
# include "hardware/stm32h7x3xx_pinmap.h"
|
||||
#elif defined(CONFIG_STM32H7_STM32H7X7XX)
|
||||
# include "hardware/stm32h7x3xx_pinmap.h"
|
||||
#else
|
||||
# error "Unsupported STM32 H7 Pin map"
|
||||
#endif
|
||||
|
||||
@ -45,6 +45,8 @@
|
||||
|
||||
#if defined(CONFIG_STM32H7_STM32H7X3XX)
|
||||
# include "hardware/stm32h7x3xx_pwr.h"
|
||||
#elif defined(CONFIG_STM32H7_STM32H7X7XX)
|
||||
# include "hardware/stm32h7x3xx_pwr.h"
|
||||
#else
|
||||
# error "Unsupported STM32 H7 part"
|
||||
#endif
|
||||
|
||||
@ -46,6 +46,8 @@
|
||||
|
||||
#if defined(CONFIG_STM32H7_STM32H7X3XX)
|
||||
# include "hardware/stm32h7x3xx_rcc.h"
|
||||
#elif defined(CONFIG_STM32H7_STM32H7X7XX)
|
||||
# include "hardware/stm32h7x3xx_rcc.h"
|
||||
#else
|
||||
# error "Unsupported STM32 H7 part"
|
||||
#endif
|
||||
|
||||
@ -45,6 +45,8 @@
|
||||
|
||||
#if defined(CONFIG_STM32H7_STM32H7X3XX)
|
||||
# include "hardware/stm32h7x3xx_spi.h"
|
||||
#elif defined(CONFIG_STM32H7_STM32H7X7XX)
|
||||
# include "hardware/stm32h7x3xx_spi.h"
|
||||
#else
|
||||
# error "Unsupported STM32 H7 sub family"
|
||||
#endif
|
||||
|
||||
@ -45,6 +45,8 @@
|
||||
|
||||
#if defined(CONFIG_STM32H7_STM32H7X3XX)
|
||||
# include "hardware/stm32h7x3xx_syscfg.h"
|
||||
#elif defined(CONFIG_STM32H7_STM32H7X7XX)
|
||||
# include "hardware/stm32h7x3xx_syscfg.h"
|
||||
#else
|
||||
# error "Unsupported STM32 H7 part"
|
||||
#endif
|
||||
|
||||
@ -45,6 +45,8 @@
|
||||
|
||||
#if defined(CONFIG_STM32H7_STM32H7X3XX)
|
||||
# include "hardware/stm32h7x3xx_uart.h"
|
||||
#elif defined(CONFIG_STM32H7_STM32H7X7XX)
|
||||
# include "hardware/stm32h7x3xx_uart.h"
|
||||
#else
|
||||
# error "Unsupported STM32 H7 memory map"
|
||||
#endif
|
||||
|
||||
@ -43,7 +43,7 @@
|
||||
#include <nuttx/config.h>
|
||||
#include <arch/stm32h7/chip.h>
|
||||
|
||||
#if defined(CONFIG_STM32H7_STM32H7X3XX)
|
||||
#if defined(CONFIG_STM32H7_STM32H7X3XX) || defined(CONFIG_STM32H7_STM32H7X7XX)
|
||||
|
||||
/************************************************************************************
|
||||
* Pre-processor Definitions
|
||||
|
||||
@ -44,7 +44,7 @@
|
||||
|
||||
#include "stm32_gpio.h"
|
||||
|
||||
#if defined(CONFIG_STM32H7_STM32H7X3XX)
|
||||
#if defined(CONFIG_STM32H7_STM32H7X3XX) || defined(CONFIG_STM32H7_STM32H7X7XX)
|
||||
|
||||
/************************************************************************************
|
||||
* Pre-processor Definitions
|
||||
|
||||
@ -44,7 +44,7 @@
|
||||
#include "chip.h"
|
||||
#include "hardware/stm32_memorymap.h"
|
||||
|
||||
#if defined(CONFIG_STM32H7_STM32H7X3XX)
|
||||
#if defined(CONFIG_STM32H7_STM32H7X3XX) || defined(CONFIG_STM32H7_STM32H7X7XX)
|
||||
|
||||
/************************************************************************************
|
||||
* Pre-processor Definitions
|
||||
|
||||
@ -57,11 +57,12 @@
|
||||
* families
|
||||
*/
|
||||
|
||||
#if defined(CONFIG_STM32H7_STM32H7X3XX)
|
||||
#if defined(CONFIG_STM32H7_STM32H7X3XX) || defined(CONFIG_STM32H7_STM32H7X7XX)
|
||||
|
||||
/****************************************************************************
|
||||
* Public Data
|
||||
****************************************************************************/
|
||||
|
||||
/* Base addresses for each GPIO block */
|
||||
|
||||
const uint32_t g_gpiobase[STM32H7_NGPIO] =
|
||||
@ -436,6 +437,7 @@ bool stm32_gpioread(uint32_t pinset)
|
||||
pin = (pinset & GPIO_PIN_MASK) >> GPIO_PIN_SHIFT;
|
||||
return ((getreg32(base + STM32_GPIO_IDR_OFFSET) & (1 << pin)) != 0);
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
||||
@ -73,6 +73,8 @@
|
||||
|
||||
#if defined(CONFIG_STM32H7_STM32H7X3XX)
|
||||
# include "stm32h7x3xx_rcc.c"
|
||||
#elif defined(CONFIG_STM32H7_STM32H7X7XX)
|
||||
# include "stm32h7x7xx_rcc.c"
|
||||
#else
|
||||
# error "Unsupported STM32 H7 chip"
|
||||
#endif
|
||||
|
||||
950
arch/arm/src/stm32h7/stm32h7x7xx_rcc.c
Normal file
950
arch/arm/src/stm32h7/stm32h7x7xx_rcc.c
Normal file
@ -0,0 +1,950 @@
|
||||
/****************************************************************************
|
||||
* arch/arm/src/stm32h7/stm32h7x3xx_rcc.c
|
||||
*
|
||||
* Copyright (C) 2018, 2019 Gregory Nutt. All rights reserved.
|
||||
* Authors: Gregory Nutt <gnutt@nuttx.org>
|
||||
* David Sidrane <david.sidrane@nscdg.com>
|
||||
* Mateusz Szafoni <raiden00@railab.me>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in
|
||||
* the documentation and/or other materials provided with the
|
||||
* distribution.
|
||||
* 3. Neither the name NuttX nor the names of its contributors may be
|
||||
* used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
|
||||
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
|
||||
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Included Files
|
||||
****************************************************************************/
|
||||
|
||||
#include "stm32_pwr.h"
|
||||
#include "hardware/stm32_axi.h"
|
||||
#include "hardware/stm32_syscfg.h"
|
||||
|
||||
/****************************************************************************
|
||||
* Pre-processor Definitions
|
||||
****************************************************************************/
|
||||
|
||||
/* Allow up to 100 milliseconds for the high speed clock to become ready.
|
||||
* that is a very long delay, but if the clock does not become ready we are
|
||||
* hosed anyway. Normally this is very fast, but I have seen at least one
|
||||
* board that required this long, long timeout for the HSE to be ready.
|
||||
*/
|
||||
|
||||
#define HSERDY_TIMEOUT (100 * CONFIG_BOARD_LOOPSPERMSEC)
|
||||
|
||||
/* Same for HSI */
|
||||
|
||||
#define HSIRDY_TIMEOUT HSERDY_TIMEOUT
|
||||
|
||||
/* HSE divisor to yield ~1MHz RTC clock */
|
||||
|
||||
#define HSE_DIVISOR (STM32_HSE_FREQUENCY + 500000) / 1000000
|
||||
|
||||
/* FLASH wait states */
|
||||
|
||||
#if !defined(BOARD_FLASH_WAITSTATES)
|
||||
# error BOARD_FLASH_WAITSTATES not defined
|
||||
#elif BOARD_FLASH_WAITSTATES < 0 || BOARD_FLASH_WAITSTATES > 15
|
||||
# error BOARD_FLASH_WAITSTATES is out of range
|
||||
#endif
|
||||
|
||||
/* Voltage output scale (default to Scale 1 mode) */
|
||||
|
||||
#ifndef STM32_PWR_VOS_SCALE
|
||||
# define STM32_PWR_VOS_SCALE PWR_D3CR_VOS_SCALE_1
|
||||
#endif
|
||||
|
||||
#if !defined(BOARD_FLASH_PROGDELAY)
|
||||
# if STM32_PWR_VOS_SCALE == PWR_D3CR_VOS_SCALE_1
|
||||
# if STM32_SYSCLK_FREQUENCY <= 70000000 && BOARD_FLASH_WAITSTATES == 0
|
||||
# define BOARD_FLASH_PROGDELAY 0
|
||||
# elif STM32_SYSCLK_FREQUENCY <= 140000000 && BOARD_FLASH_WAITSTATES == 1
|
||||
# define BOARD_FLASH_PROGDELAY 10
|
||||
# elif STM32_SYSCLK_FREQUENCY <= 185000000 && BOARD_FLASH_WAITSTATES == 2
|
||||
# define BOARD_FLASH_PROGDELAY 1
|
||||
# elif STM32_SYSCLK_FREQUENCY <= 210000000 && BOARD_FLASH_WAITSTATES == 2
|
||||
# define BOARD_FLASH_PROGDELAY 2
|
||||
# elif STM32_SYSCLK_FREQUENCY <= 225000000 && BOARD_FLASH_WAITSTATES == 3
|
||||
# define BOARD_FLASH_PROGDELAY 2
|
||||
# else
|
||||
# define BOARD_FLASH_PROGDELAY 2
|
||||
# endif
|
||||
# endif
|
||||
#endif
|
||||
|
||||
/* PLL are only enabled if the P,Q or R outputs are enabled. */
|
||||
|
||||
#undef USE_PLL1
|
||||
#if STM32_PLLCFG_PLL1CFG & (RCC_PLLCFGR_DIVP1EN | RCC_PLLCFGR_DIVQ1EN | \
|
||||
RCC_PLLCFGR_DIVR1EN)
|
||||
# define USE_PLL1
|
||||
#endif
|
||||
|
||||
#undef USE_PLL2
|
||||
#if STM32_PLLCFG_PLL2CFG & (RCC_PLLCFGR_DIVP2EN | RCC_PLLCFGR_DIVQ2EN | \
|
||||
RCC_PLLCFGR_DIVR2EN)
|
||||
# define USE_PLL2
|
||||
#endif
|
||||
|
||||
#undef USE_PLL3
|
||||
#if STM32_PLLCFG_PLL3CFG & (RCC_PLLCFGR_DIVP3EN | RCC_PLLCFGR_DIVQ3EN | \
|
||||
RCC_PLLCFGR_DIVR3EN)
|
||||
# define USE_PLL3
|
||||
#endif
|
||||
|
||||
/****************************************************************************
|
||||
* Private Data
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Private Functions
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Name: rcc_reset
|
||||
*
|
||||
* Description:
|
||||
* Reset the RCC clock configuration to the default reset state
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
static inline void rcc_reset(void)
|
||||
{
|
||||
uint32_t regval;
|
||||
|
||||
/* Enable the Internal High Speed clock (HSI) */
|
||||
|
||||
regval = getreg32(STM32_RCC_CR);
|
||||
regval |= RCC_CR_HSION;
|
||||
putreg32(regval, STM32_RCC_CR);
|
||||
|
||||
#if defined(CONFIG_STM32H7_AXI_SRAM_CORRUPTION_WAR)
|
||||
/* Errata 2.2.9 Enable workaround for Reading from AXI SRAM may lead to data
|
||||
* read corruption. See ES0392 Rev 6.
|
||||
*/
|
||||
|
||||
putreg32(AXI_TARG_READ_ISS_OVERRIDE, STM32_AXI_TARG7_FN_MOD);
|
||||
#endif
|
||||
|
||||
/* Reset CFGR register */
|
||||
|
||||
putreg32(0x00000000, STM32_RCC_CFGR);
|
||||
|
||||
/* Reset HSION, HSEON, CSSON and PLLON bits */
|
||||
|
||||
regval = getreg32(STM32_RCC_CR);
|
||||
regval &= ~(RCC_CR_HSEON | RCC_CR_HSI48ON |
|
||||
RCC_CR_CSION | RCC_CR_PLL1ON |
|
||||
RCC_CR_PLL2ON | RCC_CR_PLL3ON |
|
||||
RCC_CR_HSIDIV_MASK);
|
||||
|
||||
/* Set HSI predivider to default (4, 16MHz) */
|
||||
|
||||
regval |= RCC_CR_HSIDIV_4;
|
||||
|
||||
putreg32(regval, STM32_RCC_CR);
|
||||
|
||||
/* Reset PLLCFGR register to reset default */
|
||||
|
||||
putreg32(RCC_PLLCFGR_RESET, STM32_RCC_PLLCFGR);
|
||||
|
||||
/* Reset HSEBYP bit */
|
||||
|
||||
regval = getreg32(STM32_RCC_CR);
|
||||
regval &= ~RCC_CR_HSEBYP;
|
||||
putreg32(regval, STM32_RCC_CR);
|
||||
|
||||
/* Disable all interrupts */
|
||||
|
||||
putreg32(0x00000000, STM32_RCC_CIER);
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Name: rcc_enableahb1
|
||||
*
|
||||
* Description:
|
||||
* Enable selected AHB1 peripherals
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
static inline void rcc_enableahb1(void)
|
||||
{
|
||||
uint32_t regval;
|
||||
|
||||
/* Set the appropriate bits in the AHB1ENR register to enabled the
|
||||
* selected AHB1 peripherals.
|
||||
*/
|
||||
|
||||
regval = getreg32(STM32_RCC_AHB1ENR);
|
||||
#if defined(CONFIG_STM32H7_ADC1) || defined(CONFIG_STM32H7_ADC2)
|
||||
/* ADC1 & 2 clock enable */
|
||||
|
||||
regval |= RCC_AHB1ENR_ADC12EN;
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_STM32H7_DMA1
|
||||
/* DMA 1 clock enable */
|
||||
|
||||
regval |= RCC_AHB1ENR_DMA1EN;
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_STM32H7_DMA2
|
||||
/* DMA 2 clock enable */
|
||||
|
||||
regval |= RCC_AHB1ENR_DMA2EN;
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_STM32H7_OTGFS
|
||||
/* USB OTG FS clock enable */
|
||||
|
||||
regval |= RCC_AHB1ENR_OTGFSEN;
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_STM32H7_OTGHS
|
||||
#ifdef BOARD_ENABLE_USBOTG_HSULPI
|
||||
/* Enable clocking for USB OTG HS and external PHY */
|
||||
|
||||
regval |= (RCC_AHB1ENR_OTGHSEN | RCC_AHB1ENR_OTGHSULPIEN);
|
||||
#else
|
||||
/* Enable only clocking for USB OTG HS */
|
||||
|
||||
regval |= RCC_AHB1ENR_OTGHSEN;
|
||||
#endif
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_STM32H7_ETHMAC
|
||||
/* Enable ethernet clocks */
|
||||
|
||||
regval |= (RCC_AHB1ENR_ETH1MACEN | RCC_AHB1ENR_ETH1TXEN |
|
||||
RCC_AHB1ENR_ETH1RXEN);
|
||||
#endif
|
||||
|
||||
putreg32(regval, STM32_RCC_AHB1ENR); /* Enable peripherals */
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Name: rcc_enableahb2
|
||||
*
|
||||
* Description:
|
||||
* Enable selected AHB2 peripherals
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
static inline void rcc_enableahb2(void)
|
||||
{
|
||||
uint32_t regval;
|
||||
|
||||
/* Set the appropriate bits in the AHB2ENR register to enabled the
|
||||
* selected AHB2 peripherals.
|
||||
*/
|
||||
|
||||
regval = getreg32(STM32_RCC_AHB2ENR);
|
||||
|
||||
/* TODO: ... */
|
||||
|
||||
putreg32(regval, STM32_RCC_AHB2ENR); /* Enable peripherals */
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Name: rcc_enableahb3
|
||||
*
|
||||
* Description:
|
||||
* Enable selected AHB3 peripherals
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
static inline void rcc_enableahb3(void)
|
||||
{
|
||||
uint32_t regval;
|
||||
|
||||
/* Set the appropriate bits in the AHB3ENR register to enabled the
|
||||
* selected AHB3 peripherals.
|
||||
*/
|
||||
|
||||
regval = getreg32(STM32_RCC_AHB3ENR);
|
||||
|
||||
#ifdef CONFIG_STM32H7_MDMA
|
||||
/* MDMA clock enable */
|
||||
|
||||
regval |= RCC_AHB3ENR_MDMAEN;
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_STM32H7_SDMMC1
|
||||
/* SDMMC clock enable */
|
||||
|
||||
regval |= RCC_AHB3ENR_SDMMC1EN;
|
||||
#endif
|
||||
|
||||
/* TODO: ... */
|
||||
|
||||
putreg32(regval, STM32_RCC_AHB3ENR); /* Enable peripherals */
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Name: rcc_enableahb4
|
||||
*
|
||||
* Description:
|
||||
* Enable selected AHB4 peripherals
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
static inline void rcc_enableahb4(void)
|
||||
{
|
||||
uint32_t regval;
|
||||
|
||||
/* Set the appropriate bits in the AHB4ENR register to enabled the
|
||||
* selected AHB4 peripherals.
|
||||
*/
|
||||
|
||||
regval = getreg32(STM32_RCC_AHB4ENR);
|
||||
|
||||
#ifdef CONFIG_STM32H7_ADC3
|
||||
/* ADC3 clock enable */
|
||||
|
||||
regval |= RCC_AHB4ENR_ADC3EN;
|
||||
#endif
|
||||
|
||||
/* Enable GPIO, GPIOB, ... GPIOK */
|
||||
|
||||
#if STM32H7_NGPIO > 0
|
||||
regval |= (RCC_AHB4ENR_GPIOAEN
|
||||
#if STM32H7_NGPIO > 1
|
||||
| RCC_AHB4ENR_GPIOBEN
|
||||
#endif
|
||||
#if STM32H7_NGPIO > 2
|
||||
| RCC_AHB4ENR_GPIOCEN
|
||||
#endif
|
||||
#if STM32H7_NGPIO > 3
|
||||
| RCC_AHB4ENR_GPIODEN
|
||||
#endif
|
||||
#if STM32H7_NGPIO > 4
|
||||
| RCC_AHB4ENR_GPIOEEN
|
||||
#endif
|
||||
#if STM32H7_NGPIO > 5
|
||||
| RCC_AHB4ENR_GPIOFEN
|
||||
#endif
|
||||
#if STM32H7_NGPIO > 6
|
||||
| RCC_AHB4ENR_GPIOGEN
|
||||
#endif
|
||||
#if STM32H7_NGPIO > 7
|
||||
| RCC_AHB4ENR_GPIOHEN
|
||||
#endif
|
||||
#if STM32H7_NGPIO > 8
|
||||
| RCC_AHB4ENR_GPIOIEN
|
||||
#endif
|
||||
#if STM32H7_NGPIO > 9
|
||||
| RCC_AHB4ENR_GPIOJEN
|
||||
#endif
|
||||
#if STM32H7_NGPIO > 10
|
||||
| RCC_AHB4ENR_GPIOKEN
|
||||
#endif
|
||||
);
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_STM32H7_BDMA
|
||||
/* BDMA clock enable */
|
||||
|
||||
regval |= RCC_AHB4ENR_BDMAEN;
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_STM32H7_CRC
|
||||
/* CRC clock enable */
|
||||
|
||||
regval |= RCC_AHB4ENR_CRCEN;
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_STM32H7_BKPSRAM
|
||||
/* Backup SRAM clock enable */
|
||||
|
||||
regval |= RCC_AHB4ENR_BKPSRAMEN;
|
||||
#endif
|
||||
|
||||
putreg32(regval, STM32_RCC_AHB4ENR); /* Enable peripherals */
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Name: rcc_enableapb1
|
||||
*
|
||||
* Description:
|
||||
* Enable selected APB1 peripherals
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
static inline void rcc_enableapb1(void)
|
||||
{
|
||||
uint32_t regval;
|
||||
|
||||
/* Set the appropriate bits in the APB1L/HENR register to enabled the
|
||||
* selected APB1 peripherals.
|
||||
*/
|
||||
|
||||
regval = getreg32(STM32_RCC_APB1LENR);
|
||||
|
||||
#ifdef CONFIG_STM32H7_SPI2
|
||||
/* SPI2 clock enable */
|
||||
|
||||
regval |= RCC_APB1LENR_SPI2EN;
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_STM32H7_SPI3
|
||||
/* SPI3 clock enable */
|
||||
|
||||
regval |= RCC_APB1LENR_SPI3EN;
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_STM32H7_I2C1
|
||||
/* I2C1 clock enable */
|
||||
|
||||
regval |= RCC_APB1LENR_I2C1EN;
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_STM32H7_I2C2
|
||||
/* I2C2 clock enable */
|
||||
|
||||
regval |= RCC_APB1LENR_I2C2EN;
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_STM32H7_I2C3
|
||||
/* I2C3 clock enable */
|
||||
|
||||
regval |= RCC_APB1LENR_I2C3EN;
|
||||
#endif
|
||||
|
||||
/* TODO: ... */
|
||||
|
||||
putreg32(regval, STM32_RCC_APB1LENR); /* Enable APB1L peripherals */
|
||||
|
||||
regval = getreg32(STM32_RCC_APB1HENR);
|
||||
|
||||
/* TODO: ... */
|
||||
|
||||
putreg32(regval, STM32_RCC_APB1HENR); /* Enable APB1H peripherals */
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Name: rcc_enableapb2
|
||||
*
|
||||
* Description:
|
||||
* Enable selected APB2 peripherals
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
static inline void rcc_enableapb2(void)
|
||||
{
|
||||
uint32_t regval;
|
||||
|
||||
/* Set the appropriate bits in the APB2ENR register to enabled the
|
||||
* selected APB2 peripherals.
|
||||
*/
|
||||
|
||||
regval = getreg32(STM32_RCC_APB2ENR);
|
||||
|
||||
#ifdef CONFIG_STM32H7_SPI1
|
||||
/* SPI1 clock enable */
|
||||
|
||||
regval |= RCC_APB2ENR_SPI1EN;
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_STM32H7_SPI4
|
||||
/* SPI4 clock enable */
|
||||
|
||||
regval |= RCC_APB2ENR_SPI4EN;
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_STM32H7_SPI5
|
||||
/* SPI5 clock enable */
|
||||
|
||||
regval |= RCC_APB2ENR_SPI5EN;
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_STM32H7_SDMMC2
|
||||
/* SDMMC2 clock enable */
|
||||
|
||||
regval |= RCC_APB2ENR_SDMMC2EN;
|
||||
#endif
|
||||
|
||||
putreg32(regval, STM32_RCC_APB2ENR); /* Enable peripherals */
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Name: rcc_enableapb3
|
||||
*
|
||||
* Description:
|
||||
* Enable selected APB3 peripherals
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
static inline void rcc_enableapb3(void)
|
||||
{
|
||||
uint32_t regval;
|
||||
|
||||
/* Set the appropriate bits in the APB3ENR register to enabled the
|
||||
* selected APB3 peripherals.
|
||||
*/
|
||||
|
||||
regval = getreg32(STM32_RCC_APB3ENR);
|
||||
|
||||
/* TODO: ... */
|
||||
|
||||
putreg32(regval, STM32_RCC_APB3ENR); /* Enable peripherals */
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Name: rcc_enableapb4
|
||||
*
|
||||
* Description:
|
||||
* Enable selected APB4 peripherals
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
static inline void rcc_enableapb4(void)
|
||||
{
|
||||
uint32_t regval;
|
||||
|
||||
/* Set the appropriate bits in the APB4ENR register to enabled the
|
||||
* selected APB4 peripherals.
|
||||
*/
|
||||
|
||||
regval = getreg32(STM32_RCC_APB4ENR);
|
||||
|
||||
#ifdef CONFIG_STM32H7_SYSCFG
|
||||
/* System configuration controller clock enable */
|
||||
|
||||
regval |= RCC_APB4ENR_SYSCFGEN;
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_STM32H7_I2C4
|
||||
/* I2C4 clock enable */
|
||||
|
||||
regval |= RCC_APB4ENR_I2C4EN;
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_STM32H7_SPI6
|
||||
/* SPI6 clock enable */
|
||||
|
||||
regval |= RCC_APB4ENR_SPI6EN;
|
||||
#endif
|
||||
|
||||
/* TODO: ... */
|
||||
|
||||
putreg32(regval, STM32_RCC_APB4ENR); /* Enable peripherals */
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Name: stm32_stdclockconfig
|
||||
*
|
||||
* Description:
|
||||
* Called to change to new clock based on settings in board.h
|
||||
*
|
||||
* NOTE: This logic would need to be extended if you need to select low-
|
||||
* power clocking modes!
|
||||
****************************************************************************/
|
||||
|
||||
#ifndef CONFIG_STM32H7_CUSTOM_CLOCKCONFIG
|
||||
static void stm32_stdclockconfig(void)
|
||||
{
|
||||
uint32_t regval;
|
||||
volatile int32_t timeout;
|
||||
|
||||
#ifdef STM32_BOARD_USEHSI
|
||||
/* Enable Internal High-Speed Clock (HSI) */
|
||||
|
||||
regval = getreg32(STM32_RCC_CR);
|
||||
regval |= RCC_CR_HSION; /* Enable HSI */
|
||||
putreg32(regval, STM32_RCC_CR);
|
||||
|
||||
/* Wait until the HSI is ready (or until a timeout elapsed) */
|
||||
|
||||
for (timeout = HSIRDY_TIMEOUT; timeout > 0; timeout--)
|
||||
{
|
||||
/* Check if the HSIRDY flag is the set in the CR */
|
||||
|
||||
if ((getreg32(STM32_RCC_CR) & RCC_CR_HSIRDY) != 0)
|
||||
{
|
||||
/* If so, then break-out with timeout > 0 */
|
||||
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
#else /* if STM32_BOARD_USEHSE */
|
||||
/* Enable External High-Speed Clock (HSE) */
|
||||
|
||||
regval = getreg32(STM32_RCC_CR);
|
||||
#ifdef STM32_HSEBYP_ENABLE /* May be defined in board.h header file */
|
||||
regval |= RCC_CR_HSEBYP; /* Enable HSE clock bypass */
|
||||
#else
|
||||
regval &= ~RCC_CR_HSEBYP; /* Disable HSE clock bypass */
|
||||
#endif
|
||||
regval |= RCC_CR_HSEON; /* Enable HSE */
|
||||
putreg32(regval, STM32_RCC_CR);
|
||||
|
||||
/* Wait until the HSE is ready (or until a timeout elapsed) */
|
||||
|
||||
for (timeout = HSERDY_TIMEOUT; timeout > 0; timeout--)
|
||||
{
|
||||
/* Check if the HSERDY flag is the set in the CR */
|
||||
|
||||
if ((getreg32(STM32_RCC_CR) & RCC_CR_HSERDY) != 0)
|
||||
{
|
||||
/* If so, then break-out with timeout > 0 */
|
||||
|
||||
break;
|
||||
}
|
||||
}
|
||||
#endif
|
||||
|
||||
#define CONFIG_STM32H7_HSI48
|
||||
#ifdef CONFIG_STM32H7_HSI48
|
||||
/* Enable HSI48 */
|
||||
|
||||
regval = getreg32(STM32_RCC_CR);
|
||||
regval |= RCC_CR_HSI48ON;
|
||||
putreg32(regval, STM32_RCC_CR);
|
||||
|
||||
/* Wait until the HSI48 is ready */
|
||||
|
||||
while ((getreg32(STM32_RCC_CR) & RCC_CR_HSI48RDY) == 0)
|
||||
{
|
||||
}
|
||||
#endif
|
||||
|
||||
/* Check for a timeout. If this timeout occurs, then we are hosed. We
|
||||
* have no real back-up plan, although the following logic makes it look
|
||||
* as though we do.
|
||||
*/
|
||||
|
||||
if (timeout > 0)
|
||||
{
|
||||
/* Set the D1 domain Core prescaler and the HCLK source/divider */
|
||||
|
||||
regval = getreg32(STM32_RCC_D1CFGR);
|
||||
regval &= ~(RCC_D1CFGR_HPRE_MASK | RCC_D1CFGR_D1CPRE_MASK);
|
||||
regval |= (STM32_RCC_D1CFGR_HPRE | STM32_RCC_D1CFGR_D1CPRE);
|
||||
putreg32(regval, STM32_RCC_D1CFGR);
|
||||
|
||||
/* Set PCLK1 */
|
||||
|
||||
regval = getreg32(STM32_RCC_D2CFGR);
|
||||
regval &= ~RCC_D2CFGR_D2PPRE2_MASK;
|
||||
regval |= STM32_RCC_D2CFGR_D2PPRE1;
|
||||
putreg32(regval, STM32_RCC_D2CFGR);
|
||||
|
||||
/* Set PCLK2 */
|
||||
|
||||
regval = getreg32(STM32_RCC_D2CFGR);
|
||||
regval &= ~RCC_D2CFGR_D2PPRE2_MASK;
|
||||
regval |= STM32_RCC_D2CFGR_D2PPRE2;
|
||||
putreg32(regval, STM32_RCC_D2CFGR);
|
||||
|
||||
/* Set PCLK3 */
|
||||
|
||||
regval = getreg32(STM32_RCC_D1CFGR);
|
||||
regval &= ~RCC_D1CFGR_D1PPRE_MASK;
|
||||
regval |= STM32_RCC_D1CFGR_D1PPRE;
|
||||
putreg32(regval, STM32_RCC_D1CFGR);
|
||||
|
||||
/* Set PCLK4 */
|
||||
|
||||
regval = getreg32(STM32_RCC_D3CFGR);
|
||||
regval &= ~RCC_D3CFGR_D3PPRE_MASK;
|
||||
regval |= STM32_RCC_D3CFGR_D3PPRE;
|
||||
putreg32(regval, STM32_RCC_D3CFGR);
|
||||
|
||||
#ifdef CONFIG_STM32H7_RTC_HSECLOCK
|
||||
/* Set the RTC clock divisor */
|
||||
|
||||
regval = getreg32(STM32_RCC_CFGR);
|
||||
regval &= ~RCC_CFGR_RTCPRE_MASK;
|
||||
regval |= RCC_CFGR_RTCPRE(HSE_DIVISOR);
|
||||
putreg32(regval, STM32_RCC_CFGR);
|
||||
#endif
|
||||
|
||||
/* Configure PLL123 clock source and multipiers */
|
||||
|
||||
#ifdef STM32_BOARD_USEHSI
|
||||
regval = (RCC_PLLCKSELR_PLLSRC_HSI |
|
||||
STM32_PLLCFG_PLL1M |
|
||||
STM32_PLLCFG_PLL2M |
|
||||
STM32_PLLCFG_PLL3M);
|
||||
#else /* if STM32_BOARD_USEHSE */
|
||||
regval = (RCC_PLLCKSELR_PLLSRC_HSE |
|
||||
STM32_PLLCFG_PLL1M |
|
||||
STM32_PLLCFG_PLL2M |
|
||||
STM32_PLLCFG_PLL3M);
|
||||
#endif
|
||||
putreg32(regval, STM32_RCC_PLLCKSELR);
|
||||
|
||||
/* Each PLL offers 3 outputs with post-dividers (PLLxP/PLLxQ/PLLxR) */
|
||||
|
||||
/* Configure PLL1 dividers */
|
||||
|
||||
regval = (STM32_PLLCFG_PLL1N |
|
||||
STM32_PLLCFG_PLL1P |
|
||||
STM32_PLLCFG_PLL1Q |
|
||||
STM32_PLLCFG_PLL1R);
|
||||
putreg32(regval, STM32_RCC_PLL1DIVR);
|
||||
|
||||
/* Configure PLL2 dividers */
|
||||
|
||||
regval = (STM32_PLLCFG_PLL2N |
|
||||
STM32_PLLCFG_PLL2P |
|
||||
STM32_PLLCFG_PLL2Q |
|
||||
STM32_PLLCFG_PLL2R);
|
||||
putreg32(regval, STM32_RCC_PLL2DIVR);
|
||||
|
||||
/* Configure PLL3 dividers */
|
||||
|
||||
regval = (STM32_PLLCFG_PLL3N |
|
||||
STM32_PLLCFG_PLL3P |
|
||||
STM32_PLLCFG_PLL3Q |
|
||||
STM32_PLLCFG_PLL3R);
|
||||
putreg32(regval, STM32_RCC_PLL3DIVR);
|
||||
|
||||
/* Configure PLLs */
|
||||
|
||||
regval = (STM32_PLLCFG_PLL1CFG |
|
||||
STM32_PLLCFG_PLL2CFG |
|
||||
STM32_PLLCFG_PLL3CFG);
|
||||
putreg32(regval, STM32_RCC_PLLCFGR);
|
||||
|
||||
regval = getreg32(STM32_RCC_CR);
|
||||
#if defined(USE_PLL1)
|
||||
/* Enable the PLL1 */
|
||||
|
||||
regval |= RCC_CR_PLL1ON;
|
||||
#endif
|
||||
|
||||
#if defined(USE_PLL2)
|
||||
/* Enable the PLL2 */
|
||||
|
||||
regval |= RCC_CR_PLL2ON;
|
||||
#endif
|
||||
|
||||
#if defined(USE_PLL3)
|
||||
/* Enable the PLL3 */
|
||||
|
||||
regval |= RCC_CR_PLL3ON;
|
||||
#endif
|
||||
putreg32(regval, STM32_RCC_CR);
|
||||
|
||||
#if defined(USE_PLL1)
|
||||
/* Wait until the PLL1 is ready */
|
||||
|
||||
while ((getreg32(STM32_RCC_CR) & RCC_CR_PLL1RDY) == 0)
|
||||
{
|
||||
}
|
||||
#endif
|
||||
|
||||
#if defined(USE_PLL2)
|
||||
/* Wait until the PLL2 is ready */
|
||||
|
||||
while ((getreg32(STM32_RCC_CR) & RCC_CR_PLL2RDY) == 0)
|
||||
{
|
||||
}
|
||||
#endif
|
||||
|
||||
#if defined(USE_PLL3)
|
||||
/* Wait until the PLL3 is ready */
|
||||
|
||||
while ((getreg32(STM32_RCC_CR) & RCC_CR_PLL3RDY) == 0)
|
||||
{
|
||||
}
|
||||
#endif
|
||||
|
||||
/* Ww must write the lower byte of the PWR_CR3 register is written once
|
||||
* after POR and it shall be written before changing VOS level or ck_sys
|
||||
* clock frequency. No limitation applies to the upper bytes.
|
||||
*
|
||||
* Programming data corresponding to an invalid combination of
|
||||
* LDOEN and BYPASS bits will be ignored: data will not be written,
|
||||
* the written-once mechanism will lock the register and any further
|
||||
* write access will be ignored. The default supply configuration will
|
||||
* be kept and the ACTVOSRDY bit in PWR control status register 1 (PWR_CSR1)
|
||||
* will go on indicating invalid voltage levels.
|
||||
*
|
||||
* N.B. The system shall be power cycled before writing a new value.
|
||||
*/
|
||||
|
||||
regval = getreg32(STM32_PWR_CR3);
|
||||
regval |= STM32_PWR_CR3_LDOEN | STM32_PWR_CR3_LDOESCUEN;
|
||||
putreg32(regval, STM32_PWR_CR3);
|
||||
|
||||
#if 0
|
||||
|
||||
/* Set the voltage output scale */
|
||||
|
||||
regval = getreg32(STM32_PWR_D3CR);
|
||||
regval &= ~STM32_PWR_D3CR_VOS_MASK;
|
||||
regval |= STM32_PWR_VOS_SCALE;
|
||||
putreg32(regval, STM32_PWR_D3CR);
|
||||
|
||||
while ((getreg32(STM32_PWR_D3CR) & STM32_PWR_D3CR_VOSRDY) == 0)
|
||||
{
|
||||
}
|
||||
|
||||
/* Over-drive is needed if
|
||||
* - Voltage output scale 1 mode is selected and SYSCLK frequency is
|
||||
* over 400 Mhz.
|
||||
*/
|
||||
|
||||
if ((STM32_PWR_VOS_SCALE == PWR_D3CR_VOS_SCALE_1) &&
|
||||
STM32_SYSCLK_FREQUENCY > 400000000)
|
||||
{
|
||||
/* Enable System configuration controller clock to Enable ODEN */
|
||||
|
||||
regval = getreg32(STM32_RCC_APB4ENR);
|
||||
regval |= RCC_APB4ENR_SYSCFGEN;
|
||||
putreg32(regval, STM32_RCC_APB4ENR);
|
||||
|
||||
/* Enable Overdrive to extend the clock frequency up to 480 Mhz. */
|
||||
|
||||
regval = getreg32(STM32_SYSCFG_PWRCR);
|
||||
regval |= SYSCFG_PWRCR_ODEN;
|
||||
putreg32(regval, STM32_SYSCFG_PWRCR);
|
||||
|
||||
while ((getreg32(STM32_PWR_D3CR) & STM32_PWR_D3CR_VOSRDY) == 0)
|
||||
{
|
||||
}
|
||||
}
|
||||
#endif
|
||||
|
||||
/* Configure FLASH wait states */
|
||||
|
||||
regval = FLASH_ACR_WRHIGHFREQ(BOARD_FLASH_PROGDELAY) |
|
||||
FLASH_ACR_LATENCY(BOARD_FLASH_WAITSTATES);
|
||||
|
||||
putreg32(regval, STM32_FLASH_ACR);
|
||||
|
||||
/* Select the PLL1P as system clock source */
|
||||
|
||||
regval = getreg32(STM32_RCC_CFGR);
|
||||
regval &= ~RCC_CFGR_SW_MASK;
|
||||
regval |= RCC_CFGR_SW_PLL1;
|
||||
putreg32(regval, STM32_RCC_CFGR);
|
||||
|
||||
/* Wait until the PLL source is used as the system clock source */
|
||||
|
||||
while ((getreg32(STM32_RCC_CFGR) & RCC_CFGR_SWS_MASK) !=
|
||||
RCC_CFGR_SWS_PLL1)
|
||||
{
|
||||
}
|
||||
|
||||
/* Configure I2C source clock */
|
||||
|
||||
#if defined(STM32_RCC_D2CCIP2R_I2C123SRC)
|
||||
regval = getreg32(STM32_RCC_D2CCIP2R);
|
||||
regval &= ~RCC_D2CCIP2R_I2C123SEL_MASK;
|
||||
regval |= STM32_RCC_D2CCIP2R_I2C123SRC;
|
||||
putreg32(regval, STM32_RCC_D2CCIP2R);
|
||||
#endif
|
||||
|
||||
#if defined(STM32_RCC_D3CCIPR_I2C4SRC)
|
||||
regval = getreg32(STM32_RCC_D3CCIPR);
|
||||
regval &= ~RCC_D3CCIPR_I2C4SEL_MASK;
|
||||
regval |= STM32_RCC_D3CCIPR_I2C4SRC;
|
||||
putreg32(regval, STM32_RCC_D3CCIPR);
|
||||
#endif
|
||||
|
||||
/* Configure SPI source clock */
|
||||
|
||||
#if defined(STM32_RCC_D2CCIP1R_SPI123SRC)
|
||||
regval = getreg32(STM32_RCC_D2CCIP1R);
|
||||
regval &= ~RCC_D2CCIP1R_SPI123SEL_MASK;
|
||||
regval |= STM32_RCC_D2CCIP1R_SPI123SRC;
|
||||
putreg32(regval, STM32_RCC_D2CCIP1R);
|
||||
#endif
|
||||
|
||||
#if defined(STM32_RCC_D2CCIP1R_SPI45SRC)
|
||||
regval = getreg32(STM32_RCC_D2CCIP1R);
|
||||
regval &= ~RCC_D2CCIP1R_SPI45SEL_MASK;
|
||||
regval |= STM32_RCC_D2CCIP1R_SPI45SRC;
|
||||
putreg32(regval, STM32_RCC_D2CCIP1R);
|
||||
#endif
|
||||
|
||||
#if defined(STM32_RCC_D3CCIPR_SPI6SRC)
|
||||
regval = getreg32(STM32_RCC_D3CCIPR);
|
||||
regval &= ~RCC_D3CCIPR_SPI6SEL_MASK;
|
||||
regval |= STM32_RCC_D3CCIPR_SPI6SRC;
|
||||
putreg32(regval, STM32_RCC_D3CCIPR);
|
||||
#endif
|
||||
|
||||
/* Configure USB source clock */
|
||||
|
||||
#if defined(STM32_RCC_D2CCIP2R_USBSRC)
|
||||
regval = getreg32(STM32_RCC_D2CCIP2R);
|
||||
regval &= ~RCC_D2CCIP2R_USBSEL_MASK;
|
||||
regval |= STM32_RCC_D2CCIP2R_USBSRC;
|
||||
putreg32(regval, STM32_RCC_D2CCIP2R);
|
||||
#endif
|
||||
|
||||
/* Configure ADC source clock */
|
||||
|
||||
#if defined(STM32_RCC_D3CCIPR_ADCSEL)
|
||||
regval = getreg32(STM32_RCC_D3CCIPR);
|
||||
regval &= ~RCC_D3CCIPR_ADCSEL_MASK;
|
||||
regval |= STM32_RCC_D3CCIPR_ADCSEL;
|
||||
putreg32(regval, STM32_RCC_D3CCIPR);
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_STM32H7_IWDG) || defined(CONFIG_STM32H7_RTC_LSICLOCK)
|
||||
/* Low speed internal clock source LSI */
|
||||
|
||||
stm32_rcc_enablelsi();
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_STM32H7_RTC_LSECLOCK)
|
||||
/* Low speed external clock source LSE
|
||||
*
|
||||
* TODO: There is another case where the LSE needs to
|
||||
* be enabled: if the MCO1 pin selects LSE as source.
|
||||
*/
|
||||
|
||||
stm32_rcc_enablelse();
|
||||
#endif
|
||||
}
|
||||
}
|
||||
#endif
|
||||
|
||||
/****************************************************************************
|
||||
* Name: rcc_enableperiphals
|
||||
****************************************************************************/
|
||||
|
||||
static inline void rcc_enableperipherals(void)
|
||||
{
|
||||
rcc_enableahb1();
|
||||
rcc_enableahb2();
|
||||
rcc_enableahb3();
|
||||
rcc_enableahb4();
|
||||
rcc_enableapb1();
|
||||
rcc_enableapb2();
|
||||
rcc_enableapb3();
|
||||
rcc_enableapb4();
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Public Functions
|
||||
****************************************************************************/
|
||||
@ -1584,6 +1584,17 @@ config ARCH_BOARD_STM32F769I_DISCO
|
||||
MCU. The STM32F769NIH6 is a 216MHz Cortex-M7 with 2048Kb Flash
|
||||
memory and 512Kb SRAM.
|
||||
|
||||
config ARCH_BOARD_STM32H747I_DISCO
|
||||
bool "STMicro STM32H747I-DISCO board"
|
||||
depends on ARCH_CHIP_STM32H747XI
|
||||
select ARCH_HAVE_LEDS
|
||||
select ARCH_HAVE_BUTTONS
|
||||
select ARCH_HAVE_IRQBUTTONS
|
||||
---help---
|
||||
STMicro STM32H747I-DISCO development board featuring the STM32H747XIH6
|
||||
MCU. The STM32H747XIH6 is a dual core (480MHz Cortex-M7, 240MHz Cortex-M4)
|
||||
with 2048Kb Flash memory and 1024Kb SRAM.
|
||||
|
||||
config ARCH_BOARD_STM32F746_WS
|
||||
bool "Waveshare STM32F746 board"
|
||||
depends on ARCH_CHIP_STM32F746IG
|
||||
@ -2111,6 +2122,7 @@ config ARCH_BOARD
|
||||
default "stm32f429i-disco" if ARCH_BOARD_STM32F429I_DISCO
|
||||
default "stm32f746g-disco" if ARCH_BOARD_STM32F746G_DISCO
|
||||
default "stm32f769i-disco" if ARCH_BOARD_STM32F769I_DISCO
|
||||
default "stm32h747i-disco" if ARCH_BOARD_STM32H747I_DISCO
|
||||
default "stm32f746-ws" if ARCH_BOARD_STM32F746_WS
|
||||
default "b-l072z-lrwan1" if ARCH_BOARD_B_L072Z_LRWAN1
|
||||
default "b-l475e-iot01a" if ARCH_BOARD_B_L475E_IOT01A
|
||||
@ -2434,6 +2446,9 @@ endif
|
||||
if ARCH_BOARD_STM32F769I_DISCO
|
||||
source "boards/arm/stm32f7/stm32f769i-disco/Kconfig"
|
||||
endif
|
||||
if ARCH_BOARD_STM32H747I_DISCO
|
||||
source "boards/arm/stm32h7/stm32h747i-disco/Kconfig"
|
||||
endif
|
||||
if ARCH_BOARD_NUCLEO_H743ZI
|
||||
source "boards/arm/stm32h7/nucleo-h743zi/Kconfig"
|
||||
endif
|
||||
|
||||
8
boards/arm/stm32h7/stm32h747i-disco/Kconfig
Normal file
8
boards/arm/stm32h7/stm32h747i-disco/Kconfig
Normal file
@ -0,0 +1,8 @@
|
||||
#
|
||||
# For a description of the syntax of this configuration file,
|
||||
# see the file kconfig-language.txt in the NuttX tools repository.
|
||||
#
|
||||
|
||||
if ARCH_BOARD_STM32H747I_DISCO
|
||||
|
||||
endif # ARCH_BOARD_STM32H747I_DISCO
|
||||
122
boards/arm/stm32h7/stm32h747i-disco/README.txt
Normal file
122
boards/arm/stm32h7/stm32h747i-disco/README.txt
Normal file
@ -0,0 +1,122 @@
|
||||
README
|
||||
======
|
||||
|
||||
This README discusses issues unique to NuttX configurations for the
|
||||
STMicro STM32H747I-DISCO development board featuring the STM32H747I
|
||||
MCU. The STM32H747I is a Cortex-M7 and -M4 dual core with 2MBytes Flash
|
||||
memory and 1MByte SRAM. The board features:
|
||||
|
||||
- On-board ST-Link v3E for programming and debugging,
|
||||
- 4 color user LEDs
|
||||
- One pushbuttons (user and reset)
|
||||
- Four-way joystick controller with select key
|
||||
- 32.768 kHz crystal oscillator
|
||||
- USB OTG HS with Micro-AB connectors
|
||||
- Ethernet connector compliant with IEEE-802.3-2002
|
||||
- Board connectors:
|
||||
- Camera
|
||||
- USB with Micro-AB
|
||||
- SWD
|
||||
- Ethernet RJ45
|
||||
- Arduino Uno V3
|
||||
- Pmod
|
||||
- STMod+
|
||||
|
||||
Refer to the http://www.st.com website for further information about this
|
||||
board (search keyword: STM32H747I-DISCO)
|
||||
|
||||
Contents
|
||||
========
|
||||
|
||||
- STATUS
|
||||
- Serial Console
|
||||
- Configurations
|
||||
|
||||
STATUS
|
||||
======
|
||||
|
||||
2019-11-16: This port is still incomplete!
|
||||
|
||||
Serial Console
|
||||
==============
|
||||
|
||||
1. Virtual Console.
|
||||
|
||||
The virtual console uses Serial Port 1 (USART1).
|
||||
|
||||
----------------- ---
|
||||
VCOM Signal Pin
|
||||
----------------- ---
|
||||
SERIAL_RX PA10
|
||||
SERIAL_TX PA9
|
||||
----------------- ---
|
||||
|
||||
These signals are internally connected to the on board ST-Link.
|
||||
|
||||
The virtual console is the default serial console in all
|
||||
configurations unless otherwise stated in the description of the
|
||||
configuration.
|
||||
|
||||
Configurations
|
||||
==============
|
||||
|
||||
Information Common to All Configurations
|
||||
----------------------------------------
|
||||
Each STM32H747I-DISCO configuration is maintained in a sub-directory and
|
||||
can be selected as follow:
|
||||
|
||||
tools/configure.sh [options] stm32h747i-disco:<subdir>
|
||||
|
||||
Where options should specify the host build platform (-l for Linux, -c for
|
||||
Cygwin under Windows, etc.). Try 'tools/configure.sh -h' for the complete
|
||||
list of options.
|
||||
|
||||
Before starting the build, make sure that (1) your PATH environment variable
|
||||
includes the correct path to your toolchain, and (2) you have the correct
|
||||
toolchain selected in the configuration.
|
||||
|
||||
And then build NuttX by simply typing the following. At the conclusion of
|
||||
the make, the nuttx binary will reside in an ELF file called, simply, nuttx.
|
||||
|
||||
make
|
||||
|
||||
The <subdir> that is provided above as an argument to the tools/configure.sh
|
||||
must be is one of the following.
|
||||
|
||||
NOTES:
|
||||
|
||||
1. These configurations use the mconf-based configuration tool. To
|
||||
change any of these configurations using that tool, you should:
|
||||
|
||||
a. Build and install the kconfig-mconf tool. See nuttx/README.txt
|
||||
see additional README.txt files in the NuttX tools repository.
|
||||
|
||||
b. Execute 'make menuconfig' in nuttx/ in order to start the
|
||||
reconfiguration process.
|
||||
|
||||
2. Unless stated otherwise, all configurations generate console
|
||||
output on the ST-Link VCOM, USART1.
|
||||
|
||||
3. Unless otherwise stated, the configurations are setup for Linux by
|
||||
default:
|
||||
|
||||
Build Setup:
|
||||
CONFIG_HOST_LINUX=y : Linux host operating system
|
||||
|
||||
4. All of these configurations use the general arm-none-eabi toolchain for
|
||||
Linux That toolchain selection can easily be reconfigured using 'make
|
||||
menuconfig'.
|
||||
|
||||
5. These configurations all assume that you are loading code using
|
||||
something like the ST-Link v3E JTAG. None of these configurations are
|
||||
setup to use the DFU bootloader but should be easily reconfigured to
|
||||
use that bootloader if so desired.
|
||||
|
||||
Configuration Sub-directories
|
||||
-----------------------------
|
||||
|
||||
nsh:
|
||||
|
||||
This configuration provides a basic NuttShell configuration (NSH)
|
||||
for the board. The default console is the VCOM on USART1.
|
||||
|
||||
58
boards/arm/stm32h7/stm32h747i-disco/configs/nsh/defconfig
Normal file
58
boards/arm/stm32h7/stm32h747i-disco/configs/nsh/defconfig
Normal file
@ -0,0 +1,58 @@
|
||||
#
|
||||
# This file is autogenerated: PLEASE DO NOT EDIT IT.
|
||||
#
|
||||
# You can use "make menuconfig" to make any modifications to the installed .config file.
|
||||
# You can then do "make savedefconfig" to generate a new defconfig file that includes your
|
||||
# modifications.
|
||||
#
|
||||
# CONFIG_NSH_DISABLE_IFCONFIG is not set
|
||||
# CONFIG_NSH_DISABLE_PS is not set
|
||||
# CONFIG_STANDARD_SERIAL is not set
|
||||
CONFIG_ARCH="arm"
|
||||
CONFIG_ARCH_BOARD="stm32h747i-disco"
|
||||
CONFIG_ARCH_BOARD_STM32H747I_DISCO=y
|
||||
CONFIG_ARCH_CHIP="stm32h7"
|
||||
CONFIG_ARCH_CHIP_STM32H747XI=y
|
||||
CONFIG_ARCH_CHIP_STM32H7=y
|
||||
CONFIG_ARCH_STACKDUMP=y
|
||||
CONFIG_ARMV7M_DCACHE=y
|
||||
CONFIG_ARMV7M_DCACHE_WRITETHROUGH=y
|
||||
CONFIG_ARMV7M_DTCM=y
|
||||
CONFIG_ARMV7M_ICACHE=y
|
||||
CONFIG_BOARD_LOOPSPERMSEC=43103
|
||||
CONFIG_BUILTIN=y
|
||||
CONFIG_DEBUG_SYMBOLS=y
|
||||
CONFIG_SYSTEM_NSH=y
|
||||
CONFIG_SYSTEM_NSH_CXXINITIALIZE=y
|
||||
CONFIG_EXPERIMENTAL=y
|
||||
CONFIG_HAVE_CXX=y
|
||||
CONFIG_HAVE_CXXINITIALIZE=y
|
||||
CONFIG_INTELHEX_BINARY=y
|
||||
CONFIG_MAX_TASKS=16
|
||||
CONFIG_MAX_WDOGPARMS=2
|
||||
CONFIG_MM_REGIONS=3
|
||||
CONFIG_NFILE_DESCRIPTORS=8
|
||||
CONFIG_NFILE_STREAMS=8
|
||||
CONFIG_NSH_BUILTIN_APPS=y
|
||||
CONFIG_NSH_FILEIOSIZE=512
|
||||
CONFIG_NSH_LINELEN=64
|
||||
CONFIG_NSH_READLINE=y
|
||||
CONFIG_PREALLOC_MQ_MSGS=4
|
||||
CONFIG_PREALLOC_TIMERS=4
|
||||
CONFIG_PREALLOC_WDOGS=4
|
||||
CONFIG_RAM_SIZE=245760
|
||||
CONFIG_RAM_START=0x20010000
|
||||
CONFIG_RAW_BINARY=y
|
||||
CONFIG_RR_INTERVAL=200
|
||||
CONFIG_SCHED_WAITPID=y
|
||||
CONFIG_SDCLONE_DISABLE=y
|
||||
CONFIG_SPI=y
|
||||
CONFIG_START_DAY=6
|
||||
CONFIG_START_MONTH=12
|
||||
CONFIG_START_YEAR=2011
|
||||
CONFIG_STM32H7_USART1=y
|
||||
CONFIG_SYSLOG_NONE=y
|
||||
CONFIG_TASK_NAME_SIZE=0
|
||||
CONFIG_USART1_SERIAL_CONSOLE=y
|
||||
CONFIG_USER_ENTRYPOINT="nsh_main"
|
||||
CONFIG_WDOG_INTRESERVE=0
|
||||
391
boards/arm/stm32h7/stm32h747i-disco/include/board.h
Normal file
391
boards/arm/stm32h7/stm32h747i-disco/include/board.h
Normal file
@ -0,0 +1,391 @@
|
||||
/****************************************************************************
|
||||
* boards/arm/stm32h7/stm32h747i-disco/include/board.h
|
||||
*
|
||||
* Copyright (C) 2018, 2019 Gregory Nutt. All rights reserved.
|
||||
* Authors: Gregory Nutt <gnutt@nuttx.org>
|
||||
* Simon Laube <simon@leitwert.ch>
|
||||
* Mateusz Szafoni <raiden00@railab.me>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in
|
||||
* the documentation and/or other materials provided with the
|
||||
* distribution.
|
||||
* 3. Neither the name NuttX nor the names of its contributors may be
|
||||
* used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
|
||||
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
|
||||
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
#ifndef __BOARDS_ARM_STM32H7_STM32H747I_DISCO_INCLUDE_BOARD_H
|
||||
#define __BOARDS_ARM_STM32H7_STM32H747I_DISCO_INCLUDE_BOARD_H
|
||||
|
||||
/****************************************************************************
|
||||
* Included Files
|
||||
****************************************************************************/
|
||||
|
||||
#include <nuttx/config.h>
|
||||
|
||||
#ifndef __ASSEMBLY__
|
||||
# include <stdint.h>
|
||||
#endif
|
||||
|
||||
/* Do not include STM32 H7 header files here */
|
||||
|
||||
/****************************************************************************
|
||||
* Pre-processor Definitions
|
||||
****************************************************************************/
|
||||
|
||||
/* Clocking *****************************************************************/
|
||||
|
||||
/* The board provides the following clock sources:
|
||||
*
|
||||
* X3: 32.768 KHz crystal for LSE
|
||||
* X2: 25 MHz HSE crystal oscillator
|
||||
*
|
||||
* So we have these clock source available within the STM32
|
||||
*
|
||||
* HSI: 16 MHz RC factory-trimmed
|
||||
* LSI: 32 KHz RC
|
||||
* HSE: 25 MHz oscillator X2
|
||||
* LSE: 32.768 kHz
|
||||
*/
|
||||
|
||||
#define STM32_HSI_FREQUENCY 16000000ul
|
||||
#define STM32_LSI_FREQUENCY 32000
|
||||
#define STM32_HSE_FREQUENCY 25000000ul
|
||||
#define STM32_LSE_FREQUENCY 32768
|
||||
|
||||
/* Main PLL Configuration.
|
||||
*
|
||||
* PLL source is HSE = 25,000,000
|
||||
*
|
||||
* When STM32_HSE_FREQUENCY / PLLM <= 2MHz VCOL must be selected. VCOH otherwise.
|
||||
*
|
||||
* PLL_VCOx = (STM32_HSE_FREQUENCY / PLLM) * PLLN
|
||||
* Subject to:
|
||||
*
|
||||
* 1 <= PLLM <= 63
|
||||
* 4 <= PLLN <= 512
|
||||
* 150 MHz <= PLL_VCOL <= 420MHz
|
||||
* 192 MHz <= PLL_VCOH <= 836MHz
|
||||
*
|
||||
* SYSCLK = PLL_VCO / PLLP
|
||||
* CPUCLK = SYSCLK / D1CPRE
|
||||
* Subject to
|
||||
*
|
||||
* PLLP1 = {2, 4, 6, 8, ..., 128}
|
||||
* PLLP2,3 = {2, 3, 4, ..., 128}
|
||||
* CPUCLK <= 400 MHz
|
||||
*/
|
||||
|
||||
#define STM32_BOARD_USEHSE
|
||||
#define STM32_HSEBYP_ENABLE
|
||||
|
||||
#define STM32_PLLCFG_PLLSRC RCC_PLLCKSELR_PLLSRC_HSE
|
||||
|
||||
/* PLL1, wide 4 - 8 MHz input, enable DIVP, DIVQ, DIVR
|
||||
*
|
||||
* PLL1_VCO = (25,000,000 / 5) * 160 = 800 MHz
|
||||
*
|
||||
* PLL1P = PLL1_VCO/2 = 800 MHz / 2 = 400 MHz
|
||||
* PLL1Q = PLL1_VCO/4 = 800 MHz / 4 = 200 MHz
|
||||
* PLL1R = PLL1_VCO/8 = 800 MHz / 8 = 100 MHz
|
||||
*/
|
||||
|
||||
#define STM32_PLLCFG_PLL1CFG (RCC_PLLCFGR_PLL1VCOSEL_WIDE | \
|
||||
RCC_PLLCFGR_PLL1RGE_4_8_MHZ | \
|
||||
RCC_PLLCFGR_DIVP1EN | \
|
||||
RCC_PLLCFGR_DIVQ1EN | \
|
||||
RCC_PLLCFGR_DIVR1EN)
|
||||
#define STM32_PLLCFG_PLL1M RCC_PLLCKSELR_DIVM1(5)
|
||||
#define STM32_PLLCFG_PLL1N RCC_PLL1DIVR_N1(160)
|
||||
#define STM32_PLLCFG_PLL1P RCC_PLL1DIVR_P1(2)
|
||||
#define STM32_PLLCFG_PLL1Q RCC_PLL1DIVR_Q1(4)
|
||||
#define STM32_PLLCFG_PLL1R RCC_PLL1DIVR_R1(8)
|
||||
|
||||
#define STM32_VCO1_FREQUENCY ((STM32_HSE_FREQUENCY / 5) * 160)
|
||||
#define STM32_PLL1P_FREQUENCY (STM32_VCO1_FREQUENCY / 2)
|
||||
#define STM32_PLL1Q_FREQUENCY (STM32_VCO1_FREQUENCY / 4)
|
||||
#define STM32_PLL1R_FREQUENCY (STM32_VCO1_FREQUENCY / 8)
|
||||
|
||||
/* PLL2 */
|
||||
|
||||
#define STM32_PLLCFG_PLL2CFG (RCC_PLLCFGR_PLL2VCOSEL_WIDE | \
|
||||
RCC_PLLCFGR_PLL2RGE_4_8_MHZ | \
|
||||
RCC_PLLCFGR_DIVP2EN)
|
||||
#define STM32_PLLCFG_PLL2M RCC_PLLCKSELR_DIVM2(5)
|
||||
#define STM32_PLLCFG_PLL2N RCC_PLL2DIVR_N2(160)
|
||||
#define STM32_PLLCFG_PLL2P RCC_PLL2DIVR_P2(2)
|
||||
#define STM32_PLLCFG_PLL2Q 4
|
||||
#define STM32_PLLCFG_PLL2R 4
|
||||
|
||||
#define STM32_VCO2_FREQUENCY ((STM32_HSE_FREQUENCY / 5) * 160)
|
||||
#define STM32_PLL2P_FREQUENCY (STM32_VCO2_FREQUENCY / 2)
|
||||
#define STM32_PLL2Q_FREQUENCY
|
||||
#define STM32_PLL2R_FREQUENCY
|
||||
|
||||
/* PLL3 */
|
||||
|
||||
#define STM32_PLLCFG_PLL3CFG 0
|
||||
#define STM32_PLLCFG_PLL3M 0
|
||||
#define STM32_PLLCFG_PLL3N 0
|
||||
#define STM32_PLLCFG_PLL3P 0
|
||||
#define STM32_PLLCFG_PLL3Q 0
|
||||
#define STM32_PLLCFG_PLL3R 0
|
||||
|
||||
#define STM32_VCO3_FREQUENCY
|
||||
#define STM32_PLL3P_FREQUENCY
|
||||
#define STM32_PLL3Q_FREQUENCY
|
||||
#define STM32_PLL3R_FREQUENCY
|
||||
|
||||
/* SYSCLK = PLL1P = 400 MHz
|
||||
* CPUCLK = SYSCLK / 1 = 400 MHz
|
||||
*/
|
||||
|
||||
#define STM32_RCC_D1CFGR_D1CPRE (RCC_D1CFGR_D1CPRE_SYSCLK)
|
||||
#define STM32_SYSCLK_FREQUENCY (STM32_PLL1P_FREQUENCY)
|
||||
#define STM32_CPUCLK_FREQUENCY (STM32_SYSCLK_FREQUENCY / 1)
|
||||
|
||||
/* Configure Clock Assignments */
|
||||
|
||||
/* AHB clock (HCLK) is SYSCLK/2 (200 MHz max)
|
||||
* HCLK1 = HCLK2 = HCLK3 = HCLK4
|
||||
*/
|
||||
|
||||
#define STM32_RCC_D1CFGR_HPRE RCC_D1CFGR_HPRE_SYSCLKd2 /* HCLK = SYSCLK / 2 */
|
||||
#define STM32_ACLK_FREQUENCY (STM32_CPUCLK_FREQUENCY / 2) /* ACLK in D1, HCLK3 in D1 */
|
||||
#define STM32_HCLK_FREQUENCY (STM32_CPUCLK_FREQUENCY / 2) /* HCLK in D2, HCLK4 in D3 */
|
||||
#define STM32_BOARD_HCLK STM32_HCLK_FREQUENCY /* same as above, to satisfy compiler */
|
||||
|
||||
/* APB1 clock (PCLK1) is HCLK/4 (54 MHz) */
|
||||
|
||||
#define STM32_RCC_D2CFGR_D2PPRE1 RCC_D2CFGR_D2PPRE1_HCLKd2 /* PCLK1 = HCLK / 4 */
|
||||
#define STM32_PCLK1_FREQUENCY (STM32_HCLK_FREQUENCY/2)
|
||||
|
||||
/* APB2 clock (PCLK2) is HCLK/4 (54 MHz) */
|
||||
|
||||
#define STM32_RCC_D2CFGR_D2PPRE2 RCC_D2CFGR_D2PPRE2_HCLKd2 /* PCLK2 = HCLK / 4 */
|
||||
#define STM32_PCLK2_FREQUENCY (STM32_HCLK_FREQUENCY/2)
|
||||
|
||||
/* APB3 clock (PCLK3) is HCLK/4 (54 MHz) */
|
||||
|
||||
#define STM32_RCC_D1CFGR_D1PPRE RCC_D1CFGR_D1PPRE_HCLKd2 /* PCLK3 = HCLK / 4 */
|
||||
#define STM32_PCLK3_FREQUENCY (STM32_HCLK_FREQUENCY/2)
|
||||
|
||||
/* APB4 clock (PCLK4) is HCLK/4 (54 MHz) */
|
||||
|
||||
#define STM32_RCC_D3CFGR_D3PPRE RCC_D3CFGR_D3PPRE_HCLKd2 /* PCLK4 = HCLK / 4 */
|
||||
#define STM32_PCLK4_FREQUENCY (STM32_HCLK_FREQUENCY/4)
|
||||
|
||||
/* Timer clock frequencies */
|
||||
|
||||
/* Timers driven from APB1 will be twice PCLK1 */
|
||||
|
||||
#define STM32_APB1_TIM2_CLKIN (2*STM32_PCLK1_FREQUENCY)
|
||||
#define STM32_APB1_TIM3_CLKIN (2*STM32_PCLK1_FREQUENCY)
|
||||
#define STM32_APB1_TIM4_CLKIN (2*STM32_PCLK1_FREQUENCY)
|
||||
#define STM32_APB1_TIM5_CLKIN (2*STM32_PCLK1_FREQUENCY)
|
||||
#define STM32_APB1_TIM6_CLKIN (2*STM32_PCLK1_FREQUENCY)
|
||||
#define STM32_APB1_TIM7_CLKIN (2*STM32_PCLK1_FREQUENCY)
|
||||
#define STM32_APB1_TIM12_CLKIN (2*STM32_PCLK1_FREQUENCY)
|
||||
#define STM32_APB1_TIM13_CLKIN (2*STM32_PCLK1_FREQUENCY)
|
||||
#define STM32_APB1_TIM14_CLKIN (2*STM32_PCLK1_FREQUENCY)
|
||||
|
||||
/* Timers driven from APB2 will be twice PCLK2 */
|
||||
|
||||
#define STM32_APB2_TIM1_CLKIN (2*STM32_PCLK2_FREQUENCY)
|
||||
#define STM32_APB2_TIM8_CLKIN (2*STM32_PCLK2_FREQUENCY)
|
||||
#define STM32_APB2_TIM15_CLKIN (2*STM32_PCLK2_FREQUENCY)
|
||||
#define STM32_APB2_TIM16_CLKIN (2*STM32_PCLK2_FREQUENCY)
|
||||
#define STM32_APB2_TIM17_CLKIN (2*STM32_PCLK2_FREQUENCY)
|
||||
|
||||
/* Kernel Clock Configuration
|
||||
*
|
||||
* Note: look at Table 54 in ST Manual
|
||||
*/
|
||||
|
||||
/* I2C123 clock source - HSI */
|
||||
|
||||
#define STM32_RCC_D2CCIP2R_I2C123SRC RCC_D2CCIP2R_I2C123SEL_HSI
|
||||
|
||||
/* I2C4 clock source - HSI */
|
||||
|
||||
#define STM32_RCC_D3CCIPR_I2C4SRC RCC_D3CCIPR_I2C4SEL_HSI
|
||||
|
||||
/* SPI123 clock source - PLL1Q */
|
||||
|
||||
#define STM32_RCC_D2CCIP1R_SPI123SRC RCC_D2CCIP1R_SPI123SEL_PLL1
|
||||
|
||||
/* SPI45 clock source - APB (PCLK2?) */
|
||||
|
||||
#define STM32_RCC_D2CCIP1R_SPI45SRC RCC_D2CCIP1R_SPI45SEL_APB
|
||||
|
||||
/* SPI6 clock source - APB (PCLK4) */
|
||||
|
||||
#define STM32_RCC_D3CCIPR_SPI6SRC RCC_D3CCIPR_SPI6SEL_PCLK4
|
||||
|
||||
/* USB 1 and 2 clock source - HSI48 */
|
||||
|
||||
#define STM32_RCC_D2CCIP2R_USBSRC RCC_D2CCIP2R_USBSEL_HSI48
|
||||
|
||||
/* ADC 1 2 3 clock source - pll2_pclk */
|
||||
|
||||
#define STM32_RCC_D3CCIPR_ADCSEL RCC_D3CCIPR_ADCSEL_PLL2
|
||||
|
||||
/* FLASH wait states
|
||||
*
|
||||
* ------------ ---------- -----------
|
||||
* Vcore MAX ACLK WAIT STATES
|
||||
* ------------ ---------- -----------
|
||||
* 1.15-1.26 V 70 MHz 0
|
||||
* (VOS1 level) 140 MHz 1
|
||||
* 210 MHz 2
|
||||
* 1.05-1.15 V 55 MHz 0
|
||||
* (VOS2 level) 110 MHz 1
|
||||
* 165 MHz 2
|
||||
* 220 MHz 3
|
||||
* 0.95-1.05 V 45 MHz 0
|
||||
* (VOS3 level) 90 MHz 1
|
||||
* 135 MHz 2
|
||||
* 180 MHz 3
|
||||
* 225 MHz 4
|
||||
* ------------ ---------- -----------
|
||||
*/
|
||||
|
||||
#define BOARD_FLASH_WAITSTATES 4
|
||||
|
||||
/* SDMMC definitions ********************************************************/
|
||||
|
||||
/* Init 400kHz, PLL1Q/(2*250) */
|
||||
|
||||
#define STM32_SDMMC_INIT_CLKDIV (250 << STM32_SDMMC_CLKCR_CLKDIV_SHIFT)
|
||||
|
||||
/* Just set these to 25 MHz for now, PLL1Q/(2*4), for default speed 12.5MB/s */
|
||||
|
||||
#define STM32_SDMMC_MMCXFR_CLKDIV (4 << STM32_SDMMC_CLKCR_CLKDIV_SHIFT)
|
||||
#define STM32_SDMMC_SDXFR_CLKDIV (4 << STM32_SDMMC_CLKCR_CLKDIV_SHIFT)
|
||||
|
||||
#define STM32_SDMMC_CLKCR_EDGE STM32_SDMMC_CLKCR_NEGEDGE
|
||||
|
||||
/* Ethernet definitions *****************************************************/
|
||||
|
||||
/* LED definitions **********************************************************/
|
||||
|
||||
/* The board has 4 user LEDs.
|
||||
* LD1 Green PI12
|
||||
* LD2 Orange PI13
|
||||
* LD3 Red PI14
|
||||
* LD4 Blue PI15
|
||||
*
|
||||
* If CONFIG_ARCH_LEDS is not defined, then the user can control the LEDs in any way.
|
||||
* The following definitions are used to access individual LEDs.
|
||||
*/
|
||||
|
||||
/* LED index values for use with board_userled() */
|
||||
|
||||
#define BOARD_LED1 0
|
||||
#define BOARD_LED2 1
|
||||
#define BOARD_LED3 2
|
||||
#define BOARD_LED4 2
|
||||
#define BOARD_NLEDS 4
|
||||
|
||||
#define BOARD_LED_GREEN BOARD_LED1
|
||||
#define BOARD_LED_ORANGE BOARD_LED2
|
||||
#define BOARD_LED_RED BOARD_LED3
|
||||
#define BOARD_LED_BLUE BOARD_LED4
|
||||
|
||||
/* LED bits for use with board_userled_all() */
|
||||
|
||||
#define BOARD_LED1_BIT (1 << BOARD_LED1)
|
||||
#define BOARD_LED2_BIT (1 << BOARD_LED2)
|
||||
#define BOARD_LED3_BIT (1 << BOARD_LED3)
|
||||
#define BOARD_LED4_BIT (1 << BOARD_LED4)
|
||||
|
||||
/* If CONFIG_ARCH_LEDS is defined, the usage by the board port is defined in
|
||||
* include/board.h and src/stm32_leds.c. The LEDs are used to encode OS-related
|
||||
* events as follows:
|
||||
*
|
||||
*
|
||||
* SYMBOL Meaning LED state
|
||||
* Red Green Blue
|
||||
* ---------------------- -------------------------- ------ ------ ---- */
|
||||
|
||||
#define LED_STARTED 0 /* NuttX has been started OFF OFF OFF */
|
||||
#define LED_HEAPALLOCATE 1 /* Heap has been allocated OFF OFF ON */
|
||||
#define LED_IRQSENABLED 2 /* Interrupts enabled OFF ON OFF */
|
||||
#define LED_STACKCREATED 3 /* Idle stack created OFF ON ON */
|
||||
#define LED_INIRQ 4 /* In an interrupt N/C N/C GLOW */
|
||||
#define LED_SIGNAL 5 /* In a signal handler N/C GLOW N/C */
|
||||
#define LED_ASSERTION 6 /* An assertion failed GLOW N/C GLOW */
|
||||
#define LED_PANIC 7 /* The system has crashed Blink OFF N/C */
|
||||
#define LED_IDLE 8 /* MCU is in sleep mode ON OFF OFF */
|
||||
|
||||
/* Thus if the Green LED is statically on, NuttX has successfully booted and
|
||||
* is, apparently, running normally. If the Red LED is flashing at
|
||||
* approximately 2Hz, then a fatal error has been detected and the system
|
||||
* has halted.
|
||||
*/
|
||||
|
||||
/* Button definitions *******************************************************/
|
||||
|
||||
/* Alternate function pin selections ****************************************/
|
||||
|
||||
/* USART1 ( Console) */
|
||||
|
||||
#define GPIO_USART1_RX GPIO_USART1_RX_2 /* PA10 */
|
||||
#define GPIO_USART1_TX GPIO_USART1_TX_2 /* PA9 */
|
||||
|
||||
/* UART4 ( PMOD/STMOD )*/
|
||||
|
||||
#define GPIO_UART4_CTS GPIO_UART4_CTS_2 /* PB15 */
|
||||
#define GPIO_UART4_RTS GPIO_UART4_RTS_2 /* PB14 */
|
||||
#define GPIO_UART4_RX GPIO_UART4_RX_1 /* PA11 */
|
||||
#define GPIO_UART4_TX GPIO_UART4_TX_1 /* PA12 */
|
||||
#define GPIO_UART4_SHUTD (GPIO_OUTPUT | GPIO_PUSHPULL | GPIO_SPEED_50MHz | GPIO_OUTPUT_CLEAR | \
|
||||
GPIO_PORTJ | GPIO_PIN13)
|
||||
|
||||
/****************************************************************************
|
||||
* Public Data
|
||||
****************************************************************************/
|
||||
|
||||
#ifndef __ASSEMBLY__
|
||||
|
||||
#undef EXTERN
|
||||
#if defined(__cplusplus)
|
||||
#define EXTERN extern "C"
|
||||
extern "C"
|
||||
{
|
||||
#else
|
||||
#define EXTERN extern
|
||||
#endif
|
||||
|
||||
/****************************************************************************
|
||||
* Public Function Prototypes
|
||||
****************************************************************************/
|
||||
|
||||
#undef EXTERN
|
||||
#if defined(__cplusplus)
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __ASSEMBLY__ */
|
||||
#endif /* __BOARDS_ARM_STM32H7_STM32H747I_DISCO_INCLUDE_BOARD_H */
|
||||
2
boards/arm/stm32h7/stm32h747i-disco/kernel/.gitignore
vendored
Normal file
2
boards/arm/stm32h7/stm32h747i-disco/kernel/.gitignore
vendored
Normal file
@ -0,0 +1,2 @@
|
||||
/nuttx_user.elf
|
||||
|
||||
122
boards/arm/stm32h7/stm32h747i-disco/kernel/Makefile
Normal file
122
boards/arm/stm32h7/stm32h747i-disco/kernel/Makefile
Normal file
@ -0,0 +1,122 @@
|
||||
############################################################################
|
||||
# boards/arm/stm32h7/stm32h747i-disco/kernel/Makefile
|
||||
#
|
||||
# Copyright (C) 2019 Gregory Nutt. All rights reserved.
|
||||
# Author: Gregory Nutt <gnutt@nuttx.org>
|
||||
#
|
||||
# Redistribution and use in source and binary forms, with or without
|
||||
# modification, are permitted provided that the following conditions
|
||||
# are met:
|
||||
#
|
||||
# 1. Redistributions of source code must retain the above copyright
|
||||
# notice, this list of conditions and the following disclaimer.
|
||||
# 2. Redistributions in binary form must reproduce the above copyright
|
||||
# notice, this list of conditions and the following disclaimer in
|
||||
# the documentation and/or other materials provided with the
|
||||
# distribution.
|
||||
# 3. Neither the name NuttX nor the names of its contributors may be
|
||||
# used to endorse or promote products derived from this software
|
||||
# without specific prior written permission.
|
||||
#
|
||||
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||
# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
|
||||
# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
|
||||
# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
# POSSIBILITY OF SUCH DAMAGE.
|
||||
#
|
||||
############################################################################
|
||||
|
||||
-include $(TOPDIR)/Make.defs
|
||||
|
||||
# This is the directory for the board-specific header files
|
||||
|
||||
BOARD_INCLUDE = $(TOPDIR)$(DELIM)boards$(DELIM)$(CONFIG_ARCH)$(DELIM)$(CONFIG_ARCH_CHIP)$(DELIM)$(CONFIG_ARCH_BOARD)$(DELIM)include
|
||||
|
||||
# The entry point name (if none is provided in the .config file)
|
||||
|
||||
CONFIG_USER_ENTRYPOINT ?= user_start
|
||||
ENTRYPT = $(patsubst "%",%,$(CONFIG_USER_ENTRYPOINT))
|
||||
|
||||
# Get the paths to the libraries and the links script path in format that
|
||||
# is appropriate for the host OS
|
||||
|
||||
ifeq ($(WINTOOL),y)
|
||||
# Windows-native toolchains
|
||||
USER_LIBPATHS = ${shell for path in $(USERLIBS); do dir=`dirname $(TOPDIR)$(DELIM)$$path`;echo "-L\"`cygpath -w $$dir`\"";done}
|
||||
USER_LDSCRIPT = -T "${shell cygpath -w $(TOPDIR)$(DELIM)boards$(DELIM)$(CONFIG_ARCH)$(DELIM)$(CONFIG_ARCH_CHIP)$(DELIM)$(CONFIG_ARCH_BOARD)$(DELIM)scripts$(DELIM)memory.ld}"
|
||||
USER_LDSCRIPT += -T "${shell cygpath -w $(TOPDIR)$(DELIM)boards$(DELIM)$(CONFIG_ARCH)$(DELIM)$(CONFIG_ARCH_CHIP)$(DELIM)$(CONFIG_ARCH_BOARD)$(DELIM)scripts$(DELIM)user-space.ld}"
|
||||
USER_HEXFILE += "${shell cygpath -w $(TOPDIR)$(DELIM)nuttx_user.hex}"
|
||||
USER_SRECFILE += "${shell cygpath -w $(TOPDIR)$(DELIM)nuttx_user.srec}"
|
||||
USER_BINFILE += "${shell cygpath -w $(TOPDIR)$(DELIM)nuttx_user.bin}"
|
||||
else
|
||||
# Linux/Cygwin-native toolchain
|
||||
USER_LIBPATHS = $(addprefix -L$(TOPDIR)$(DELIM),$(dir $(USERLIBS)))
|
||||
USER_LDSCRIPT = -T$(TOPDIR)$(DELIM)boards$(DELIM)$(CONFIG_ARCH)$(DELIM)$(CONFIG_ARCH_CHIP)$(DELIM)$(CONFIG_ARCH_BOARD)$(DELIM)scripts$(DELIM)memory.ld
|
||||
USER_LDSCRIPT += -T$(TOPDIR)$(DELIM)boards$(DELIM)$(CONFIG_ARCH)$(DELIM)$(CONFIG_ARCH_CHIP)$(DELIM)$(CONFIG_ARCH_BOARD)$(DELIM)scripts$(DELIM)user-space.ld
|
||||
USER_HEXFILE += "$(TOPDIR)$(DELIM)nuttx_user.hex"
|
||||
USER_SRECFILE += "$(TOPDIR)$(DELIM)nuttx_user.srec"
|
||||
USER_BINFILE += "$(TOPDIR)$(DELIM)nuttx_user.bin"
|
||||
endif
|
||||
|
||||
USER_LDFLAGS = --undefined=$(ENTRYPT) --entry=$(ENTRYPT) $(USER_LDSCRIPT)
|
||||
USER_LDLIBS = $(patsubst lib%,-l%,$(basename $(notdir $(USERLIBS))))
|
||||
USER_LIBGCC = "${shell "$(CC)" $(ARCHCPUFLAGS) -print-libgcc-file-name}"
|
||||
|
||||
# Source files
|
||||
|
||||
CSRCS = stm32_userspace.c
|
||||
COBJS = $(CSRCS:.c=$(OBJEXT))
|
||||
OBJS = $(COBJS)
|
||||
|
||||
# Targets:
|
||||
|
||||
all: $(TOPDIR)$(DELIM)nuttx_user.elf $(TOPDIR)$(DELIM)User.map
|
||||
.PHONY: nuttx_user.elf depend clean distclean
|
||||
|
||||
$(COBJS): %$(OBJEXT): %.c
|
||||
$(call COMPILE, $<, $@)
|
||||
|
||||
# Create the nuttx_user.elf file containing all of the user-mode code
|
||||
|
||||
nuttx_user.elf: $(OBJS)
|
||||
$(Q) $(LD) -o $@ $(USER_LDFLAGS) $(USER_LIBPATHS) $(OBJS) --start-group $(USER_LDLIBS) --end-group $(USER_LIBGCC)
|
||||
|
||||
$(TOPDIR)$(DELIM)nuttx_user.elf: nuttx_user.elf
|
||||
@echo "LD: nuttx_user.elf"
|
||||
$(Q) cp -a nuttx_user.elf $(TOPDIR)$(DELIM)nuttx_user.elf
|
||||
ifeq ($(CONFIG_INTELHEX_BINARY),y)
|
||||
@echo "CP: nuttx_user.hex"
|
||||
$(Q) $(OBJCOPY) $(OBJCOPYARGS) -O ihex nuttx_user.elf $(USER_HEXFILE)
|
||||
endif
|
||||
ifeq ($(CONFIG_MOTOROLA_SREC),y)
|
||||
@echo "CP: nuttx_user.srec"
|
||||
$(Q) $(OBJCOPY) $(OBJCOPYARGS) -O srec nuttx_user.elf $(USER_SRECFILE)
|
||||
endif
|
||||
ifeq ($(CONFIG_RAW_BINARY),y)
|
||||
@echo "CP: nuttx_user.bin"
|
||||
$(Q) $(OBJCOPY) $(OBJCOPYARGS) -O binary nuttx_user.elf $(USER_BINFILE)
|
||||
endif
|
||||
|
||||
$(TOPDIR)$(DELIM)User.map: nuttx_user.elf
|
||||
@echo "MK: User.map"
|
||||
$(Q) $(NM) nuttx_user.elf >$(TOPDIR)$(DELIM)User.map
|
||||
$(Q) $(CROSSDEV)size nuttx_user.elf
|
||||
|
||||
.depend:
|
||||
|
||||
depend: .depend
|
||||
|
||||
clean:
|
||||
$(call DELFILE, nuttx_user.elf)
|
||||
$(call DELFILE, "$(TOPDIR)$(DELIM)nuttx_user.*")
|
||||
$(call DELFILE, "$(TOPDIR)$(DELIM)User.map")
|
||||
$(call CLEAN)
|
||||
|
||||
distclean: clean
|
||||
132
boards/arm/stm32h7/stm32h747i-disco/kernel/stm32_userspace.c
Normal file
132
boards/arm/stm32h7/stm32h747i-disco/kernel/stm32_userspace.c
Normal file
@ -0,0 +1,132 @@
|
||||
/****************************************************************************
|
||||
* boards/arm/stm32h7/stm32h747i-disco/kernel/stm32_userspace.c
|
||||
*
|
||||
* Copyright (C) 2019 Gregory Nutt. All rights reserved.
|
||||
* Author: Gregory Nutt <gnutt@nuttx.org>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in
|
||||
* the documentation and/or other materials provided with the
|
||||
* distribution.
|
||||
* 3. Neither the name NuttX nor the names of its contributors may be
|
||||
* used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
|
||||
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
|
||||
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Included Files
|
||||
****************************************************************************/
|
||||
|
||||
#include <nuttx/config.h>
|
||||
|
||||
#include <stdlib.h>
|
||||
|
||||
#include <nuttx/arch.h>
|
||||
#include <nuttx/mm/mm.h>
|
||||
#include <nuttx/wqueue.h>
|
||||
#include <nuttx/userspace.h>
|
||||
|
||||
#if defined(CONFIG_BUILD_PROTECTED) && !defined(__KERNEL__)
|
||||
|
||||
/****************************************************************************
|
||||
* Pre-processor Definitions
|
||||
****************************************************************************/
|
||||
|
||||
/* Configuration ************************************************************/
|
||||
|
||||
#ifndef CONFIG_NUTTX_USERSPACE
|
||||
# error "CONFIG_NUTTX_USERSPACE not defined"
|
||||
#endif
|
||||
|
||||
#if CONFIG_NUTTX_USERSPACE != 0x08020000
|
||||
# error "CONFIG_NUTTX_USERSPACE must be 0x08020000 to match memory.ld"
|
||||
#endif
|
||||
|
||||
/****************************************************************************
|
||||
* Public Data
|
||||
****************************************************************************/
|
||||
|
||||
/* These 'addresses' of these values are setup by the linker script. They are
|
||||
* not actual uint32_t storage locations! They are only used meaningfully in the
|
||||
* following way:
|
||||
*
|
||||
* - The linker script defines, for example, the symbol_sdata.
|
||||
* - The declaration extern uint32_t _sdata; makes C happy. C will believe
|
||||
* that the value _sdata is the address of a uint32_t variable _data (it is
|
||||
* not!).
|
||||
* - We can recover the linker value then by simply taking the address of
|
||||
* of _data. like: uint32_t *pdata = &_sdata;
|
||||
*/
|
||||
|
||||
extern uint32_t _stext; /* Start of .text */
|
||||
extern uint32_t _etext; /* End_1 of .text + .rodata */
|
||||
extern const uint32_t _eronly; /* End+1 of read only section (.text + .rodata) */
|
||||
extern uint32_t _sdata; /* Start of .data */
|
||||
extern uint32_t _edata; /* End+1 of .data */
|
||||
extern uint32_t _sbss; /* Start of .bss */
|
||||
extern uint32_t _ebss; /* End+1 of .bss */
|
||||
|
||||
/* This is the user space entry point */
|
||||
|
||||
int CONFIG_USER_ENTRYPOINT(int argc, char *argv[]);
|
||||
|
||||
const struct userspace_s userspace __attribute__ ((section (".userspace"))) =
|
||||
{
|
||||
/* General memory map */
|
||||
|
||||
.us_entrypoint = (main_t)CONFIG_USER_ENTRYPOINT,
|
||||
.us_textstart = (uintptr_t)&_stext,
|
||||
.us_textend = (uintptr_t)&_etext,
|
||||
.us_datasource = (uintptr_t)&_eronly,
|
||||
.us_datastart = (uintptr_t)&_sdata,
|
||||
.us_dataend = (uintptr_t)&_edata,
|
||||
.us_bssstart = (uintptr_t)&_sbss,
|
||||
.us_bssend = (uintptr_t)&_ebss,
|
||||
|
||||
/* Memory manager heap structure */
|
||||
|
||||
.us_heap = &g_mmheap,
|
||||
|
||||
/* Task/thread startup routines */
|
||||
|
||||
.task_startup = task_startup,
|
||||
#ifndef CONFIG_DISABLE_PTHREAD
|
||||
.pthread_startup = pthread_startup,
|
||||
#endif
|
||||
|
||||
/* Signal handler trampoline */
|
||||
|
||||
.signal_handler = up_signal_handler,
|
||||
|
||||
/* User-space work queue support (declared in include/nuttx/wqueue.h) */
|
||||
|
||||
#ifdef CONFIG_LIB_USRWORK
|
||||
.work_usrstart = work_usrstart,
|
||||
#endif
|
||||
};
|
||||
|
||||
/****************************************************************************
|
||||
* Public Functions
|
||||
****************************************************************************/
|
||||
|
||||
#endif /* CONFIG_BUILD_PROTECTED && !__KERNEL__ */
|
||||
112
boards/arm/stm32h7/stm32h747i-disco/scripts/Make.defs
Normal file
112
boards/arm/stm32h7/stm32h747i-disco/scripts/Make.defs
Normal file
@ -0,0 +1,112 @@
|
||||
############################################################################
|
||||
# boards/arm/stm32h7/stm32h747i-disco/scripts/Make.defs
|
||||
#
|
||||
# Copyright (C) 2018 Gregory Nutt. All rights reserved.
|
||||
# Author: Gregory Nutt <gnutt@nuttx.org>
|
||||
#
|
||||
# Redistribution and use in source and binary forms, with or without
|
||||
# modification, are permitted provided that the following conditions
|
||||
# are met:
|
||||
#
|
||||
# 1. Redistributions of source code must retain the above copyright
|
||||
# notice, this list of conditions and the following disclaimer.
|
||||
# 2. Redistributions in binary form must reproduce the above copyright
|
||||
# notice, this list of conditions and the following disclaimer in
|
||||
# the documentation and/or other materials provided with the
|
||||
# distribution.
|
||||
# 3. Neither the name NuttX nor the names of its contributors may be
|
||||
# used to endorse or promote products derived from this software
|
||||
# without specific prior written permission.
|
||||
#
|
||||
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||
# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
|
||||
# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
|
||||
# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
# POSSIBILITY OF SUCH DAMAGE.
|
||||
#
|
||||
############################################################################
|
||||
|
||||
include ${TOPDIR}/.config
|
||||
include ${TOPDIR}/tools/Config.mk
|
||||
include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs
|
||||
|
||||
LDSCRIPT = flash.ld
|
||||
|
||||
ifeq ($(WINTOOL),y)
|
||||
# Windows-native toolchains
|
||||
DIRLINK = $(TOPDIR)/tools/copydir.sh
|
||||
DIRUNLINK = $(TOPDIR)/tools/unlink.sh
|
||||
MKDEP = $(TOPDIR)/tools/mkwindeps.sh
|
||||
ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}"
|
||||
ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}"
|
||||
ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/boards/$(CONFIG_ARCH)/$(CONFIG_ARCH_CHIP)/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)}"
|
||||
else
|
||||
# Linux/Cygwin-native toolchain
|
||||
MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT)
|
||||
ARCHINCLUDES = -I. -isystem $(TOPDIR)/include
|
||||
ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx
|
||||
ARCHSCRIPT = -T$(TOPDIR)/boards/$(CONFIG_ARCH)/$(CONFIG_ARCH_CHIP)/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)
|
||||
endif
|
||||
|
||||
CC = $(CROSSDEV)gcc
|
||||
CXX = $(CROSSDEV)g++
|
||||
CPP = $(CROSSDEV)gcc -E
|
||||
LD = $(CROSSDEV)ld
|
||||
AR = $(ARCROSSDEV)ar rcs
|
||||
NM = $(ARCROSSDEV)nm
|
||||
OBJCOPY = $(CROSSDEV)objcopy
|
||||
OBJDUMP = $(CROSSDEV)objdump
|
||||
|
||||
ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'}
|
||||
ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1}
|
||||
|
||||
ifeq ($(CONFIG_DEBUG_SYMBOLS),y)
|
||||
ARCHOPTIMIZATION = -g
|
||||
endif
|
||||
|
||||
ifneq ($(CONFIG_DEBUG_NOOPT),y)
|
||||
ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer
|
||||
endif
|
||||
|
||||
ARCHCFLAGS = -fno-builtin
|
||||
ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti
|
||||
ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
|
||||
ARCHWARNINGSXX = -Wall -Wshadow -Wundef
|
||||
ARCHDEFINES =
|
||||
ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10
|
||||
|
||||
CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe
|
||||
CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS)
|
||||
CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe
|
||||
CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS)
|
||||
CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES)
|
||||
AFLAGS = $(CFLAGS) -D__ASSEMBLY__
|
||||
|
||||
NXFLATLDFLAGS1 = -r -d -warn-common
|
||||
NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections
|
||||
LDNXFLATFLAGS = -e main -s 2048
|
||||
|
||||
ASMEXT = .S
|
||||
OBJEXT = .o
|
||||
LIBEXT = .a
|
||||
EXEEXT =
|
||||
|
||||
ifneq ($(CROSSDEV),arm-nuttx-elf-)
|
||||
LDFLAGS += -nostartfiles -nodefaultlibs
|
||||
endif
|
||||
ifeq ($(CONFIG_DEBUG_SYMBOLS),y)
|
||||
LDFLAGS += -g
|
||||
endif
|
||||
|
||||
|
||||
HOSTCC = gcc
|
||||
HOSTINCLUDES = -I.
|
||||
HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe
|
||||
HOSTLDFLAGS =
|
||||
200
boards/arm/stm32h7/stm32h747i-disco/scripts/flash.ld
Normal file
200
boards/arm/stm32h7/stm32h747i-disco/scripts/flash.ld
Normal file
@ -0,0 +1,200 @@
|
||||
/****************************************************************************
|
||||
* boards/arm/stm32h7/stm32h747i-disco/scripts/flash.ld
|
||||
*
|
||||
* Copyright (C) 2018 Gregory Nutt. All rights reserved.
|
||||
* Author: Gregory Nutt <gnutt@nuttx.org>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in
|
||||
* the documentation and/or other materials provided with the
|
||||
* distribution.
|
||||
* 3. Neither the name NuttX nor the names of its contributors may be
|
||||
* used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
|
||||
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
|
||||
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
/* The STM32H747XI has 2048Kb of main FLASH memory. The flash memory is
|
||||
* partitioned into a User Flash memory and a System Flash memory. Each
|
||||
* of these memories has two banks:
|
||||
*
|
||||
* 1) User Flash memory:
|
||||
*
|
||||
* Bank 1: Start address 0x0800:0000 to 0x080F:FFFF with 8 sectors, 128Kb each
|
||||
* Bank 2: Start address 0x0810:0000 to 0x081F:FFFF with 8 sectors, 128Kb each
|
||||
*
|
||||
* 2) System Flash memory:
|
||||
*
|
||||
* Bank 1: Start address 0x1FF0:0000 to 0x1FF1:FFFF with 1 x 128Kb sector
|
||||
* Bank 1: Start address 0x1FF4:0000 to 0x1FF5:FFFF with 1 x 128Kb sector
|
||||
*
|
||||
* 3) User option bytes for user configuration, only in Bank 1.
|
||||
*
|
||||
* In the STM32H747XI, two different boot spaces can be selected through
|
||||
* the BOOT pin and the boot base address programmed in the BOOT_ADD0 and
|
||||
* BOOT_ADD1 option bytes:
|
||||
*
|
||||
* 1) BOOT=0: Boot address defined by user option byte BOOT_ADD0[15:0].
|
||||
* ST programmed value: Flash memory at 0x0800:0000
|
||||
* 2) BOOT=1: Boot address defined by user option byte BOOT_ADD1[15:0].
|
||||
* ST programmed value: System bootloader at 0x1FF0:0000
|
||||
*
|
||||
* NuttX does not modify these option bytes. On the unmodified STM32H747I-DISCO
|
||||
* board, the BOOT0 pin is at ground so by default, the STM32 will boot
|
||||
* to address 0x0800:0000 in FLASH.
|
||||
*
|
||||
* The STM32H747XI also has 1024Kb of data SRAM.
|
||||
* SRAM is split up into several blocks and into three power domains:
|
||||
*
|
||||
* 1) TCM SRAMs are dedicated to the Cortex-M7 and are accessible with
|
||||
* 0 wait states by the Cortex-M7 and by MDMA through AHBS slave bus
|
||||
*
|
||||
* 1.1) 128Kb of DTCM-RAM beginning at address 0x2000:0000
|
||||
*
|
||||
* The DTCM-RAM is organized as 2 x 64Kb DTCM-RAMs on 2 x 32 bit
|
||||
* DTCM ports. The DTCM-RAM could be used for critical real-time
|
||||
* data, such as interrupt service routines or stack / heap memory.
|
||||
* Both DTCM-RAMs can be used in parallel (for load/store operations)
|
||||
* thanks to the Cortex-M7 dual issue capability.
|
||||
*
|
||||
* 1.2) 64Kb of ITCM-RAM beginning at address 0x0000:0000
|
||||
*
|
||||
* This RAM is connected to ITCM 64-bit interface designed for
|
||||
* execution of critical real-times routines by the CPU.
|
||||
*
|
||||
* 2) AXI SRAM (D1 domain) accessible by all system masters except BDMA
|
||||
* through D1 domain AXI bus matrix
|
||||
*
|
||||
* 2.1) 512Kb of SRAM beginning at address 0x2400:0000
|
||||
*
|
||||
* 3) AHB SRAM (D2 domain) accessible by all system masters except BDMA
|
||||
* through D2 domain AHB bus matrix
|
||||
*
|
||||
* 3.1) 128Kb of SRAM1 beginning at address 0x3000:0000
|
||||
* 3.2) 128Kb of SRAM2 beginning at address 0x3002:0000
|
||||
* 3.3) 32Kb of SRAM3 beginning at address 0x3004:0000
|
||||
*
|
||||
* SRAM1 - SRAM3 are one contiguous block: 288Kb at address 0x3000:0000
|
||||
*
|
||||
* 4) AHB SRAM (D3 domain) accessible by most of system masters
|
||||
* through D3 domain AHB bus matrix
|
||||
*
|
||||
* 4.1) 64Kb of SRAM4 beginning at address 0x3800:0000
|
||||
* 4.1) 4Kb of backup RAM beginning at address 0x3880:0000
|
||||
*
|
||||
* When booting from FLASH, FLASH memory is aliased to address 0x0000:0000
|
||||
* where the code expects to begin execution by jumping to the entry point in
|
||||
* the 0x0800:0000 address range.
|
||||
*/
|
||||
|
||||
MEMORY
|
||||
{
|
||||
itcm (rwx) : ORIGIN = 0x00000000, LENGTH = 64K
|
||||
flash (rx) : ORIGIN = 0x08000000, LENGTH = 2048K
|
||||
dtcm1 (rwx) : ORIGIN = 0x20000000, LENGTH = 64K
|
||||
dtcm2 (rwx) : ORIGIN = 0x20010000, LENGTH = 64K
|
||||
sram (rwx) : ORIGIN = 0x24000000, LENGTH = 512K
|
||||
sram1 (rwx) : ORIGIN = 0x30000000, LENGTH = 128K
|
||||
sram2 (rwx) : ORIGIN = 0x30020000, LENGTH = 128K
|
||||
sram3 (rwx) : ORIGIN = 0x30040000, LENGTH = 32K
|
||||
sram4 (rwx) : ORIGIN = 0x38000000, LENGTH = 64K
|
||||
bbram (rwx) : ORIGIN = 0x38800000, LENGTH = 4K
|
||||
}
|
||||
|
||||
OUTPUT_ARCH(arm)
|
||||
EXTERN(_vectors)
|
||||
ENTRY(_stext)
|
||||
SECTIONS
|
||||
{
|
||||
.text :
|
||||
{
|
||||
_stext = ABSOLUTE(.);
|
||||
*(.vectors)
|
||||
*(.text .text.*)
|
||||
*(.fixup)
|
||||
*(.gnu.warning)
|
||||
*(.rodata .rodata.*)
|
||||
*(.gnu.linkonce.t.*)
|
||||
*(.glue_7)
|
||||
*(.glue_7t)
|
||||
*(.got)
|
||||
*(.gcc_except_table)
|
||||
*(.gnu.linkonce.r.*)
|
||||
_etext = ABSOLUTE(.);
|
||||
} > flash
|
||||
|
||||
.init_section :
|
||||
{
|
||||
_sinit = ABSOLUTE(.);
|
||||
*(.init_array .init_array.*)
|
||||
_einit = ABSOLUTE(.);
|
||||
} > flash
|
||||
|
||||
.ARM.extab :
|
||||
{
|
||||
*(.ARM.extab*)
|
||||
} > flash
|
||||
|
||||
__exidx_start = ABSOLUTE(.);
|
||||
.ARM.exidx :
|
||||
{
|
||||
*(.ARM.exidx*)
|
||||
} > flash
|
||||
__exidx_end = ABSOLUTE(.);
|
||||
|
||||
_eronly = ABSOLUTE(.);
|
||||
|
||||
.data :
|
||||
{
|
||||
_sdata = ABSOLUTE(.);
|
||||
*(.data .data.*)
|
||||
*(.gnu.linkonce.d.*)
|
||||
CONSTRUCTORS
|
||||
. = ALIGN(4);
|
||||
_edata = ABSOLUTE(.);
|
||||
} > sram AT > flash
|
||||
|
||||
.bss :
|
||||
{
|
||||
_sbss = ABSOLUTE(.);
|
||||
*(.bss .bss.*)
|
||||
*(.gnu.linkonce.b.*)
|
||||
*(COMMON)
|
||||
. = ALIGN(4);
|
||||
_ebss = ABSOLUTE(.);
|
||||
} > sram
|
||||
|
||||
/* Stabs debugging sections. */
|
||||
|
||||
.stab 0 : { *(.stab) }
|
||||
.stabstr 0 : { *(.stabstr) }
|
||||
.stab.excl 0 : { *(.stab.excl) }
|
||||
.stab.exclstr 0 : { *(.stab.exclstr) }
|
||||
.stab.index 0 : { *(.stab.index) }
|
||||
.stab.indexstr 0 : { *(.stab.indexstr) }
|
||||
.comment 0 : { *(.comment) }
|
||||
.debug_abbrev 0 : { *(.debug_abbrev) }
|
||||
.debug_info 0 : { *(.debug_info) }
|
||||
.debug_line 0 : { *(.debug_line) }
|
||||
.debug_pubnames 0 : { *(.debug_pubnames) }
|
||||
.debug_aranges 0 : { *(.debug_aranges) }
|
||||
}
|
||||
111
boards/arm/stm32h7/stm32h747i-disco/scripts/kernel.space.ld
Normal file
111
boards/arm/stm32h7/stm32h747i-disco/scripts/kernel.space.ld
Normal file
@ -0,0 +1,111 @@
|
||||
/****************************************************************************
|
||||
* boards/arm/stm32h7/stm32h747i-disco/scripts/kernel-space.ld
|
||||
*
|
||||
* Copyright (C) 2019 Gregory Nutt. All rights reserved.
|
||||
* Author: Gregory Nutt <gnutt@nuttx.org>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in
|
||||
* the documentation and/or other materials provided with the
|
||||
* distribution.
|
||||
* 3. Neither the name NuttX nor the names of its contributors may be
|
||||
* used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
|
||||
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
|
||||
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
/* NOTE: This depends on the memory.ld script having been included prior to
|
||||
* this script.
|
||||
*/
|
||||
|
||||
OUTPUT_ARCH(arm)
|
||||
ENTRY(_stext)
|
||||
SECTIONS
|
||||
{
|
||||
.text : {
|
||||
_stext = ABSOLUTE(.);
|
||||
*(.vectors)
|
||||
*(.text .text.*)
|
||||
*(.fixup)
|
||||
*(.gnu.warning)
|
||||
*(.rodata .rodata.*)
|
||||
*(.gnu.linkonce.t.*)
|
||||
*(.glue_7)
|
||||
*(.glue_7t)
|
||||
*(.got)
|
||||
*(.gcc_except_table)
|
||||
*(.gnu.linkonce.r.*)
|
||||
_etext = ABSOLUTE(.);
|
||||
} > kflash
|
||||
|
||||
.init_section : {
|
||||
_sinit = ABSOLUTE(.);
|
||||
*(.init_array .init_array.*)
|
||||
_einit = ABSOLUTE(.);
|
||||
} > kflash
|
||||
|
||||
.ARM.extab : {
|
||||
*(.ARM.extab*)
|
||||
} > kflash
|
||||
|
||||
__exidx_start = ABSOLUTE(.);
|
||||
.ARM.exidx : {
|
||||
*(.ARM.exidx*)
|
||||
} > kflash
|
||||
|
||||
__exidx_end = ABSOLUTE(.);
|
||||
|
||||
_eronly = ABSOLUTE(.);
|
||||
|
||||
.data : {
|
||||
_sdata = ABSOLUTE(.);
|
||||
*(.data .data.*)
|
||||
*(.gnu.linkonce.d.*)
|
||||
CONSTRUCTORS
|
||||
. = ALIGN(4);
|
||||
_edata = ABSOLUTE(.);
|
||||
} > ksram AT > kflash
|
||||
|
||||
.bss : {
|
||||
_sbss = ABSOLUTE(.);
|
||||
*(.bss .bss.*)
|
||||
*(.gnu.linkonce.b.*)
|
||||
*(COMMON)
|
||||
. = ALIGN(4);
|
||||
_ebss = ABSOLUTE(.);
|
||||
} > ksram
|
||||
|
||||
/* Stabs debugging sections */
|
||||
|
||||
.stab 0 : { *(.stab) }
|
||||
.stabstr 0 : { *(.stabstr) }
|
||||
.stab.excl 0 : { *(.stab.excl) }
|
||||
.stab.exclstr 0 : { *(.stab.exclstr) }
|
||||
.stab.index 0 : { *(.stab.index) }
|
||||
.stab.indexstr 0 : { *(.stab.indexstr) }
|
||||
.comment 0 : { *(.comment) }
|
||||
.debug_abbrev 0 : { *(.debug_abbrev) }
|
||||
.debug_info 0 : { *(.debug_info) }
|
||||
.debug_line 0 : { *(.debug_line) }
|
||||
.debug_pubnames 0 : { *(.debug_pubnames) }
|
||||
.debug_aranges 0 : { *(.debug_aranges) }
|
||||
}
|
||||
67
boards/arm/stm32h7/stm32h747i-disco/scripts/memory.ld
Normal file
67
boards/arm/stm32h7/stm32h747i-disco/scripts/memory.ld
Normal file
@ -0,0 +1,67 @@
|
||||
/****************************************************************************
|
||||
* boards/arm/stm32h7/stm32h747i-disco/scripts/memory.ld
|
||||
*
|
||||
* Copyright (C) 2019 Gregory Nutt. All rights reserved.
|
||||
* Author: Gregory Nutt <gnutt@nuttx.org>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in
|
||||
* the documentation and/or other materials provided with the
|
||||
* distribution.
|
||||
* 3. Neither the name NuttX nor the names of its contributors may be
|
||||
* used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
|
||||
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
|
||||
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
/* TODO: Add description for memory organisation */
|
||||
|
||||
MEMORY
|
||||
{
|
||||
/* ITCM boot address */
|
||||
|
||||
itcm (rwx) : ORIGIN = 0x00000000, LENGTH = 64K
|
||||
|
||||
/* 2048Kb FLASH */
|
||||
|
||||
kflash (rx) : ORIGIN = 0x08000000, LENGTH = 128K
|
||||
uflash (rx) : ORIGIN = 0x08020000, LENGTH = 128K
|
||||
xflash (rx) : ORIGIN = 0x08040000, LENGTH = 1792K
|
||||
|
||||
/* 288Kb SRAM123 */
|
||||
|
||||
ksram (rwx) : ORIGIN = 0x30000000, LENGTH = 16K
|
||||
usram (rwx) : ORIGIN = 0x30004000, LENGTH = 16K
|
||||
xsram (rwx) : ORIGIN = 0x30008000, LENGTH = 288K - 32K
|
||||
|
||||
/* 512Kb of contiguous AXI SRAM */
|
||||
|
||||
sram (rwx) : ORIGIN = 0x24000000, LENGTH = 512K
|
||||
|
||||
/* DTCM SRAM */
|
||||
|
||||
dtcm1 (rwx) : ORIGIN = 0x20000000, LENGTH = 64K
|
||||
dtcm2 (rwx) : ORIGIN = 0x20010000, LENGTH = 64K
|
||||
|
||||
sram4 (rwx) : ORIGIN = 0x38000000, LENGTH = 64K
|
||||
bbram (rwx) : ORIGIN = 0x38800000, LENGTH = 4K
|
||||
}
|
||||
113
boards/arm/stm32h7/stm32h747i-disco/scripts/user-space.ld
Normal file
113
boards/arm/stm32h7/stm32h747i-disco/scripts/user-space.ld
Normal file
@ -0,0 +1,113 @@
|
||||
/****************************************************************************
|
||||
* boards/arm/stm32h7/stm32h747i-disco/scripts/user-space.ld
|
||||
*
|
||||
* Copyright (C) 2019 Gregory Nutt. All rights reserved.
|
||||
* Author: Gregory Nutt <gnutt@nuttx.org>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in
|
||||
* the documentation and/or other materials provided with the
|
||||
* distribution.
|
||||
* 3. Neither the name NuttX nor the names of its contributors may be
|
||||
* used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
|
||||
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
|
||||
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
/* NOTE: This depends on the memory.ld script having been included prior to
|
||||
* this script.
|
||||
*/
|
||||
|
||||
OUTPUT_ARCH(arm)
|
||||
SECTIONS
|
||||
{
|
||||
.userspace : {
|
||||
*(.userspace)
|
||||
} > uflash
|
||||
|
||||
.text : {
|
||||
_stext = ABSOLUTE(.);
|
||||
*(.text .text.*)
|
||||
*(.fixup)
|
||||
*(.gnu.warning)
|
||||
*(.rodata .rodata.*)
|
||||
*(.gnu.linkonce.t.*)
|
||||
*(.glue_7)
|
||||
*(.glue_7t)
|
||||
*(.got)
|
||||
*(.gcc_except_table)
|
||||
*(.gnu.linkonce.r.*)
|
||||
_etext = ABSOLUTE(.);
|
||||
} > uflash
|
||||
|
||||
.init_section : {
|
||||
_sinit = ABSOLUTE(.);
|
||||
*(.init_array .init_array.*)
|
||||
_einit = ABSOLUTE(.);
|
||||
} > uflash
|
||||
|
||||
.ARM.extab : {
|
||||
*(.ARM.extab*)
|
||||
} > uflash
|
||||
|
||||
__exidx_start = ABSOLUTE(.);
|
||||
.ARM.exidx : {
|
||||
*(.ARM.exidx*)
|
||||
} > uflash
|
||||
|
||||
__exidx_end = ABSOLUTE(.);
|
||||
|
||||
_eronly = ABSOLUTE(.);
|
||||
|
||||
.data : {
|
||||
_sdata = ABSOLUTE(.);
|
||||
*(.data .data.*)
|
||||
*(.gnu.linkonce.d.*)
|
||||
CONSTRUCTORS
|
||||
. = ALIGN(4);
|
||||
_edata = ABSOLUTE(.);
|
||||
} > usram AT > uflash
|
||||
|
||||
.bss : {
|
||||
_sbss = ABSOLUTE(.);
|
||||
*(.bss .bss.*)
|
||||
*(.gnu.linkonce.b.*)
|
||||
*(COMMON)
|
||||
. = ALIGN(4);
|
||||
_ebss = ABSOLUTE(.);
|
||||
} > usram
|
||||
|
||||
/* Stabs debugging sections */
|
||||
|
||||
.stab 0 : { *(.stab) }
|
||||
.stabstr 0 : { *(.stabstr) }
|
||||
.stab.excl 0 : { *(.stab.excl) }
|
||||
.stab.exclstr 0 : { *(.stab.exclstr) }
|
||||
.stab.index 0 : { *(.stab.index) }
|
||||
.stab.indexstr 0 : { *(.stab.indexstr) }
|
||||
.comment 0 : { *(.comment) }
|
||||
.debug_abbrev 0 : { *(.debug_abbrev) }
|
||||
.debug_info 0 : { *(.debug_info) }
|
||||
.debug_line 0 : { *(.debug_line) }
|
||||
.debug_pubnames 0 : { *(.debug_pubnames) }
|
||||
.debug_aranges 0 : { *(.debug_aranges) }
|
||||
}
|
||||
2
boards/arm/stm32h7/stm32h747i-disco/src/.gitignore
vendored
Normal file
2
boards/arm/stm32h7/stm32h747i-disco/src/.gitignore
vendored
Normal file
@ -0,0 +1,2 @@
|
||||
/.depend
|
||||
/Make.dep
|
||||
71
boards/arm/stm32h7/stm32h747i-disco/src/Makefile
Normal file
71
boards/arm/stm32h7/stm32h747i-disco/src/Makefile
Normal file
@ -0,0 +1,71 @@
|
||||
############################################################################
|
||||
# boards/arm/stm32h7/stm32h747i-disco/src/Makefile
|
||||
#
|
||||
# Copyright (C) 2018 Gregory Nutt. All rights reserved.
|
||||
# Author: Gregory Nutt <gnutt@nuttx.org>
|
||||
#
|
||||
# Redistribution and use in source and binary forms, with or without
|
||||
# modification, are permitted provided that the following conditions
|
||||
# are met:
|
||||
#
|
||||
# 1. Redistributions of source code must retain the above copyright
|
||||
# notice, this list of conditions and the following disclaimer.
|
||||
# 2. Redistributions in binary form must reproduce the above copyright
|
||||
# notice, this list of conditions and the following disclaimer in
|
||||
# the documentation and/or other materials provided with the
|
||||
# distribution.
|
||||
# 3. Neither the name NuttX nor the names of its contributors may be
|
||||
# used to endorse or promote products derived from this software
|
||||
# without specific prior written permission.
|
||||
#
|
||||
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||
# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
|
||||
# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
|
||||
# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
# POSSIBILITY OF SUCH DAMAGE.
|
||||
#
|
||||
############################################################################
|
||||
|
||||
-include $(TOPDIR)/Make.defs
|
||||
|
||||
ASRCS =
|
||||
CSRCS = stm32_boot.c stm32_bringup.c
|
||||
|
||||
ifeq ($(CONFIG_ADC),y)
|
||||
CSRCS += stm32_adc.c
|
||||
endif
|
||||
|
||||
ifeq ($(CONFIG_ARCH_LEDS),y)
|
||||
CSRCS += stm32_autoleds.c
|
||||
else
|
||||
CSRCS += stm32_userleds.c
|
||||
endif
|
||||
|
||||
ifeq ($(CONFIG_ARCH_BUTTONS),y)
|
||||
CSRCS += stm32_buttons.c
|
||||
endif
|
||||
|
||||
ifeq ($(CONFIG_STM32H7_SPI),y)
|
||||
CSRCS += stm32_spi.c
|
||||
endif
|
||||
|
||||
ifeq ($(CONFIG_STM32H7_OTGHS),y)
|
||||
CSRCS += stm32_usb.c
|
||||
endif
|
||||
|
||||
ifeq ($(CONFIG_BOARDCTL_UNIQUEID),y)
|
||||
CSRCS += stm32_uid.c
|
||||
endif
|
||||
|
||||
ifeq ($(CONFIG_LIB_BOARDCTL),y)
|
||||
CSRCS += stm32_appinitialize.c
|
||||
endif
|
||||
|
||||
include $(TOPDIR)/boards/Board.mk
|
||||
228
boards/arm/stm32h7/stm32h747i-disco/src/stm32_adc.c
Normal file
228
boards/arm/stm32h7/stm32h747i-disco/src/stm32_adc.c
Normal file
@ -0,0 +1,228 @@
|
||||
/****************************************************************************
|
||||
* boards/arm/stm32h7/stm32h747i-disco/src/stm32_adc.c
|
||||
*
|
||||
* Copyright (C) 2019 Gregory Nutt. All rights reserved.
|
||||
* Authors: Gregory Nutt <gnutt@nuttx.org>
|
||||
* David Sidrane <david.sidrane@nscdg.com>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in
|
||||
* the documentation and/or other materials provided with the
|
||||
* distribution.
|
||||
* 3. Neither the name NuttX nor the names of its contributors may be
|
||||
* used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
|
||||
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
|
||||
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Included Files
|
||||
****************************************************************************/
|
||||
|
||||
#include <nuttx/config.h>
|
||||
|
||||
#include <errno.h>
|
||||
#include <debug.h>
|
||||
|
||||
#include <nuttx/board.h>
|
||||
#include <nuttx/analog/adc.h>
|
||||
#include <arch/board/board.h>
|
||||
|
||||
#include "chip.h"
|
||||
#include "stm32_gpio.h"
|
||||
#include "stm32_adc.h"
|
||||
#include "stm32h747i-disco.h"
|
||||
|
||||
#ifdef CONFIG_ADC
|
||||
|
||||
/****************************************************************************
|
||||
* Pre-processor Definitions
|
||||
****************************************************************************/
|
||||
|
||||
/* Configuration ************************************************************/
|
||||
|
||||
/* Up to 3 ADC interfaces are supported */
|
||||
|
||||
#if defined(CONFIG_STM32H7_ADC1) || defined(CONFIG_STM32H7_ADC2) || \
|
||||
defined(CONFIG_STM32H7_ADC3)
|
||||
#ifndef CONFIG_STM32H7_ADC1
|
||||
# warning "Channel information only available for ADC1"
|
||||
#endif
|
||||
|
||||
/* The number of ADC channels in the conversion list */
|
||||
|
||||
#define ADC1_NCHANNELS 5
|
||||
#define ADC3_NCHANNELS 1
|
||||
|
||||
/****************************************************************************
|
||||
* Private Data
|
||||
****************************************************************************/
|
||||
|
||||
#ifdef CONFIG_STM32H7_ADC1
|
||||
/* Identifying number of each ADC channel: Variable Resistor.
|
||||
*
|
||||
* ADC1: {5, 10, 12, 13, 15};
|
||||
*/
|
||||
|
||||
static const uint8_t g_adc1_chanlist[ADC1_NCHANNELS] =
|
||||
{
|
||||
5, 10, 12, 13, 15
|
||||
};
|
||||
|
||||
/* Configurations of pins used by each ADC channels
|
||||
*
|
||||
* ADC1: {GPIO_ADC12_INP5, GPIO_ADC123_INP10, GPIO_ADC123_INP12,
|
||||
* GPIO_ADC12_INP13, GPIO_ADC12_INP15};
|
||||
*/
|
||||
|
||||
static const uint32_t g_adc1_pinlist[ADC1_NCHANNELS] =
|
||||
{
|
||||
GPIO_ADC12_INP5, GPIO_ADC123_INP10, GPIO_ADC123_INP12, GPIO_ADC12_INP13,
|
||||
GPIO_ADC12_INP15
|
||||
};
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_STM32H7_ADC3
|
||||
/* Identifying number of each ADC channel: Variable Resistor.
|
||||
*
|
||||
* ADC3: {6,};
|
||||
*/
|
||||
|
||||
static const uint8_t g_adc3_chanlist[ADC1_NCHANNELS] =
|
||||
{
|
||||
6
|
||||
};
|
||||
|
||||
/* Configurations of pins used by each ADC channels
|
||||
*
|
||||
*
|
||||
* ADC3: {GPIO_ADC3_INP6}
|
||||
*/
|
||||
|
||||
static const uint32_t g_adc3_pinlist[ADC3_NCHANNELS] =
|
||||
{
|
||||
GPIO_ADC3_INP6
|
||||
};
|
||||
#endif
|
||||
|
||||
/****************************************************************************
|
||||
* Public Functions
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Name: stm32_adc_setup
|
||||
*
|
||||
* Description:
|
||||
* Initialize ADC and register the ADC driver.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
int stm32_adc_setup(void)
|
||||
{
|
||||
#if defined(CONFIG_STM32H7_ADC1) || defined(CONFIG_STM32H7_ADC3)
|
||||
static bool initialized = false;
|
||||
struct adc_dev_s *adc;
|
||||
int ret;
|
||||
int i;
|
||||
char devname[] = "/dev/adc0";
|
||||
|
||||
/* Check if we have already initialized */
|
||||
|
||||
if (!initialized)
|
||||
{
|
||||
#endif
|
||||
#if defined(CONFIG_STM32H7_ADC1)
|
||||
/* Configure the pins as analog inputs for the selected channels */
|
||||
|
||||
for (i = 0; i < ADC1_NCHANNELS; i++)
|
||||
{
|
||||
if (g_adc1_pinlist[i] != 0)
|
||||
{
|
||||
stm32_configgpio(g_adc1_pinlist[i]);
|
||||
}
|
||||
}
|
||||
|
||||
/* Call stm32_adcinitialize() to get an instance of the ADC interface */
|
||||
|
||||
adc = stm32h7_adc_initialize(1, g_adc1_chanlist, ADC1_NCHANNELS);
|
||||
if (adc == NULL)
|
||||
{
|
||||
aerr("ERROR: Failed to get ADC1 interface\n");
|
||||
return -ENODEV;
|
||||
}
|
||||
|
||||
/* Register the ADC driver at "/dev/adc0" */
|
||||
|
||||
ret = adc_register(devname, adc);
|
||||
if (ret < 0)
|
||||
{
|
||||
aerr("ERROR: adc_register(%s) failed: %d\n", devname, ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
devname[8]++;
|
||||
#endif
|
||||
#if defined(CONFIG_STM32H7_ADC3)
|
||||
/* Configure the pins as analog inputs for the selected channels */
|
||||
|
||||
for (i = 0; i < ADC3_NCHANNELS; i++)
|
||||
{
|
||||
if (g_adc3_pinlist[i] != 0)
|
||||
{
|
||||
stm32_configgpio(g_adc3_pinlist[i]);
|
||||
}
|
||||
}
|
||||
|
||||
/* Call stm32_adcinitialize() to get an instance of the ADC interface */
|
||||
|
||||
adc = stm32h7_adc_initialize(3, g_adc3_chanlist, ADC3_NCHANNELS);
|
||||
if (adc == NULL)
|
||||
{
|
||||
aerr("ERROR: Failed to get ADC3 interface\n");
|
||||
return -ENODEV;
|
||||
}
|
||||
|
||||
/* Register the ADC driver at "/dev/adc0 or 1" */
|
||||
|
||||
ret = adc_register(devname, adc);
|
||||
if (ret < 0)
|
||||
{
|
||||
aerr("ERROR: adc_register(%s) failed: %d\n", devname, ret);
|
||||
return ret;
|
||||
}
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_STM32H7_ADC1) || defined(CONFIG_STM32H7_ADC3)
|
||||
/* Now we are initialized */
|
||||
|
||||
initialized = true;
|
||||
}
|
||||
|
||||
return OK;
|
||||
#else
|
||||
return -ENOSYS;
|
||||
#endif
|
||||
}
|
||||
|
||||
#endif /* CONFIG_STM32H7_ADC1 || CONFIG_STM32H7_ADC2 || CONFIG_STM32H7_ADC3 */
|
||||
#endif /* CONFIG_ADC */
|
||||
|
||||
@ -0,0 +1,94 @@
|
||||
/****************************************************************************
|
||||
* boards/arm/stm32h7/stm32h747i-disco/src/stm32_appinitialize.c
|
||||
*
|
||||
* Copyright (C) 2019 Gregory Nutt. All rights reserved.
|
||||
* Authors: Gregory Nutt <gnutt@nuttx.org>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in
|
||||
* the documentation and/or other materials provided with the
|
||||
* distribution.
|
||||
* 3. Neither the name NuttX nor the names of its contributors may be
|
||||
* used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
|
||||
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
|
||||
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Included Files
|
||||
****************************************************************************/
|
||||
|
||||
#include <nuttx/config.h>
|
||||
|
||||
#include <nuttx/board.h>
|
||||
|
||||
#include "stm32h747i-disco.h"
|
||||
|
||||
/****************************************************************************
|
||||
* Pre-processor Definitions
|
||||
****************************************************************************/
|
||||
|
||||
#ifndef OK
|
||||
# define OK 0
|
||||
#endif
|
||||
|
||||
/****************************************************************************
|
||||
* Public Functions
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Name: board_app_initialize
|
||||
*
|
||||
* Description:
|
||||
* Perform application specific initialization. This function is never
|
||||
* called directly from application code, but only indirectly via the
|
||||
* (non-standard) boardctl() interface using the command BOARDIOC_INIT.
|
||||
*
|
||||
* Input Parameters:
|
||||
* arg - The boardctl() argument is passed to the board_app_initialize()
|
||||
* implementation without modification. The argument has no
|
||||
* meaning to NuttX; the meaning of the argument is a contract
|
||||
* between the board-specific initialization logic and the
|
||||
* matching application logic. The value cold be such things as a
|
||||
* mode enumeration value, a set of DIP switch switch settings, a
|
||||
* pointer to configuration data read from a file or serial FLASH,
|
||||
* or whatever you would like to do with it. Every implementation
|
||||
* should accept zero/NULL as a default configuration.
|
||||
*
|
||||
* Returned Value:
|
||||
* Zero (OK) is returned on success; a negated errno value is returned on
|
||||
* any failure to indicate the nature of the failure.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
int board_app_initialize(uintptr_t arg)
|
||||
{
|
||||
#ifdef CONFIG_BOARD_LATE_INITIALIZE
|
||||
/* Board initialization already performed by board_late_initialize() */
|
||||
|
||||
return OK;
|
||||
#else
|
||||
/* Perform board-specific initialization */
|
||||
|
||||
return stm32_bringup();
|
||||
#endif
|
||||
}
|
||||
189
boards/arm/stm32h7/stm32h747i-disco/src/stm32_autoleds.c
Normal file
189
boards/arm/stm32h7/stm32h747i-disco/src/stm32_autoleds.c
Normal file
@ -0,0 +1,189 @@
|
||||
/****************************************************************************
|
||||
* boards/arm/stm32h7/stm32h747i-disco/src/stm32_autoleds.c
|
||||
*
|
||||
* Copyright (C) 2019 Gregory Nutt. All rights reserved.
|
||||
* Authors: Gregory Nutt <gnutt@nuttx.org>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in
|
||||
* the documentation and/or other materials provided with the
|
||||
* distribution.
|
||||
* 3. Neither the name NuttX nor the names of its contributors may be
|
||||
* used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
|
||||
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
|
||||
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Included Files
|
||||
****************************************************************************/
|
||||
|
||||
#include <nuttx/config.h>
|
||||
|
||||
#include <stdbool.h>
|
||||
#include <debug.h>
|
||||
|
||||
#include <nuttx/board.h>
|
||||
#include <arch/board/board.h>
|
||||
|
||||
#include "stm32_gpio.h"
|
||||
#include "stm32h747i-disco.h"
|
||||
|
||||
#ifdef CONFIG_ARCH_LEDS
|
||||
|
||||
/****************************************************************************
|
||||
* Pre-processor Definitions
|
||||
****************************************************************************/
|
||||
|
||||
#define ARRAYSIZE(x) (sizeof((x)) / sizeof((x)[0]))
|
||||
|
||||
/****************************************************************************
|
||||
* Private Data
|
||||
****************************************************************************/
|
||||
|
||||
/* Indexed by BOARD_LED_<color> */
|
||||
|
||||
static const uint32_t g_ledmap[BOARD_NLEDS] =
|
||||
{
|
||||
GPIO_LED_GREEN,
|
||||
GPIO_LED_ORANGE,
|
||||
GPIO_LED_RED,
|
||||
GPIO_LED_BLUE,
|
||||
};
|
||||
|
||||
static bool g_initialized;
|
||||
|
||||
/****************************************************************************
|
||||
* Private Functions
|
||||
****************************************************************************/
|
||||
|
||||
static void phy_set_led(int led, bool state)
|
||||
{
|
||||
/* Active Low */
|
||||
|
||||
stm32_gpiowrite(g_ledmap[led], !state);
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Public Functions
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Name: board_autoled_initialize
|
||||
****************************************************************************/
|
||||
|
||||
void board_autoled_initialize(void)
|
||||
{
|
||||
int i;
|
||||
|
||||
/* Configure the LD1 GPIO for output. Initial state is OFF */
|
||||
|
||||
for (i = 0; i < ARRAYSIZE(g_ledmap); i++)
|
||||
{
|
||||
stm32_configgpio(g_ledmap[i]);
|
||||
}
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Name: board_autoled_on
|
||||
****************************************************************************/
|
||||
|
||||
void board_autoled_on(int led)
|
||||
{
|
||||
switch (led)
|
||||
{
|
||||
default:
|
||||
break;
|
||||
|
||||
case LED_HEAPALLOCATE:
|
||||
phy_set_led(BOARD_LED_BLUE, true);
|
||||
break;
|
||||
|
||||
case LED_IRQSENABLED:
|
||||
phy_set_led(BOARD_LED_BLUE, false);
|
||||
phy_set_led(BOARD_LED_GREEN, true);
|
||||
break;
|
||||
|
||||
case LED_STACKCREATED:
|
||||
phy_set_led(BOARD_LED_GREEN, true);
|
||||
phy_set_led(BOARD_LED_BLUE, true);
|
||||
g_initialized = true;
|
||||
break;
|
||||
|
||||
case LED_INIRQ:
|
||||
phy_set_led(BOARD_LED_BLUE, true);
|
||||
break;
|
||||
|
||||
case LED_SIGNAL:
|
||||
phy_set_led(BOARD_LED_GREEN, true);
|
||||
break;
|
||||
|
||||
case LED_ASSERTION:
|
||||
phy_set_led(BOARD_LED_RED, true);
|
||||
phy_set_led(BOARD_LED_BLUE, true);
|
||||
break;
|
||||
|
||||
case LED_PANIC:
|
||||
phy_set_led(BOARD_LED_RED, true);
|
||||
break;
|
||||
|
||||
case LED_IDLE : /* IDLE */
|
||||
phy_set_led(BOARD_LED_RED, true);
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Name: board_autoled_off
|
||||
****************************************************************************/
|
||||
|
||||
void board_autoled_off(int led)
|
||||
{
|
||||
switch (led)
|
||||
{
|
||||
default:
|
||||
break;
|
||||
|
||||
case LED_SIGNAL:
|
||||
phy_set_led(BOARD_LED_GREEN, false);
|
||||
break;
|
||||
|
||||
case LED_INIRQ:
|
||||
phy_set_led(BOARD_LED_BLUE, false);
|
||||
break;
|
||||
|
||||
case LED_ASSERTION:
|
||||
phy_set_led(BOARD_LED_RED, false);
|
||||
phy_set_led(BOARD_LED_BLUE, false);
|
||||
break;
|
||||
|
||||
case LED_PANIC:
|
||||
phy_set_led(BOARD_LED_RED, false);
|
||||
break;
|
||||
|
||||
case LED_IDLE : /* IDLE */
|
||||
phy_set_led(BOARD_LED_RED, false);
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
#endif /* CONFIG_ARCH_LEDS */
|
||||
110
boards/arm/stm32h7/stm32h747i-disco/src/stm32_boot.c
Normal file
110
boards/arm/stm32h7/stm32h747i-disco/src/stm32_boot.c
Normal file
@ -0,0 +1,110 @@
|
||||
/****************************************************************************
|
||||
* boards/arm/stm32h7/stm32h747i-disco/src/stm32_boot.c
|
||||
*
|
||||
* Copyright (C) 2019 Gregory Nutt. All rights reserved.
|
||||
* Author: Gregory Nutt <gnutt@nuttx.org>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in
|
||||
* the documentation and/or other materials provided with the
|
||||
* distribution.
|
||||
* 3. Neither the name NuttX nor the names of its contributors may be
|
||||
* used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
|
||||
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
|
||||
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Included Files
|
||||
****************************************************************************/
|
||||
|
||||
#include <nuttx/config.h>
|
||||
|
||||
#include <debug.h>
|
||||
|
||||
#include <nuttx/board.h>
|
||||
#include <arch/board/board.h>
|
||||
|
||||
#include "up_arch.h"
|
||||
#include "stm32_start.h"
|
||||
#include "stm32h747i-disco.h"
|
||||
|
||||
/****************************************************************************
|
||||
* Public Functions
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Name: stm32_boardinitialize
|
||||
*
|
||||
* Description:
|
||||
* All STM32 architectures must provide the following entry point. This
|
||||
* entry point is called early in the initialization -- after all memory
|
||||
* has been configured and mapped but before any devices have been
|
||||
* initialized.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
void stm32_boardinitialize(void)
|
||||
{
|
||||
#ifdef CONFIG_ARCH_LEDS
|
||||
/* Configure on-board LEDs if LED support has been selected. */
|
||||
|
||||
board_autoled_initialize();
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_STM32H7_OTGHS) || defined(CONFIG_STM32H7_HOST)
|
||||
/* Initialize USB */
|
||||
|
||||
stm32_usbinitialize();
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_STM32H7_SPI
|
||||
/* Configure SPI chip selects */
|
||||
|
||||
stm32_spidev_initialize();
|
||||
#endif
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Name: board_late_initialize
|
||||
*
|
||||
* Description:
|
||||
* If CONFIG_BOARD_LATE_INITIALIZE is selected, then an additional
|
||||
* initialization call will be performed in the boot-up sequence to a
|
||||
* function called board_late_initialize(). board_late_initialize() will
|
||||
* be called immediately after up_initialize() is called and just before
|
||||
* the initial application is started. This additional initialization
|
||||
* phase may be used, for example, to initialize board-specific device
|
||||
* drivers.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
#ifdef CONFIG_BOARD_LATE_INITIALIZE
|
||||
void board_late_initialize(void)
|
||||
{
|
||||
#if defined(CONFIG_NSH_LIBRARY) && !defined(CONFIG_LIB_BOARDCTL)
|
||||
/* Perform board bring-up here instead of from the board_app_initialize(). */
|
||||
|
||||
(void)stm32_bringup();
|
||||
#endif
|
||||
}
|
||||
#endif
|
||||
220
boards/arm/stm32h7/stm32h747i-disco/src/stm32_bringup.c
Normal file
220
boards/arm/stm32h7/stm32h747i-disco/src/stm32_bringup.c
Normal file
@ -0,0 +1,220 @@
|
||||
/****************************************************************************
|
||||
* boards/arm/stm32h7/stm32h747i-disco/src/stm32_bringup.c
|
||||
*
|
||||
* Copyright (C) 2019 Gregory Nutt. All rights reserved.
|
||||
* Author: Gregory Nutt <gnutt@nuttx.org>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in
|
||||
* the documentation and/or other materials provided with the
|
||||
* distribution.
|
||||
* 3. Neither the name NuttX nor the names of its contributors may be
|
||||
* used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
|
||||
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
|
||||
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Included Files
|
||||
****************************************************************************/
|
||||
|
||||
#include <nuttx/config.h>
|
||||
|
||||
#include <sys/types.h>
|
||||
#include <sys/mount.h>
|
||||
#include <syslog.h>
|
||||
#include <errno.h>
|
||||
|
||||
#include "stm32h747i-disco.h"
|
||||
|
||||
#ifdef CONFIG_BUTTONS
|
||||
# include <nuttx/input/buttons.h>
|
||||
#endif
|
||||
|
||||
#ifdef HAVE_RTC_DRIVER
|
||||
# include <nuttx/timers/rtc.h>
|
||||
# include "stm32_rtc.h"
|
||||
#endif
|
||||
|
||||
/****************************************************************************
|
||||
* Private Functions
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Name: stm32_i2c_register
|
||||
*
|
||||
* Description:
|
||||
* Register one I2C drivers for the I2C tool.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
#if defined(CONFIG_I2C) && defined(CONFIG_SYSTEM_I2CTOOL)
|
||||
static void stm32_i2c_register(int bus)
|
||||
{
|
||||
FAR struct i2c_master_s *i2c;
|
||||
int ret;
|
||||
|
||||
i2c = stm32_i2cbus_initialize(bus);
|
||||
if (i2c == NULL)
|
||||
{
|
||||
syslog(LOG_ERR, "ERROR: Failed to get I2C%d interface\n", bus);
|
||||
}
|
||||
else
|
||||
{
|
||||
ret = i2c_register(i2c, bus);
|
||||
if (ret < 0)
|
||||
{
|
||||
syslog(LOG_ERR, "ERROR: Failed to register I2C%d driver: %d\n",
|
||||
bus, ret);
|
||||
stm32_i2cbus_uninitialize(i2c);
|
||||
}
|
||||
}
|
||||
}
|
||||
#endif
|
||||
|
||||
/****************************************************************************
|
||||
* Name: stm32_i2ctool
|
||||
*
|
||||
* Description:
|
||||
* Register I2C drivers for the I2C tool.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
#if defined(CONFIG_I2C) && defined(CONFIG_SYSTEM_I2CTOOL)
|
||||
static void stm32_i2ctool(void)
|
||||
{
|
||||
#ifdef CONFIG_STM32H7_I2C1
|
||||
stm32_i2c_register(1);
|
||||
#endif
|
||||
#ifdef CONFIG_STM32H7_I2C2
|
||||
stm32_i2c_register(2);
|
||||
#endif
|
||||
#ifdef CONFIG_STM32H7_I2C3
|
||||
stm32_i2c_register(3);
|
||||
#endif
|
||||
#ifdef CONFIG_STM32H7_I2C4
|
||||
stm32_i2c_register(4);
|
||||
#endif
|
||||
}
|
||||
#endif
|
||||
|
||||
/****************************************************************************
|
||||
* Public Functions
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Name: stm32_bringup
|
||||
*
|
||||
* Description:
|
||||
* Perform architecture-specific initialization
|
||||
*
|
||||
* CONFIG_BOARD_LATE_INITIALIZE=y :
|
||||
* Called from board_late_initialize().
|
||||
*
|
||||
* CONFIG_BOARD_LATE_INITIALIZE=n && CONFIG_LIB_BOARDCTL=y &&
|
||||
* CONFIG_NSH_ARCHINIT:
|
||||
* Called from the NSH library
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
int stm32_bringup(void)
|
||||
{
|
||||
int ret = OK;
|
||||
#ifdef HAVE_RTC_DRIVER
|
||||
FAR struct rtc_lowerhalf_s *lower;
|
||||
#endif
|
||||
|
||||
UNUSED(ret);
|
||||
|
||||
#if defined(CONFIG_I2C) && defined(CONFIG_SYSTEM_I2CTOOL)
|
||||
stm32_i2ctool();
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_FS_PROCFS
|
||||
#ifdef CONFIG_STM32_CCM_PROCFS
|
||||
/* Register the CCM procfs entry. This must be done before the procfs is
|
||||
* mounted.
|
||||
*/
|
||||
|
||||
(void)ccm_procfs_register();
|
||||
#endif /* CONFIG_STM32_CCM_PROCFS */
|
||||
|
||||
/* Mount the procfs file system */
|
||||
|
||||
ret = mount(NULL, STM32_PROCFS_MOUNTPOINT, "procfs", 0, NULL);
|
||||
if (ret < 0)
|
||||
{
|
||||
syslog(LOG_ERR,
|
||||
"ERROR: Failed to mount the PROC filesystem: %d (%d)\n",
|
||||
ret, errno);
|
||||
}
|
||||
#endif /* CONFIG_FS_PROCFS */
|
||||
|
||||
#ifdef HAVE_RTC_DRIVER
|
||||
/* Instantiate the STM32 lower-half RTC driver */
|
||||
|
||||
lower = stm32_rtc_lowerhalf();
|
||||
if (!lower)
|
||||
{
|
||||
syslog(LOG_ERR,
|
||||
"ERROR: Failed to instantiate the RTC lower-half driver\n");
|
||||
return -ENOMEM;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Bind the lower half driver and register the combined RTC driver
|
||||
* as /dev/rtc0
|
||||
*/
|
||||
|
||||
ret = rtc_initialize(0, lower);
|
||||
if (ret < 0)
|
||||
{
|
||||
syslog(LOG_ERR,
|
||||
"ERROR: Failed to bind/register the RTC driver: %d\n", ret);
|
||||
return ret;
|
||||
}
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_BUTTONS
|
||||
/* Register the BUTTON driver */
|
||||
|
||||
ret = btn_lower_initialize("/dev/buttons");
|
||||
if (ret < 0)
|
||||
{
|
||||
syslog(LOG_ERR, "ERROR: btn_lower_initialize() failed: %d\n", ret);
|
||||
}
|
||||
#endif /* CONFIG_BUTTONS */
|
||||
|
||||
#ifdef CONFIG_ADC
|
||||
/* Initialize ADC and register the ADC driver. */
|
||||
|
||||
ret = stm32_adc_setup();
|
||||
if (ret < 0)
|
||||
{
|
||||
syslog(LOG_ERR, "ERROR: stm32_adc_setup failed: %d\n", ret);
|
||||
}
|
||||
#endif /* CONFIG_ADC */
|
||||
|
||||
return OK;
|
||||
}
|
||||
|
||||
119
boards/arm/stm32h7/stm32h747i-disco/src/stm32_buttons.c
Normal file
119
boards/arm/stm32h7/stm32h747i-disco/src/stm32_buttons.c
Normal file
@ -0,0 +1,119 @@
|
||||
/****************************************************************************
|
||||
* boards/arm/stm32h7/stm32h747i-disco/src/stm32_buttons.c
|
||||
*
|
||||
* Copyright (C) 2019 Gregory Nutt. All rights reserved.
|
||||
* Authors: Gregory Nutt <gnutt@nuttx.org>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in
|
||||
* the documentation and/or other materials provided with the
|
||||
* distribution.
|
||||
* 3. Neither the name NuttX nor the names of its contributors may be
|
||||
* used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
|
||||
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
|
||||
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Included Files
|
||||
****************************************************************************/
|
||||
|
||||
#include <nuttx/config.h>
|
||||
|
||||
#include <stddef.h>
|
||||
#include <errno.h>
|
||||
|
||||
#include <nuttx/irq.h>
|
||||
#include <nuttx/board.h>
|
||||
|
||||
#include "stm32_gpio.h"
|
||||
#include "stm32h747i-disco.h"
|
||||
#include <arch/board/board.h>
|
||||
|
||||
#ifdef CONFIG_ARCH_BUTTONS
|
||||
|
||||
/****************************************************************************
|
||||
* Public Functions
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Name: board_button_initialize
|
||||
*
|
||||
* Description:
|
||||
* board_button_initialize() must be called to initialize button resources.
|
||||
* After that, board_buttons() may be called to collect the current state
|
||||
* of all buttons or board_button_irq() may be called to register button
|
||||
* interrupt handlers.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
void board_button_initialize(void)
|
||||
{
|
||||
stm32_configgpio(GPIO_BTN_USER);
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Name: board_buttons
|
||||
****************************************************************************/
|
||||
|
||||
uint32_t board_buttons(void)
|
||||
{
|
||||
return stm32_gpioread(GPIO_BTN_USER) ? 1 : 0;
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Button support.
|
||||
*
|
||||
* Description:
|
||||
* board_button_initialize() must be called to initialize button resources.
|
||||
* After that, board_buttons() may be called to collect the current state
|
||||
* of all buttons or board_button_irq() may be called to register button
|
||||
* interrupt handlers.
|
||||
*
|
||||
* After board_button_initialize() has been called, board_buttons() may be
|
||||
* called to collect the state of all buttons. board_buttons() returns a
|
||||
* 32-bit bit set with each bit associated with a button. See the
|
||||
* BUTTON_*_BIT definitions in board.h for the meaning of each bit.
|
||||
*
|
||||
* board_button_irq() may be called to register an interrupt handler that
|
||||
* will be called when a button is depressed or released. The ID value is
|
||||
* a button enumeration value that uniquely identifies a button resource.
|
||||
* See the BUTTON_* definitions in board.h for the meaning of enumeration
|
||||
* value.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
#ifdef CONFIG_ARCH_IRQBUTTONS
|
||||
int board_button_irq(int id, xcpt_t irqhandler, FAR void *arg)
|
||||
{
|
||||
int ret = -EINVAL;
|
||||
|
||||
if (id == BUTTON_USER)
|
||||
{
|
||||
ret = stm32_gpiosetevent(GPIO_BTN_USER, true, true, true,
|
||||
irqhandler, arg);
|
||||
}
|
||||
|
||||
return ret;
|
||||
}
|
||||
#endif
|
||||
#endif /* CONFIG_ARCH_BUTTONS */
|
||||
268
boards/arm/stm32h7/stm32h747i-disco/src/stm32_spi.c
Normal file
268
boards/arm/stm32h7/stm32h747i-disco/src/stm32_spi.c
Normal file
@ -0,0 +1,268 @@
|
||||
/****************************************************************************
|
||||
* boards/arm/stm32h7/stm32h747i-disco/src/stm32_spi.c
|
||||
*
|
||||
* Copyright (C) 2019 Gregory Nutt. All rights reserved.
|
||||
* Authors: Gregory Nutt <gnutt@nuttx.org>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in
|
||||
* the documentation and/or other materials provided with the
|
||||
* distribution.
|
||||
* 3. Neither the name NuttX nor the names of its contributors may be
|
||||
* used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
|
||||
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
|
||||
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Included Files
|
||||
****************************************************************************/
|
||||
|
||||
#include <nuttx/config.h>
|
||||
|
||||
#include <stdint.h>
|
||||
#include <stdbool.h>
|
||||
#include <errno.h>
|
||||
#include <debug.h>
|
||||
|
||||
#include <nuttx/spi/spi.h>
|
||||
|
||||
#include "up_arch.h"
|
||||
#include "chip.h"
|
||||
#include "stm32_gpio.h"
|
||||
#include "stm32_spi.h"
|
||||
|
||||
#include "stm32h747i-disco.h"
|
||||
#include <arch/board/board.h>
|
||||
|
||||
#ifdef CONFIG_STM32H7_SPI
|
||||
|
||||
/****************************************************************************
|
||||
* Public Functions
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Name: stm32_spidev_initialize
|
||||
*
|
||||
* Description:
|
||||
* Called to configure SPI chip select GPIO pins for the STM32H747I-DISCO
|
||||
* board.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
void stm32_spidev_initialize(void)
|
||||
{
|
||||
/* NOTE: Clocking for SPI1 and/or SPI3 was already provided in stm32_rcc.c.
|
||||
* Configurations of SPI pins is performed in stm32_spi.c.
|
||||
* Here, we only initialize chip select pins unique to the board
|
||||
* architecture.
|
||||
*/
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Name: stm32_spi1/2/3/4/5select and stm32_spi1/2/3/4/5status
|
||||
*
|
||||
* Description:
|
||||
* The external functions, stm32_spi1/2/3select and stm32_spi1/2/3status
|
||||
* must be provided by board-specific logic. They are implementations of
|
||||
* the select and status methods of the SPI interface defined by struct
|
||||
* spi_ops_s (see include/nuttx/spi/spi.h). All other methods (including
|
||||
* stm32_spibus_initialize()) are provided by common STM32 logic. To use
|
||||
* this common SPI logic on your board:
|
||||
*
|
||||
* 1. Provide logic in stm32_boardinitialize() to configure SPI chip select
|
||||
* pins.
|
||||
* 2. Provide stm32_spi1/2/3select() and stm32_spi1/2/3status() functions
|
||||
* in your board-specific logic. These functions will perform chip
|
||||
* selection and status operations using GPIOs in the way your board is
|
||||
* configured.
|
||||
* 3. Add a calls to stm32_spibus_initialize() in your low level application
|
||||
* initialization logic
|
||||
* 4. The handle returned by stm32_spibus_initialize() may then be used
|
||||
* to bind the SPI driver to higher level logic (e.g., calling
|
||||
* mmcsd_spislotinitialize(), for example, will bind the SPI driver to
|
||||
* the SPI MMC/SD driver).
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
#ifdef CONFIG_STM32H7_SPI1
|
||||
void stm32_spi1select(FAR struct spi_dev_s *dev, uint32_t devid,
|
||||
bool selected)
|
||||
{
|
||||
spiinfo("devid: %08lx CS: %s\n",
|
||||
(unsigned long)devid, selected ? "assert" : "de-assert");
|
||||
}
|
||||
|
||||
uint8_t stm32_spi1status(FAR struct spi_dev_s *dev, uint32_t devid)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_STM32H7_SPI2
|
||||
void stm32_spi2select(FAR struct spi_dev_s *dev, uint32_t devid,
|
||||
bool selected)
|
||||
{
|
||||
spiinfo("devid: %08lx CS: %s\n",
|
||||
(unsigned long)devid, selected ? "assert" : "de-assert");
|
||||
}
|
||||
|
||||
uint8_t stm32_spi2status(FAR struct spi_dev_s *dev, uint32_t devid)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_STM32H7_SPI3
|
||||
void stm32_spi3select(FAR struct spi_dev_s *dev, uint32_t devid,
|
||||
bool selected)
|
||||
{
|
||||
switch (devid)
|
||||
{
|
||||
default:
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
uint8_t stm32_spi3status(FAR struct spi_dev_s *dev, uint32_t devid)
|
||||
{
|
||||
uint8_t status = 0;
|
||||
switch (devid)
|
||||
{
|
||||
default:
|
||||
break;
|
||||
}
|
||||
|
||||
return status;
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_STM32H7_SPI4
|
||||
void stm32_spi4select(FAR struct spi_dev_s *dev, uint32_t devid,
|
||||
bool selected)
|
||||
{
|
||||
spiinfo("devid: %08lx CS: %s\n",
|
||||
(unsigned long)devid, selected ? "assert" : "de-assert");
|
||||
}
|
||||
|
||||
uint8_t stm32_spi4status(FAR struct spi_dev_s *dev, uint32_t devid)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_STM32H7_SPI5
|
||||
void stm32_spi5select(FAR struct spi_dev_s *dev, uint32_t devid,
|
||||
bool selected)
|
||||
{
|
||||
spiinfo("devid: %08lx CS: %s\n",
|
||||
(unsigned long)devid, selected ? "assert" : "de-assert");
|
||||
}
|
||||
|
||||
uint8_t stm32_spi5status(FAR struct spi_dev_s *dev, uint32_t devid)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_STM32H7_SPI6
|
||||
void stm32_spi6select(FAR struct spi_dev_s *dev, uint32_t devid,
|
||||
bool selected)
|
||||
{
|
||||
spiinfo("devid: %08lx CS: %s\n",
|
||||
(unsigned long)devid, selected ? "assert" : "de-assert");
|
||||
}
|
||||
|
||||
uint8_t stm32_spi6status(FAR struct spi_dev_s *dev, uint32_t devid)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
#endif
|
||||
|
||||
/****************************************************************************
|
||||
* Name: stm32_spi1cmddata
|
||||
*
|
||||
* Description:
|
||||
* Set or clear the SH1101A A0 or SD1306 D/C n bit to select data (true)
|
||||
* or command (false). This function must be provided by platform-specific
|
||||
* logic. This is an implementation of the cmddata method of the SPI
|
||||
* interface defined by struct spi_ops_s (see include/nuttx/spi/spi.h).
|
||||
*
|
||||
* Input Parameters:
|
||||
*
|
||||
* spi - SPI device that controls the bus the device that requires the CMD/
|
||||
* DATA selection.
|
||||
* devid - If there are multiple devices on the bus, this selects which one
|
||||
* to select cmd or data. NOTE: This design restricts, for example,
|
||||
* one one SPI display per SPI bus.
|
||||
* cmd - true: select command; false: select data
|
||||
*
|
||||
* Returned Value:
|
||||
* None
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
#ifdef CONFIG_SPI_CMDDATA
|
||||
#ifdef CONFIG_STM32H7_SPI1
|
||||
int stm32_spi1cmddata(FAR struct spi_dev_s *dev, uint32_t devid, bool cmd)
|
||||
{
|
||||
return -ENODEV;
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_STM32H7_SPI2
|
||||
int stm32_spi2cmddata(FAR struct spi_dev_s *dev, uint32_t devid, bool cmd)
|
||||
{
|
||||
return -ENODEV;
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_STM32H7_SPI3
|
||||
int stm32_spi3cmddata(FAR struct spi_dev_s *dev, uint32_t devid, bool cmd)
|
||||
{
|
||||
return -ENODEV;
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_STM32H7_SPI4
|
||||
int stm32_spi4cmddata(FAR struct spi_dev_s *dev, uint32_t devid, bool cmd)
|
||||
{
|
||||
return -ENODEV;
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_STM32H7_SPI5
|
||||
int stm32_spi5cmddata(FAR struct spi_dev_s *dev, uint32_t devid, bool cmd)
|
||||
{
|
||||
return -ENODEV;
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_STM32H7_SPI6
|
||||
int stm32_spi5cmddata(FAR struct spi_dev_s *dev, uint32_t devid, bool cmd)
|
||||
{
|
||||
return -ENODEV;
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* CONFIG_SPI_CMDDATA */
|
||||
#endif /* CONFIG_STM32H7_SPI */
|
||||
71
boards/arm/stm32h7/stm32h747i-disco/src/stm32_uid.c
Normal file
71
boards/arm/stm32h7/stm32h747i-disco/src/stm32_uid.c
Normal file
@ -0,0 +1,71 @@
|
||||
/****************************************************************************
|
||||
* boards/arm/stm32h7/stm32h747i-disco/src/stm32_uid.c
|
||||
*
|
||||
* Copyright (C) 2015 Marawan Ragab. All rights reserved.
|
||||
* Authors: Marawan Ragab <marawan31@gmail.com>
|
||||
* David Sidrane <david.sirane@nscdg.com>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in
|
||||
* the documentation and/or other materials provided with the
|
||||
* distribution.
|
||||
* 3. Neither the name NuttX nor the names of its contributors may be
|
||||
* used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
|
||||
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
|
||||
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Included Files
|
||||
****************************************************************************/
|
||||
|
||||
#include <nuttx/config.h>
|
||||
|
||||
#include <errno.h>
|
||||
#include "stm32_uid.h"
|
||||
|
||||
#include <nuttx/board.h>
|
||||
|
||||
/****************************************************************************
|
||||
* Pre-processor Definitions
|
||||
****************************************************************************/
|
||||
|
||||
#ifndef OK
|
||||
# define OK 0
|
||||
#endif
|
||||
|
||||
/****************************************************************************
|
||||
* Public Functions
|
||||
****************************************************************************/
|
||||
|
||||
#if defined(CONFIG_BOARDCTL_UNIQUEID)
|
||||
int board_uniqueid(uint8_t *uniqueid)
|
||||
{
|
||||
if (uniqueid == 0)
|
||||
{
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
stm32_get_uniqueid(uniqueid);
|
||||
return OK;
|
||||
}
|
||||
#endif
|
||||
326
boards/arm/stm32h7/stm32h747i-disco/src/stm32_usb.c
Normal file
326
boards/arm/stm32h7/stm32h747i-disco/src/stm32_usb.c
Normal file
@ -0,0 +1,326 @@
|
||||
/****************************************************************************
|
||||
* boards/arm/stm32h7/stm32h747i-disco/src/stm32_usb.c
|
||||
*
|
||||
* Copyright (C) 2019 Gregory Nutt. All rights reserved.
|
||||
* Author: Mateusz Szafoni <raiden00@railab.me>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in
|
||||
* the documentation and/or other materials provided with the
|
||||
* distribution.
|
||||
* 3. Neither the name NuttX nor the names of its contributors may be
|
||||
* used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
|
||||
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
|
||||
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Included Files
|
||||
****************************************************************************/
|
||||
|
||||
#include <nuttx/config.h>
|
||||
|
||||
#include <sys/types.h>
|
||||
#include <stdint.h>
|
||||
#include <stdbool.h>
|
||||
#include <sched.h>
|
||||
#include <errno.h>
|
||||
#include <assert.h>
|
||||
#include <debug.h>
|
||||
|
||||
#include <nuttx/kthread.h>
|
||||
#include <nuttx/usb/usbdev.h>
|
||||
#include <nuttx/usb/usbhost.h>
|
||||
#include <nuttx/usb/usbdev_trace.h>
|
||||
|
||||
#include "up_arch.h"
|
||||
#include "chip.h"
|
||||
#include "stm32_gpio.h"
|
||||
#include "stm32_otg.h"
|
||||
#include "stm32h747i-disco.h"
|
||||
|
||||
#ifdef CONFIG_STM32H7_OTGHS
|
||||
|
||||
/****************************************************************************
|
||||
* Pre-processor Definitions
|
||||
****************************************************************************/
|
||||
|
||||
#if defined(CONFIG_USBDEV) || defined(CONFIG_USBHOST)
|
||||
# define HAVE_USB 1
|
||||
#else
|
||||
# warning "CONFIG_STM32H7_OTGHS is enabled but neither CONFIG_USBDEV nor CONFIG_USBHOST"
|
||||
# undef HAVE_USB
|
||||
#endif
|
||||
|
||||
#ifndef CONFIG_STM32H747XI_DISCO_USBHOST_PRIO
|
||||
# define CONFIG_STM32H747XI_DISCO_USBHOST_PRIO 100
|
||||
#endif
|
||||
|
||||
#ifndef CONFIG_STM32H747XI_DISCO_USBHOST_STACKSIZE
|
||||
# define CONFIG_STM32H747XI_DISCO_USBHOST_STACKSIZE 1024
|
||||
#endif
|
||||
|
||||
/****************************************************************************
|
||||
* Private Data
|
||||
****************************************************************************/
|
||||
|
||||
#ifdef CONFIG_USBHOST
|
||||
static struct usbhost_connection_s *g_usbconn;
|
||||
#endif
|
||||
|
||||
/****************************************************************************
|
||||
* Private Functions
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Name: usbhost_waiter
|
||||
*
|
||||
* Description:
|
||||
* Wait for USB devices to be connected.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
#ifdef CONFIG_USBHOST
|
||||
static int usbhost_waiter(int argc, char *argv[])
|
||||
{
|
||||
struct usbhost_hubport_s *hport;
|
||||
|
||||
uinfo("Running\n");
|
||||
for (; ; )
|
||||
{
|
||||
/* Wait for the device to change state */
|
||||
|
||||
DEBUGVERIFY(CONN_WAIT(g_usbconn, &hport));
|
||||
uinfo("%s\n", hport->connected ? "connected" : "disconnected");
|
||||
|
||||
/* Did we just become connected? */
|
||||
|
||||
if (hport->connected)
|
||||
{
|
||||
/* Yes.. enumerate the newly connected device */
|
||||
|
||||
(void)CONN_ENUMERATE(g_usbconn, hport);
|
||||
}
|
||||
}
|
||||
|
||||
/* Keep the compiler from complaining */
|
||||
|
||||
return 0;
|
||||
}
|
||||
#endif
|
||||
|
||||
/****************************************************************************
|
||||
* Public Functions
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Name: stm32_usbinitialize
|
||||
*
|
||||
* Description:
|
||||
* Called from stm32_usbinitialize very early in inialization to setup
|
||||
* USB-related GPIO pins for the STM32H747I DISCO board.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
void stm32_usbinitialize(void)
|
||||
{
|
||||
/* Configure the Overcurrent GPIO */
|
||||
|
||||
#ifdef CONFIG_STM32H7_OTGHS
|
||||
stm32_configgpio(GPIO_OTGHS_OVER);
|
||||
#endif
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Name: stm32_usbhost_initialize
|
||||
*
|
||||
* Description:
|
||||
* Called at application startup time to initialize the USB host
|
||||
* functionality. This function will start a thread that will monitor for
|
||||
* device connection/disconnection events.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
#ifdef CONFIG_USBHOST
|
||||
int stm32_usbhost_initialize(void)
|
||||
{
|
||||
int pid;
|
||||
#if defined(CONFIG_USBHOST_HUB) || defined(CONFIG_USBHOST_MSC) || \
|
||||
defined(CONFIG_USBHOST_HIDKBD) || defined(CONFIG_USBHOST_HIDMOUSE)
|
||||
int ret;
|
||||
#endif
|
||||
|
||||
/* First, register all of the class drivers needed to support the drivers
|
||||
* that we care about:
|
||||
*/
|
||||
|
||||
uinfo("Register class drivers\n");
|
||||
|
||||
#ifdef CONFIG_USBHOST_HUB
|
||||
/* Initialize USB hub class support */
|
||||
|
||||
ret = usbhost_hub_initialize();
|
||||
if (ret < 0)
|
||||
{
|
||||
uerr("ERROR: usbhost_hub_initialize failed: %d\n", ret);
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_USBHOST_MSC
|
||||
/* Register the USB mass storage class class */
|
||||
|
||||
ret = usbhost_msc_initialize();
|
||||
if (ret != OK)
|
||||
{
|
||||
uerr("ERROR: Failed to register the mass storage class: %d\n", ret);
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_USBHOST_CDCACM
|
||||
/* Register the CDC/ACM serial class */
|
||||
|
||||
ret = usbhost_cdcacm_initialize();
|
||||
if (ret != OK)
|
||||
{
|
||||
uerr("ERROR: Failed to register the CDC/ACM serial class: %d\n", ret);
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_USBHOST_HIDKBD
|
||||
/* Initialize the HID keyboard class */
|
||||
|
||||
ret = usbhost_kbdinit();
|
||||
if (ret != OK)
|
||||
{
|
||||
uerr("ERROR: Failed to register the HID keyboard class\n");
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_USBHOST_HIDMOUSE
|
||||
/* Initialize the HID mouse class */
|
||||
|
||||
ret = usbhost_mouse_init();
|
||||
if (ret != OK)
|
||||
{
|
||||
uerr("ERROR: Failed to register the HID mouse class\n");
|
||||
}
|
||||
#endif
|
||||
|
||||
/* Then get an instance of the USB host interface */
|
||||
|
||||
uinfo("Initialize USB host\n");
|
||||
g_usbconn = stm32_otghshost_initialize(0);
|
||||
if (g_usbconn)
|
||||
{
|
||||
/* Start a thread to handle device connection. */
|
||||
|
||||
uinfo("Start usbhost_waiter\n");
|
||||
|
||||
pid = kthread_create("usbhost", CONFIG_STM32H747XI_DISCO_USBHOST_PRIO,
|
||||
CONFIG_STM32H747XI_DISCO_USBHOST_STACKSIZE,
|
||||
(main_t)usbhost_waiter, (FAR char * const *)NULL);
|
||||
return pid < 0 ? -ENOEXEC : OK;
|
||||
}
|
||||
|
||||
return -ENODEV;
|
||||
}
|
||||
#endif
|
||||
|
||||
/****************************************************************************
|
||||
* Name: stm32_usbhost_vbusdrive
|
||||
*
|
||||
* Description:
|
||||
* Enable/disable driving of VBUS 5V output. This function must be
|
||||
* provided be each platform that implements the STM32 OTG HS host
|
||||
* interface.
|
||||
*
|
||||
* "On-chip 5 V VBUS generation is not supported. For this reason, a
|
||||
* charge pump or, if 5 V are available on the application board, a basic
|
||||
* power switch, must be added externally to drive the 5 V VBUS line.
|
||||
* The external charge pump can be driven by any GPIO output. When the
|
||||
* application decides to power on VBUS using the chosen GPIO, it must
|
||||
* also set the port power bit in the host port control and status
|
||||
* register (PPWR bit in OTG_FS_HPRT).
|
||||
*
|
||||
* "The application uses this field to control power to this port, and the
|
||||
* core clears this bit on an overcurrent condition."
|
||||
*
|
||||
* Input Parameters:
|
||||
* iface - For future growth to handle multiple USB host interface.
|
||||
* Should be zero.
|
||||
* enable - true: enable VBUS power; false: disable VBUS power
|
||||
*
|
||||
* Returned Value:
|
||||
* None
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
#ifdef CONFIG_USBHOST
|
||||
void stm32_usbhost_vbusdrive(int iface, bool enable)
|
||||
{
|
||||
DEBUGASSERT(iface == 0);
|
||||
}
|
||||
#endif
|
||||
|
||||
/****************************************************************************
|
||||
* Name: stm32_setup_overcurrent
|
||||
*
|
||||
* Description:
|
||||
* Setup to receive an interrupt-level callback if an over-current
|
||||
* condition is detected.
|
||||
*
|
||||
* Input Parameters:
|
||||
* handler - New over-current interrupt handler
|
||||
* arg - The argument provided for the interrupt handler
|
||||
*
|
||||
* Returned Value:
|
||||
* Zero (OK) is returned on success. Otherwise, a negated errno value is
|
||||
* returned to indicate the nature of the failure.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
#ifdef CONFIG_USBHOST
|
||||
int stm32_setup_overcurrent(xcpt_t handler, void *arg)
|
||||
{
|
||||
return stm32_gpiosetevent(GPIO_OTGHS_OVER, true, true, true, handler, arg);
|
||||
}
|
||||
#endif
|
||||
|
||||
/****************************************************************************
|
||||
* Name: stm32_usbsuspend
|
||||
*
|
||||
* Description:
|
||||
* Board logic must provide the stm32_usbsuspend logic if the USBDEV
|
||||
* driver is used. This function is called whenever the USB enters or
|
||||
* leaves suspend mode. This is an opportunity for the board logic to
|
||||
* shutdown clocks, power, etc. while the USB is suspended.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
#ifdef CONFIG_USBDEV
|
||||
void stm32_usbsuspend(FAR struct usbdev_s *dev, bool resume)
|
||||
{
|
||||
uinfo("resume: %d\n", resume);
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* CONFIG_STM32_OTGHS */
|
||||
145
boards/arm/stm32h7/stm32h747i-disco/src/stm32_userleds.c
Normal file
145
boards/arm/stm32h7/stm32h747i-disco/src/stm32_userleds.c
Normal file
@ -0,0 +1,145 @@
|
||||
/****************************************************************************
|
||||
* boards/arm/stm32h7/stm32h747i-disco/src/stm32_userleds.c
|
||||
*
|
||||
* Copyright (C) 2019 Gregory Nutt. All rights reserved.
|
||||
* Authors: Gregory Nutt <gnutt@nuttx.org>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in
|
||||
* the documentation and/or other materials provided with the
|
||||
* distribution.
|
||||
* 3. Neither the name NuttX nor the names of its contributors may be
|
||||
* used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
|
||||
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
|
||||
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Included Files
|
||||
****************************************************************************/
|
||||
|
||||
#include <nuttx/config.h>
|
||||
|
||||
#include <stdbool.h>
|
||||
#include <debug.h>
|
||||
|
||||
#include <nuttx/board.h>
|
||||
#include <arch/board/board.h>
|
||||
|
||||
#include "stm32_gpio.h"
|
||||
#include "stm32h747i-disco.h"
|
||||
|
||||
#ifndef CONFIG_ARCH_LEDS
|
||||
|
||||
/****************************************************************************
|
||||
* Pre-processor Definitions
|
||||
****************************************************************************/
|
||||
|
||||
#define ARRAYSIZE(x) (sizeof((x)) / sizeof((x)[0]))
|
||||
|
||||
/****************************************************************************
|
||||
* Private Data
|
||||
****************************************************************************/
|
||||
|
||||
/* This array maps an LED number to GPIO pin configuration and is indexed by
|
||||
* BOARD_LED_<color>
|
||||
*/
|
||||
|
||||
static const uint32_t g_ledcfg[BOARD_NLEDS] =
|
||||
{
|
||||
GPIO_LED_GREEN,
|
||||
GPIO_LED_ORANGE,
|
||||
GPIO_LED_RED,
|
||||
GPIO_LED_BLUE,
|
||||
};
|
||||
|
||||
/****************************************************************************
|
||||
* Public Functions
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Name: board_userled_initialize
|
||||
*
|
||||
* Description:
|
||||
* If CONFIG_ARCH_LEDS is defined, then NuttX will control the on-board
|
||||
* LEDs. If CONFIG_ARCH_LEDS is not defined, then the
|
||||
* board_userled_initialize() is available to initialize the LED from user
|
||||
* application logic.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
void board_userled_initialize(void)
|
||||
{
|
||||
int i;
|
||||
|
||||
/* Configure LED1-3 GPIOs for output */
|
||||
|
||||
for (i = 0; i < ARRAYSIZE(g_ledcfg); i++)
|
||||
{
|
||||
stm32_configgpio(g_ledcfg[i]);
|
||||
}
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Name: board_userled
|
||||
*
|
||||
* Description:
|
||||
* If CONFIG_ARCH_LEDS is defined, then NuttX will control the on-board
|
||||
* LEDs. If CONFIG_ARCH_LEDS is not defined, then the board_userled() is
|
||||
* available to control the LED from user application logic.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
void board_userled(int led, bool ledon)
|
||||
{
|
||||
/* Active Low */
|
||||
|
||||
if ((unsigned)led < ARRAYSIZE(g_ledcfg))
|
||||
{
|
||||
stm32_gpiowrite(g_ledcfg[led], !ledon);
|
||||
}
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Name: board_userled_all
|
||||
*
|
||||
* Description:
|
||||
* If CONFIG_ARCH_LEDS is defined, then NuttX will control the on-board
|
||||
* LEDs. If CONFIG_ARCH_LEDS is not defined, then the board_userled_all() is
|
||||
* available to control the LED from user application logic. NOTE: since
|
||||
* there is only a single LED on-board, this is function is not very useful.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
void board_userled_all(uint8_t ledset)
|
||||
{
|
||||
/* Active Low */
|
||||
|
||||
int i;
|
||||
|
||||
for (i = 0; i < ARRAYSIZE(g_ledcfg); i++)
|
||||
{
|
||||
stm32_gpiowrite(g_ledcfg[i], (ledset & (1 << i)) == 0);
|
||||
}
|
||||
}
|
||||
|
||||
#endif /* !CONFIG_ARCH_LEDS */
|
||||
154
boards/arm/stm32h7/stm32h747i-disco/src/stm32h747i-disco.h
Normal file
154
boards/arm/stm32h7/stm32h747i-disco/src/stm32h747i-disco.h
Normal file
@ -0,0 +1,154 @@
|
||||
/****************************************************************************
|
||||
* boards/arm/stm32h7/stm32h747i-disco/src/stm32h747i-disco.h
|
||||
*
|
||||
# Copyright (C) 2017, 2019 Gwenhael Goavec-Merou. All rights reserved.
|
||||
# Authors: Gwenhael Goavec-Merou<gwenhael.goavec-merou@trabucayre.com>
|
||||
* David Sidrane <david.sidrane@nscdg.com>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in
|
||||
* the documentation and/or other materials provided with the
|
||||
* distribution.
|
||||
* 3. Neither the name NuttX nor the names of its contributors may be
|
||||
* used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
|
||||
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
|
||||
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
#ifndef __BOARDS_ARM_STM32H7_STM32H747I_DISCO_SRC_STM32H747I_DISCO_H
|
||||
#define __BOARDS_ARM_STM32H7_STM32H747I_DISCO_SRC_STM32H747I_DISCO_H
|
||||
|
||||
/****************************************************************************
|
||||
* Included Files
|
||||
****************************************************************************/
|
||||
|
||||
#include <nuttx/config.h>
|
||||
#include <nuttx/compiler.h>
|
||||
|
||||
#include <stdint.h>
|
||||
|
||||
/****************************************************************************
|
||||
* Pre-processor Definitions
|
||||
****************************************************************************/
|
||||
|
||||
/* Configuration ************************************************************/
|
||||
|
||||
/* procfs File System */
|
||||
|
||||
#ifdef CONFIG_FS_PROCFS
|
||||
# ifdef CONFIG_NSH_PROC_MOUNTPOINT
|
||||
# define STM32_PROCFS_MOUNTPOINT CONFIG_NSH_PROC_MOUNTPOINT
|
||||
# else
|
||||
# define STM32_PROCFS_MOUNTPOINT "/proc"
|
||||
# endif
|
||||
#endif
|
||||
|
||||
/* Check if we can support the RTC driver */
|
||||
|
||||
#define HAVE_RTC_DRIVER 1
|
||||
#if !defined(CONFIG_RTC) || !defined(CONFIG_RTC_DRIVER)
|
||||
# undef HAVE_RTC_DRIVER
|
||||
#endif
|
||||
|
||||
/* LED
|
||||
*
|
||||
* LD1 Green PI12
|
||||
* LD2 Orange PI13
|
||||
* LD3 Red PI14
|
||||
* LD4 Blue PI15
|
||||
*/
|
||||
|
||||
#define GPIO_LD1 (GPIO_OUTPUT | GPIO_PUSHPULL | GPIO_SPEED_50MHz | GPIO_OUTPUT_SET | \
|
||||
GPIO_PORTI | GPIO_PIN12)
|
||||
#define GPIO_LD2 (GPIO_OUTPUT | GPIO_PUSHPULL | GPIO_SPEED_50MHz | GPIO_OUTPUT_SET | \
|
||||
GPIO_PORTI | GPIO_PIN13)
|
||||
#define GPIO_LD3 (GPIO_OUTPUT | GPIO_PUSHPULL | GPIO_SPEED_50MHz | GPIO_OUTPUT_SET | \
|
||||
GPIO_PORTI | GPIO_PIN14)
|
||||
#define GPIO_LD4 (GPIO_OUTPUT | GPIO_PUSHPULL | GPIO_SPEED_50MHz | GPIO_OUTPUT_SET | \
|
||||
GPIO_PORTI | GPIO_PIN15)
|
||||
|
||||
#define GPIO_LED_GREEN GPIO_LD1
|
||||
#define GPIO_LED_ORANGE GPIO_LD2
|
||||
#define GPIO_LED_RED GPIO_LD3
|
||||
#define GPIO_LED_BLUE GPIO_LD4
|
||||
|
||||
#define LED_DRIVER_PATH "/dev/userleds"
|
||||
|
||||
/* BUTTONS
|
||||
*
|
||||
* The Blue pushbutton B1, labeled "Wakeup", is connected to GPIO PC13. A
|
||||
* high value will be sensed when the button is depressed.
|
||||
*
|
||||
* Notes:
|
||||
* 1) That the EXTI is included in the definition to enable an interrupt
|
||||
* on this IO.
|
||||
* 2) The following definitions assume the default Solder Bridges are
|
||||
* installed.
|
||||
*/
|
||||
|
||||
#define GPIO_BTN_USER (GPIO_INPUT | GPIO_FLOAT | GPIO_EXTI | GPIO_PORTC | GPIO_PIN13)
|
||||
|
||||
/****************************************************************************
|
||||
* Public Functions
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Name: stm32_bringup
|
||||
*
|
||||
* Description:
|
||||
* Perform architecture-specific initialization
|
||||
*
|
||||
* CONFIG_BOARD_LATE_INITIALIZE=y :
|
||||
* Called from board_late_initialize().
|
||||
*
|
||||
* CONFIG_BOARD_LATE_INITIALIZE=y && CONFIG_LIB_BOARDCTL=y :
|
||||
* Called from the NSH library
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
int stm32_bringup(void);
|
||||
|
||||
/****************************************************************************
|
||||
* Name: stm32_spidev_initialize
|
||||
*
|
||||
* Description:
|
||||
* Called to configure SPI chip select GPIO pins for the board.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
#ifdef CONFIG_STM32H7_SPI
|
||||
void stm32_spidev_initialize(void);
|
||||
#endif
|
||||
|
||||
/****************************************************************************
|
||||
* Name: stm32_adc_setup
|
||||
*
|
||||
* Description:
|
||||
* Initialize ADC and register the ADC driver.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
#ifdef CONFIG_ADC
|
||||
int stm32_adc_setup(void);
|
||||
#endif
|
||||
|
||||
#endif /* __BOARDS_ARM_STM32H7_STM32H747I_DISCO_SRC_STM32H747I_DISCO_H */
|
||||
Loading…
Reference in New Issue
Block a user