mmu: mmu enable should after enable SMP
Signed-off-by: ligd <liguiding1@xiaomi.com>
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parent
11cf3de776
commit
25d5cd11a1
3
arch/arm/src/armv7-a/arm_head.S
Normal file → Executable file
3
arch/arm/src/armv7-a/arm_head.S
Normal file → Executable file
@ -409,6 +409,7 @@ __start:
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bic r0, r0, #(SCTLR_SW | SCTLR_I | SCTLR_V | SCTLR_RR | SCTLR_HA)
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bic r0, r0, #(SCTLR_SW | SCTLR_I | SCTLR_V | SCTLR_RR | SCTLR_HA)
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bic r0, r0, #(SCTLR_EE | SCTLR_TRE | SCTLR_AFE | SCTLR_TE)
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bic r0, r0, #(SCTLR_EE | SCTLR_TRE | SCTLR_AFE | SCTLR_TE)
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#ifndef CONFIG_SMP
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/* Set bits to enable the MMU
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/* Set bits to enable the MMU
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*
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*
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* SCTLR_M Bit 0: Enable the MMU
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* SCTLR_M Bit 0: Enable the MMU
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@ -416,6 +417,8 @@ __start:
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*/
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*/
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orr r0, r0, #(SCTLR_M)
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orr r0, r0, #(SCTLR_M)
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#endif
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#ifndef CONFIG_ARCH_CORTEXA5
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#ifndef CONFIG_ARCH_CORTEXA5
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orr r0, r0, #(SCTLR_Z)
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orr r0, r0, #(SCTLR_Z)
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#endif
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#endif
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2
arch/arm/src/armv7-a/arm_scu.c
Normal file → Executable file
2
arch/arm/src/armv7-a/arm_scu.c
Normal file → Executable file
@ -203,6 +203,6 @@ void arm_enable_smp(int cpu)
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arm_set_actlr(regval);
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arm_set_actlr(regval);
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regval = arm_get_sctlr();
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regval = arm_get_sctlr();
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regval |= SCTLR_C | SCTLR_I;
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regval |= SCTLR_C | SCTLR_I | SCTLR_M;
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arm_set_sctlr(regval);
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arm_set_sctlr(regval);
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}
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}
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