Bring closer to NuttX coding standard.
This commit is contained in:
parent
f985b52587
commit
25e4e3c314
@ -12,9 +12,9 @@ config IEEE802154_MRF24J40
|
||||
This selection enables support for the Microchip MRF24J40 device.
|
||||
|
||||
config IEEE802154_AT86RF233
|
||||
bool "ATMEL RF233 IEEE 802.15.4 transceiver"
|
||||
default n
|
||||
---help---
|
||||
This selection enables support for the Atmel RF233 device.
|
||||
bool "ATMEL RF233 IEEE 802.15.4 transceiver"
|
||||
default n
|
||||
---help---
|
||||
This selection enables support for the Atmel RF233 device.
|
||||
|
||||
endif # DRIVERS_IEEE802154
|
||||
|
@ -32,6 +32,7 @@
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Included Files
|
||||
****************************************************************************/
|
||||
|
@ -1,204 +1,221 @@
|
||||
/*
|
||||
* at86rf23x.h
|
||||
/****************************************************************************
|
||||
* drivers/wireless/ieee802154/at86rf23x.c
|
||||
*
|
||||
* Copyright (C) 2016 Matt Poppe. All rights reserved.
|
||||
* Author: Matt Poppe <matt@poppe.me>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in
|
||||
* the documentation and/or other materials provided with the
|
||||
* distribution.
|
||||
* 3. Neither the name NuttX nor the names of its contributors may be
|
||||
* used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
|
||||
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
|
||||
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
* Created on: Feb 24, 2016
|
||||
* Author: poppe
|
||||
*/
|
||||
|
||||
#ifndef APPS_EXTERNAL_IEEE_AT86RF23X_H_
|
||||
#define APPS_EXTERNAL_IEEE_AT86RF23X_H_
|
||||
|
||||
#define RF23X_SPI_REG_READ 0x80
|
||||
#define RF23X_SPI_REG_WRITE 0xC0
|
||||
#define RF23X_SPI_FRAME_WRITE 0x60
|
||||
#define RF23X_SPI_FRAME_READ 0x20
|
||||
#define RF23X_SPI_SRAM_READ 0x00
|
||||
#define RF23X_SPI_SRAM_WRITE 0x40
|
||||
|
||||
/* us Times Constants for the RF233 */
|
||||
#define RF23X_TIME_RESET_BOOT 510
|
||||
#define RF23X_TIME_FORCE_TRXOFF 100
|
||||
#define RF23X_TIME_P_ON_TO_TRXOFF 510
|
||||
#define RF23X_TIME_SLEEP_TO_TRXOFF 1200
|
||||
#define RF23X_TIME_RESET 6
|
||||
#define RF23X_TIME_ED_MEASUREMENT 140
|
||||
#define RF23X_TIME_CCA 140
|
||||
#define RF23X_TIME_PLL_LOCK 150
|
||||
#define RF23X_TIME_FTN_TUNNING 25
|
||||
#define RF23X_TIME_NOCLK_TO_WAKE 6
|
||||
#define RF23X_TIME_CMD_FORCE_TRX_OFF 1
|
||||
#define RF23X_TIME_TRXOFF_TO_PLL 180
|
||||
#define RF23X_TIME_TRANSITION_PLL_ACTIVE 1
|
||||
#define RF23X_TIME_TRXOFF_TO_SLEEP 1200
|
||||
|
||||
#define RF23X_MAX_RETRY_RESET_TO_TRX_OFF 5
|
||||
|
||||
|
||||
#define RF23X_REG_TRXSTATUS 0x01
|
||||
#define RF23X_REG_TRXSTATE 0x02
|
||||
#define RF23X_REG_TRXCTRL0 0x03
|
||||
#define RF23X_REG_TRXCTRL1 0x04
|
||||
#define RF23X_REG_TXPWR 0x05
|
||||
#define RF23X_REG_RSSI 0x06
|
||||
#define RF23X_REG_EDLEVEL 0x07
|
||||
#define RF23X_REG_CCA 0x08
|
||||
#define RF23X_REG_THRES 0x09
|
||||
#define RF23X_REG_RXCTRL 0x0a
|
||||
#define RF23X_REG_SFD 0x0b
|
||||
#define RF23X_REG_TRXCTRL2 0x0c
|
||||
#define RF23X_REG_ANT_DIV 0x0d
|
||||
#define RF23X_REG_IRQ_MASK 0x0e
|
||||
#define RF23X_REG_IRQ_STATUS 0x0f
|
||||
#define RF23X_REG_VREG_CTRL 0x10
|
||||
#define RF23X_REG_BATMON 0x11
|
||||
#define RF23X_REG_XOSC_CTRL 0x12
|
||||
#define RF23X_REG_CCCTRL0 0x13
|
||||
#define RF23X_REG_CCCTRL1 0x14
|
||||
#define RF23X_REG_RXSYN 0x15
|
||||
#define RF23X_REG_TRXRPC 0x16
|
||||
#define RF23X_REG_XAHCTRL1 0x17
|
||||
#define RF23X_REG_FTNCTRL 0x18
|
||||
#define RF23X_REG_XAHCTRL2 0x19
|
||||
#define RF23X_REG_PLLCF 0x1a
|
||||
#define RF23X_REG_PLLDCU 0x1b
|
||||
#define RF23X_REG_PART 0x1c
|
||||
#define RF23X_REG_VERSION 0x1d
|
||||
#define RF23X_REG_MANID0 0x1e
|
||||
#define RF23X_REG_MANID1 0x1f
|
||||
#define RF23X_REG_SADDR0 0x20
|
||||
#define RF23X_REG_SADDR1 0x21
|
||||
#define RF23X_REG_PANID0 0x22
|
||||
#define RF23X_REG_PANID1 0x23
|
||||
#define RF23X_REG_IEEEADDR0 0x24
|
||||
#define RF23X_REG_IEEEADDR1 0x25
|
||||
#define RF23X_REG_IEEEADDR2 0x26
|
||||
#define RF23X_REG_IEEEADDR3 0x27
|
||||
#define RF23X_REG_IEEEADDR4 0x28
|
||||
#define RF23X_REG_IEEEADDR5 0x29
|
||||
#define RF23X_REG_IEEEADDR6 0x2a
|
||||
#define RF23X_REG_IEEEADDR7 0x2b
|
||||
#define RF23X_REG_XAHCTRL0 0x2c
|
||||
#define RF23X_REG_CSMASEED0 0x2d
|
||||
#define RF23X_REG_CSMASEED1 0x2e
|
||||
#define RF23X_REG_CSMABE 0x2f
|
||||
#define RF23X_REG_TSTCTRLDIGI 0x36
|
||||
#define RF23X_REG_TSTAGC 0x3c
|
||||
#define RF23X_REG_SDM 0x3d
|
||||
#define RF23X_REG_PHYTXTIME 0x3b
|
||||
#define RF23X_REG_PHYPMUVALUE 0x3b
|
||||
|
||||
|
||||
#define RF23X_TRXSTATUS_POS 0
|
||||
#define RF23X_TRXSTATUS_MASK 0x1f
|
||||
#define RF23X_TRXSTATUS_STATUS RF23X_REG_TRXSTATUS, RF23X_TRXSTATUS_POS, RF23X_TRXSTATUS_MASK
|
||||
|
||||
#define RF23X_TRXCMD_POS 0
|
||||
#define RF23X_TRXCMD_MASK 0x1f
|
||||
#define RF23X_TRXCMD_STATE RF23X_REG_TRXSTATE, RF23X_TRXCMD_POS, RF23X_TRXCMD_MASK
|
||||
|
||||
|
||||
#define RF23X_TXPWR_POS_4 0x00
|
||||
#define RF23X_TXPWR_POS_3_7 0x01
|
||||
#define RF23X_TXPWR_POS_3_4 0x02
|
||||
#define RF23X_TXPWR_POS_3 0x03
|
||||
#define RF23X_TXPWR_POS_2_5 0x04
|
||||
#define RF23X_TXPWR_POS_2 0x05
|
||||
#define RF23X_TXPWR_POS_1 0x06
|
||||
#define RF23X_TXPWR_0 0x07
|
||||
#define RF23X_TXPWR_NEG_1 0x08
|
||||
#define RF23X_TXPWR_NEG_2 0x09
|
||||
#define RF23X_TXPWR_NEG_3 0x0a
|
||||
#define RF23X_TXPWR_NEG_4 0x0b
|
||||
#define RF23X_TXPWR_NEG_6 0x0c
|
||||
#define RF23X_TXPWR_NEG_8 0x0d
|
||||
#define RF23X_TXPWR_NEG_12 0x0e
|
||||
#define RF23X_TXPWR_NEG_17 0x0f
|
||||
|
||||
/****************************************************************************
|
||||
* CCA_STATUS
|
||||
****************************************************************************/
|
||||
#define RF23X_CCA_MODE_CS_OR_ED 0x00
|
||||
#define RF23X_CCA_MODE_ED 0x01
|
||||
#define RF23X_CCA_MODE_CS 0x02
|
||||
#define RF23X_CCA_MODE_CS_AND_ED 0x03
|
||||
|
||||
#define RF23X_CCA_CHANNEL_POS 0
|
||||
#define RF23X_CCA_CHANNEL_MASK 0x1f
|
||||
#define RF23X_CCA_BITS_CHANNEL RF23X_REG_CCA, RF23X_CCA_CHANNEL_POS, RF23X_CCA_CHANNEL_MASK
|
||||
#define RF23X_CCA_MODE_POS 5
|
||||
#define RF23X_CCA_MODE_MASK 0x03
|
||||
#define RF23X_CCA_BITS_MODE RF23X_REG_CCA, RF23X_CCA_MODE_POS, RF23X_CCA_MODE_MASK
|
||||
|
||||
|
||||
/****************************************************************************
|
||||
* XAH CTRL 1
|
||||
****************************************************************************/
|
||||
#define RF23X_XAHCTRL1_PROM_MODE_POS 1
|
||||
#define RF23X_XAHCTRL1_PROM_MODE_MASK 0x01
|
||||
#define RF23X_XAHCTRL1_BITS_PROM_MODE RF23X_REG_XAHCTRL1, RF23X_XAHCTRL1_PROM_MODE_POS, RF23X_XAHCTRL1_PROM_MODE_MASK
|
||||
|
||||
/****************************************************************************
|
||||
* CSMA SEED 0
|
||||
****************************************************************************/
|
||||
|
||||
#ifndef __DRIVERS_WIRELESS_IEEE802154_AT86RF23X_H
|
||||
#define __DRIVERS_WIRELESS_IEEE802154_AT86RF23X_H
|
||||
|
||||
/****************************************************************************
|
||||
* CSMA SEED 1
|
||||
* Pre-processor Definitions
|
||||
****************************************************************************/
|
||||
#define RF23X_CSMASEED1_IAMCOORD_POS 3
|
||||
#define RF23X_CSMASEED1_IAMCOORD_MASK 0x1
|
||||
#define RF23X_CSMASEED1_IAMCOORD_BITS RF23X_REG_CSMASEED1, RF23X_CSMASEED1_IAMCOORD_POS, RF23X_CSMASEED1_IAMCOORD_MASK
|
||||
|
||||
#define RF23X_SPI_REG_READ 0x80
|
||||
#define RF23X_SPI_REG_WRITE 0xc0
|
||||
#define RF23X_SPI_FRAME_WRITE 0x60
|
||||
#define RF23X_SPI_FRAME_READ 0x20
|
||||
#define RF23X_SPI_SRAM_READ 0x00
|
||||
#define RF23X_SPI_SRAM_WRITE 0x40
|
||||
|
||||
/* US Times Constants for the RF233 */
|
||||
|
||||
#define RF23X_TIME_RESET_BOOT 510
|
||||
#define RF23X_TIME_FORCE_TRXOFF 100
|
||||
#define RF23X_TIME_P_ON_TO_TRXOFF 510
|
||||
#define RF23X_TIME_SLEEP_TO_TRXOFF 1200
|
||||
#define RF23X_TIME_RESET 6
|
||||
#define RF23X_TIME_ED_MEASUREMENT 140
|
||||
#define RF23X_TIME_CCA 140
|
||||
#define RF23X_TIME_PLL_LOCK 150
|
||||
#define RF23X_TIME_FTN_TUNNING 25
|
||||
#define RF23X_TIME_NOCLK_TO_WAKE 6
|
||||
#define RF23X_TIME_CMD_FORCE_TRX_OFF 1
|
||||
#define RF23X_TIME_TRXOFF_TO_PLL 180
|
||||
#define RF23X_TIME_TRANSITION_PLL_ACTIVE 1
|
||||
#define RF23X_TIME_TRXOFF_TO_SLEEP 1200
|
||||
|
||||
#define RF23X_MAX_RETRY_RESET_TO_TRX_OFF 5
|
||||
|
||||
#define RF23X_REG_TRXSTATUS 0x01
|
||||
#define RF23X_REG_TRXSTATE 0x02
|
||||
#define RF23X_REG_TRXCTRL0 0x03
|
||||
#define RF23X_REG_TRXCTRL1 0x04
|
||||
#define RF23X_REG_TXPWR 0x05
|
||||
#define RF23X_REG_RSSI 0x06
|
||||
#define RF23X_REG_EDLEVEL 0x07
|
||||
#define RF23X_REG_CCA 0x08
|
||||
#define RF23X_REG_THRES 0x09
|
||||
#define RF23X_REG_RXCTRL 0x0a
|
||||
#define RF23X_REG_SFD 0x0b
|
||||
#define RF23X_REG_TRXCTRL2 0x0c
|
||||
#define RF23X_REG_ANT_DIV 0x0d
|
||||
#define RF23X_REG_IRQ_MASK 0x0e
|
||||
#define RF23X_REG_IRQ_STATUS 0x0f
|
||||
#define RF23X_REG_VREG_CTRL 0x10
|
||||
#define RF23X_REG_BATMON 0x11
|
||||
#define RF23X_REG_XOSC_CTRL 0x12
|
||||
#define RF23X_REG_CCCTRL0 0x13
|
||||
#define RF23X_REG_CCCTRL1 0x14
|
||||
#define RF23X_REG_RXSYN 0x15
|
||||
#define RF23X_REG_TRXRPC 0x16
|
||||
#define RF23X_REG_XAHCTRL1 0x17
|
||||
#define RF23X_REG_FTNCTRL 0x18
|
||||
#define RF23X_REG_XAHCTRL2 0x19
|
||||
#define RF23X_REG_PLLCF 0x1a
|
||||
#define RF23X_REG_PLLDCU 0x1b
|
||||
#define RF23X_REG_PART 0x1c
|
||||
#define RF23X_REG_VERSION 0x1d
|
||||
#define RF23X_REG_MANID0 0x1e
|
||||
#define RF23X_REG_MANID1 0x1f
|
||||
#define RF23X_REG_SADDR0 0x20
|
||||
#define RF23X_REG_SADDR1 0x21
|
||||
#define RF23X_REG_PANID0 0x22
|
||||
#define RF23X_REG_PANID1 0x23
|
||||
#define RF23X_REG_IEEEADDR0 0x24
|
||||
#define RF23X_REG_IEEEADDR1 0x25
|
||||
#define RF23X_REG_IEEEADDR2 0x26
|
||||
#define RF23X_REG_IEEEADDR3 0x27
|
||||
#define RF23X_REG_IEEEADDR4 0x28
|
||||
#define RF23X_REG_IEEEADDR5 0x29
|
||||
#define RF23X_REG_IEEEADDR6 0x2a
|
||||
#define RF23X_REG_IEEEADDR7 0x2b
|
||||
#define RF23X_REG_XAHCTRL0 0x2c
|
||||
#define RF23X_REG_CSMASEED0 0x2d
|
||||
#define RF23X_REG_CSMASEED1 0x2e
|
||||
#define RF23X_REG_CSMABE 0x2f
|
||||
#define RF23X_REG_TSTCTRLDIGI 0x36
|
||||
#define RF23X_REG_TSTAGC 0x3c
|
||||
#define RF23X_REG_SDM 0x3d
|
||||
#define RF23X_REG_PHYTXTIME 0x3b
|
||||
#define RF23X_REG_PHYPMUVALUE 0x3b
|
||||
|
||||
#define RF23X_TRXSTATUS_POS 0
|
||||
#define RF23X_TRXSTATUS_MASK 0x1f
|
||||
#define RF23X_TRXSTATUS_STATUS RF23X_REG_TRXSTATUS, RF23X_TRXSTATUS_POS, RF23X_TRXSTATUS_MASK
|
||||
|
||||
#define RF23X_TRXCMD_POS 0
|
||||
#define RF23X_TRXCMD_MASK 0x1f
|
||||
#define RF23X_TRXCMD_STATE RF23X_REG_TRXSTATE, RF23X_TRXCMD_POS, RF23X_TRXCMD_MASK
|
||||
|
||||
#define RF23X_TXPWR_POS_4 0x00
|
||||
#define RF23X_TXPWR_POS_3_7 0x01
|
||||
#define RF23X_TXPWR_POS_3_4 0x02
|
||||
#define RF23X_TXPWR_POS_3 0x03
|
||||
#define RF23X_TXPWR_POS_2_5 0x04
|
||||
#define RF23X_TXPWR_POS_2 0x05
|
||||
#define RF23X_TXPWR_POS_1 0x06
|
||||
#define RF23X_TXPWR_0 0x07
|
||||
#define RF23X_TXPWR_NEG_1 0x08
|
||||
#define RF23X_TXPWR_NEG_2 0x09
|
||||
#define RF23X_TXPWR_NEG_3 0x0a
|
||||
#define RF23X_TXPWR_NEG_4 0x0b
|
||||
#define RF23X_TXPWR_NEG_6 0x0c
|
||||
#define RF23X_TXPWR_NEG_8 0x0d
|
||||
#define RF23X_TXPWR_NEG_12 0x0e
|
||||
#define RF23X_TXPWR_NEG_17 0x0f
|
||||
|
||||
/* CCA_STATUS */
|
||||
|
||||
#define RF23X_CCA_MODE_CS_OR_ED 0x00
|
||||
#define RF23X_CCA_MODE_ED 0x01
|
||||
#define RF23X_CCA_MODE_CS 0x02
|
||||
#define RF23X_CCA_MODE_CS_AND_ED 0x03
|
||||
|
||||
#define RF23X_CCA_CHANNEL_POS 0
|
||||
#define RF23X_CCA_CHANNEL_MASK 0x1f
|
||||
#define RF23X_CCA_BITS_CHANNEL RF23X_REG_CCA, RF23X_CCA_CHANNEL_POS, RF23X_CCA_CHANNEL_MASK
|
||||
#define RF23X_CCA_MODE_POS 5
|
||||
#define RF23X_CCA_MODE_MASK 0x03
|
||||
#define RF23X_CCA_BITS_MODE RF23X_REG_CCA, RF23X_CCA_MODE_POS, RF23X_CCA_MODE_MASK
|
||||
|
||||
/* XAH CTRL 1 */
|
||||
|
||||
#define RF23X_XAHCTRL1_PROM_MODE_POS 1
|
||||
#define RF23X_XAHCTRL1_PROM_MODE_MASK 0x01
|
||||
#define RF23X_XAHCTRL1_BITS_PROM_MODE RF23X_REG_XAHCTRL1, RF23X_XAHCTRL1_PROM_MODE_POS, RF23X_XAHCTRL1_PROM_MODE_MASK
|
||||
|
||||
/* CSMA SEED 0 */
|
||||
|
||||
/* CSMA SEED 1 */
|
||||
|
||||
#define RF23X_CSMASEED1_IAMCOORD_POS 3
|
||||
#define RF23X_CSMASEED1_IAMCOORD_MASK 0x1
|
||||
#define RF23X_CSMASEED1_IAMCOORD_BITS RF23X_REG_CSMASEED1, RF23X_CSMASEED1_IAMCOORD_POS, RF23X_CSMASEED1_IAMCOORD_MASK
|
||||
|
||||
#define RF23X_CSMASEED1_AACK_DIS_ACK_POS
|
||||
#define RF23X_CSMASEED1_AACK_SET_PD_POS
|
||||
#define RF23X_CSMASEED1_AACK_FVN_MODE_POS
|
||||
#define RF23X_CSMASEED1_
|
||||
|
||||
/* TRX Status */
|
||||
|
||||
/****************************************************************************
|
||||
* TRX Status
|
||||
****************************************************************************/
|
||||
#define TRX_STATUS_PON 0x00
|
||||
#define TRX_STATUS_BUSYRX 0x01
|
||||
#define TRX_STATUS_BUSYTX 0x02
|
||||
#define TRX_STATUS_RXON 0x06
|
||||
#define TRX_STATUS_TRXOFF 0x08
|
||||
#define TRX_STATUS_PLLON 0x09
|
||||
#define TRX_STATUS_SLEEP 0x0f
|
||||
#define TRX_STATUS_DEEPSLEEP 0x10
|
||||
#define TRX_STATUS_BUSYRXACK 0x11
|
||||
#define TRX_STATUS_BUSYTXARET 0x12
|
||||
#define TRX_STATUS_RXAACKON 0x16
|
||||
#define TRX_STATUS_TXARETON 0x19
|
||||
#define TRX_STATUS_STATEINTRANS 0x1f
|
||||
#define TRX_STATUS_PON 0x00
|
||||
#define TRX_STATUS_BUSYRX 0x01
|
||||
#define TRX_STATUS_BUSYTX 0x02
|
||||
#define TRX_STATUS_RXON 0x06
|
||||
#define TRX_STATUS_TRXOFF 0x08
|
||||
#define TRX_STATUS_PLLON 0x09
|
||||
#define TRX_STATUS_SLEEP 0x0f
|
||||
#define TRX_STATUS_DEEPSLEEP 0x10
|
||||
#define TRX_STATUS_BUSYRXACK 0x11
|
||||
#define TRX_STATUS_BUSYTXARET 0x12
|
||||
#define TRX_STATUS_RXAACKON 0x16
|
||||
#define TRX_STATUS_TXARETON 0x19
|
||||
#define TRX_STATUS_STATEINTRANS 0x1f
|
||||
|
||||
/****************************************************************************
|
||||
* TRX Command
|
||||
****************************************************************************/
|
||||
#define TRX_CMD_NOP 0x00
|
||||
#define TRX_CMD_TX 0x02
|
||||
#define TRX_CMD_FORCETRXOFF 0x03
|
||||
#define TRX_CMD_FORCE_PLLON 0x04
|
||||
#define TRX_CMD_RX_ON 0x06
|
||||
#define TRX_CMD_TRXOFF 0x08
|
||||
#define TRX_CMD_PLL_ON 0x09
|
||||
#define TRX_CMD_PREP_DEEPSLEEP 0x10
|
||||
#define TRX_CMD_RX_AACK_ON 0x16
|
||||
#define TRX_CMD_TX_ARET_ON 0x19
|
||||
/* TRX Command */
|
||||
|
||||
#define TRX_CMD_NOP 0x00
|
||||
#define TRX_CMD_TX 0x02
|
||||
#define TRX_CMD_FORCETRXOFF 0x03
|
||||
#define TRX_CMD_FORCE_PLLON 0x04
|
||||
#define TRX_CMD_RX_ON 0x06
|
||||
#define TRX_CMD_TRXOFF 0x08
|
||||
#define TRX_CMD_PLL_ON 0x09
|
||||
#define TRX_CMD_PREP_DEEPSLEEP 0x10
|
||||
#define TRX_CMD_RX_AACK_ON 0x16
|
||||
#define TRX_CMD_TX_ARET_ON 0x19
|
||||
|
||||
/****************************************************************************
|
||||
* IRQ MASK 0x0E
|
||||
****************************************************************************/
|
||||
#define RF23X_IRQ_MASK_LOCK_PLL (1<<0)
|
||||
#define RF23X_IRQ_MASK_UNLOCK_PLL (1<<1)
|
||||
#define RF23X_IRQ_MASK_RX_START (1<<2)
|
||||
#define RF23X_IRQ_MASK_TRX_END (1<<3)
|
||||
#define RF23X_IRQ_MASK_CCA_ED_DONE (1<<4)
|
||||
#define RF23X_IRQ_MASK_AMI (1<<5)
|
||||
#define RF23X_IRQ_MASK_TRX_UR (1<<6)
|
||||
#define RF23X_IRQ_MASK_BAT_LOW (1<<7)
|
||||
/* IRQ MASK 0x0e */
|
||||
|
||||
#define RF23X_IRQ_MASK_DEFAULT (RF23X_IRQ_MASK_TRX_END)
|
||||
#define RF23X_IRQ_MASK_LOCK_PLL (1 << 0)
|
||||
#define RF23X_IRQ_MASK_UNLOCK_PLL (1 << 1)
|
||||
#define RF23X_IRQ_MASK_RX_START (1 << 2)
|
||||
#define RF23X_IRQ_MASK_TRX_END (1 << 3)
|
||||
#define RF23X_IRQ_MASK_CCA_ED_DONE (1 << 4)
|
||||
#define RF23X_IRQ_MASK_AMI (1 << 5)
|
||||
#define RF23X_IRQ_MASK_TRX_UR (1 << 6)
|
||||
#define RF23X_IRQ_MASK_BAT_LOW (1 << 7)
|
||||
|
||||
#define RF23X_IRQ_MASK_DEFAULT (RF23X_IRQ_MASK_TRX_END)
|
||||
|
||||
#endif /* APPS_EXTERNAL_IEEE_AT86RF23X_H_ */
|
||||
#endif /* __DRIVERS_WIRELESS_IEEE802154_AT86RF23X_H */
|
||||
|
@ -65,7 +65,7 @@
|
||||
****************************************************************************/
|
||||
|
||||
#ifndef CONFIG_SCHED_HPWORK
|
||||
#error High priority work queue required in this driver
|
||||
# error High priority work queue required in this driver
|
||||
#endif
|
||||
|
||||
#ifndef CONFIG_IEEE802154_MRF24J40_SPIMODE
|
||||
@ -160,44 +160,69 @@ struct mrf24j40_radio_s
|
||||
|
||||
/* Internal operations */
|
||||
|
||||
static void mrf24j40_lock (FAR struct spi_dev_s *spi);
|
||||
static void mrf24j40_lock(FAR struct spi_dev_s *spi);
|
||||
|
||||
static void mrf24j40_setreg (FAR struct spi_dev_s *spi, uint32_t addr, uint8_t val);
|
||||
static uint8_t mrf24j40_getreg (FAR struct spi_dev_s *spi, uint32_t addr);
|
||||
static void mrf24j40_setreg(FAR struct spi_dev_s *spi, uint32_t addr,
|
||||
uint8_t val);
|
||||
static uint8_t mrf24j40_getreg(FAR struct spi_dev_s *spi, uint32_t addr);
|
||||
|
||||
static int mrf24j40_resetrfsm (FAR struct mrf24j40_radio_s *dev);
|
||||
static int mrf24j40_pacontrol (FAR struct mrf24j40_radio_s *dev, int mode);
|
||||
static int mrf24j40_initialize(FAR struct mrf24j40_radio_s *dev);
|
||||
static int mrf24j40_resetrfsm(FAR struct mrf24j40_radio_s *dev);
|
||||
static int mrf24j40_pacontrol(FAR struct mrf24j40_radio_s *dev, int mode);
|
||||
static int mrf24j40_initialize(FAR struct mrf24j40_radio_s *dev);
|
||||
|
||||
static int mrf24j40_setrxmode (FAR struct mrf24j40_radio_s *dev, int mode);
|
||||
static int mrf24j40_regdump (FAR struct mrf24j40_radio_s *dev);
|
||||
static void mrf24j40_irqwork_rx(FAR struct mrf24j40_radio_s *dev);
|
||||
static void mrf24j40_irqwork_tx(FAR struct mrf24j40_radio_s *dev);
|
||||
static void mrf24j40_irqworker (FAR void *arg);
|
||||
static int mrf24j40_interrupt (int irq, FAR void *context);
|
||||
static int mrf24j40_setrxmode(FAR struct mrf24j40_radio_s *dev, int mode);
|
||||
static int mrf24j40_regdump(FAR struct mrf24j40_radio_s *dev);
|
||||
static void mrf24j40_irqwork_rx(FAR struct mrf24j40_radio_s *dev);
|
||||
static void mrf24j40_irqwork_tx(FAR struct mrf24j40_radio_s *dev);
|
||||
static void mrf24j40_irqworker(FAR void *arg);
|
||||
static int mrf24j40_interrupt(int irq, FAR void *context);
|
||||
|
||||
/* Driver operations */
|
||||
|
||||
static int mrf24j40_setchannel (FAR struct ieee802154_radio_s *ieee, uint8_t chan);
|
||||
static int mrf24j40_getchannel (FAR struct ieee802154_radio_s *ieee, FAR uint8_t *chan);
|
||||
static int mrf24j40_setpanid (FAR struct ieee802154_radio_s *ieee, uint16_t panid);
|
||||
static int mrf24j40_getpanid (FAR struct ieee802154_radio_s *ieee, FAR uint16_t *panid);
|
||||
static int mrf24j40_setsaddr (FAR struct ieee802154_radio_s *ieee, uint16_t saddr);
|
||||
static int mrf24j40_getsaddr (FAR struct ieee802154_radio_s *ieee, FAR uint16_t *saddr);
|
||||
static int mrf24j40_seteaddr (FAR struct ieee802154_radio_s *ieee, FAR uint8_t *eaddr);
|
||||
static int mrf24j40_geteaddr (FAR struct ieee802154_radio_s *ieee, FAR uint8_t *eaddr);
|
||||
static int mrf24j40_setpromisc (FAR struct ieee802154_radio_s *ieee, bool promisc);
|
||||
static int mrf24j40_getpromisc (FAR struct ieee802154_radio_s *ieee, FAR bool *promisc);
|
||||
static int mrf24j40_setdevmode (FAR struct ieee802154_radio_s *ieee, uint8_t mode);
|
||||
static int mrf24j40_getdevmode (FAR struct ieee802154_radio_s *ieee, FAR uint8_t *mode);
|
||||
static int mrf24j40_settxpower (FAR struct ieee802154_radio_s *ieee, int32_t txpwr);
|
||||
static int mrf24j40_gettxpower (FAR struct ieee802154_radio_s *ieee, FAR int32_t *txpwr);
|
||||
static int mrf24j40_setcca (FAR struct ieee802154_radio_s *ieee, FAR struct ieee802154_cca_s *cca);
|
||||
static int mrf24j40_getcca (FAR struct ieee802154_radio_s *ieee, FAR struct ieee802154_cca_s *cca);
|
||||
static int mrf24j40_ioctl (FAR struct ieee802154_radio_s *ieee, int cmd, unsigned long arg);
|
||||
static int mrf24j40_energydetect(FAR struct ieee802154_radio_s *ieee, FAR uint8_t *energy);
|
||||
static int mrf24j40_rxenable (FAR struct ieee802154_radio_s *ieee, bool state, FAR struct ieee802154_packet_s *packet);
|
||||
static int mrf24j40_transmit (FAR struct ieee802154_radio_s *ieee, FAR struct ieee802154_packet_s *packet);
|
||||
static int mrf24j40_setchannel(FAR struct ieee802154_radio_s *ieee,
|
||||
uint8_t chan);
|
||||
static int mrf24j40_getchannel(FAR struct ieee802154_radio_s *ieee,
|
||||
FAR uint8_t *chan);
|
||||
static int mrf24j40_setpanid(FAR struct ieee802154_radio_s *ieee,
|
||||
uint16_t panid);
|
||||
static int mrf24j40_getpanid(FAR struct ieee802154_radio_s *ieee,
|
||||
FAR uint16_t *panid);
|
||||
static int mrf24j40_setsaddr(FAR struct ieee802154_radio_s *ieee,
|
||||
uint16_t saddr);
|
||||
static int mrf24j40_getsaddr(FAR struct ieee802154_radio_s *ieee,
|
||||
FAR uint16_t *saddr);
|
||||
static int mrf24j40_seteaddr(FAR struct ieee802154_radio_s *ieee,
|
||||
FAR uint8_t *eaddr);
|
||||
static int mrf24j40_geteaddr(FAR struct ieee802154_radio_s *ieee,
|
||||
FAR uint8_t *eaddr);
|
||||
static int mrf24j40_setpromisc(FAR struct ieee802154_radio_s *ieee,
|
||||
bool promisc);
|
||||
static int mrf24j40_getpromisc(FAR struct ieee802154_radio_s *ieee,
|
||||
FAR bool *promisc);
|
||||
static int mrf24j40_setdevmode(FAR struct ieee802154_radio_s *ieee,
|
||||
uint8_t mode);
|
||||
static int mrf24j40_getdevmode(FAR struct ieee802154_radio_s *ieee,
|
||||
FAR uint8_t *mode);
|
||||
static int mrf24j40_settxpower(FAR struct ieee802154_radio_s *ieee,
|
||||
int32_t txpwr);
|
||||
static int mrf24j40_gettxpower(FAR struct ieee802154_radio_s *ieee,
|
||||
FAR int32_t *txpwr);
|
||||
static int mrf24j40_setcca(FAR struct ieee802154_radio_s *ieee,
|
||||
FAR struct ieee802154_cca_s *cca);
|
||||
static int mrf24j40_getcca(FAR struct ieee802154_radio_s *ieee,
|
||||
FAR struct ieee802154_cca_s *cca);
|
||||
static int mrf24j40_ioctl(FAR struct ieee802154_radio_s *ieee, int cmd,
|
||||
unsigned long arg);
|
||||
static int mrf24j40_energydetect(FAR struct ieee802154_radio_s *ieee,
|
||||
FAR uint8_t *energy);
|
||||
static int mrf24j40_rxenable(FAR struct ieee802154_radio_s *ieee,
|
||||
bool state, FAR struct ieee802154_packet_s *packet);
|
||||
static int mrf24j40_transmit(FAR struct ieee802154_radio_s *ieee,
|
||||
FAR struct ieee802154_packet_s *packet);
|
||||
|
||||
/****************************************************************************
|
||||
* Private Data
|
||||
****************************************************************************/
|
||||
|
||||
/* These are pointers to ALL registered MRF24J40 devices.
|
||||
* This table is used during irqs to find the context
|
||||
@ -228,8 +253,6 @@ static const struct ieee802154_radioops_s mrf24j40_devops =
|
||||
* Private Functions
|
||||
****************************************************************************/
|
||||
|
||||
/* Hardware access routines */
|
||||
|
||||
/****************************************************************************
|
||||
* Name: mrf24j40_lock
|
||||
*
|
||||
@ -240,9 +263,9 @@ static const struct ieee802154_radioops_s mrf24j40_devops =
|
||||
|
||||
static void mrf24j40_lock(FAR struct spi_dev_s *spi)
|
||||
{
|
||||
SPI_LOCK (spi, 1);
|
||||
SPI_SETBITS (spi, 8);
|
||||
SPI_SETMODE (spi, CONFIG_IEEE802154_MRF24J40_SPIMODE);
|
||||
SPI_LOCK(spi, 1);
|
||||
SPI_SETBITS(spi, 8);
|
||||
SPI_SETMODE(spi, CONFIG_IEEE802154_MRF24J40_SPIMODE);
|
||||
SPI_SETFREQUENCY(spi, CONFIG_IEEE802154_MRF24J40_FREQUENCY);
|
||||
}
|
||||
|
||||
@ -267,7 +290,8 @@ static inline void mrf24j40_unlock(FAR struct spi_dev_s *spi)
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
static void mrf24j40_setreg(FAR struct spi_dev_s *spi, uint32_t addr, uint8_t val)
|
||||
static void mrf24j40_setreg(FAR struct spi_dev_s *spi, uint32_t addr,
|
||||
uint8_t val)
|
||||
{
|
||||
uint8_t buf[3];
|
||||
int len;
|
||||
@ -342,8 +366,8 @@ static uint8_t mrf24j40_getreg(FAR struct spi_dev_s *spi, uint32_t addr)
|
||||
SPI_SELECT (spi, SPIDEV_IEEE802154, false);
|
||||
mrf24j40_unlock(spi);
|
||||
|
||||
/*wlinfo("r[%04X]=%02X\n", addr, rx[len-1]);*/
|
||||
return rx[len-1];
|
||||
/* wlinfo("r[%04X]=%02X\n", addr, rx[len - 1]); */
|
||||
return rx[len - 1];
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
@ -457,12 +481,13 @@ static int mrf24j40_initialize(FAR struct mrf24j40_radio_s *dev)
|
||||
static int mrf24j40_setrxmode(FAR struct mrf24j40_radio_s *dev, int mode)
|
||||
{
|
||||
uint8_t reg;
|
||||
|
||||
if (mode < MRF24J40_RXMODE_NORMAL || mode > MRF24J40_RXMODE_NOCRC)
|
||||
{
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
reg = mrf24j40_getreg(dev->spi, MRF24J40_RXMCR);
|
||||
reg = mrf24j40_getreg(dev->spi, MRF24J40_RXMCR);
|
||||
reg &= ~0x03;
|
||||
reg |= mode;
|
||||
|
||||
@ -471,11 +496,13 @@ static int mrf24j40_setrxmode(FAR struct mrf24j40_radio_s *dev, int mode)
|
||||
if (mode != MRF24J40_RXMODE_NORMAL)
|
||||
{
|
||||
/* Promisc and error modes: Disable auto ACK */
|
||||
|
||||
reg |= MRF24J40_RXMCR_NOACKRSP;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Normal mode : enable auto-ACK */
|
||||
|
||||
reg &= ~MRF24J40_RXMCR_NOACKRSP;
|
||||
}
|
||||
|
||||
@ -486,8 +513,6 @@ static int mrf24j40_setrxmode(FAR struct mrf24j40_radio_s *dev, int mode)
|
||||
return OK;
|
||||
}
|
||||
|
||||
/* Publicized driver routines */
|
||||
|
||||
/****************************************************************************
|
||||
* Name: mrf24j40_setchannel
|
||||
*
|
||||
@ -506,7 +531,8 @@ static int mrf24j40_setchannel(FAR struct ieee802154_radio_s *ieee,
|
||||
uint8_t chan)
|
||||
{
|
||||
FAR struct mrf24j40_radio_s *dev = (FAR struct mrf24j40_radio_s *)ieee;
|
||||
if (chan<11 || chan>26)
|
||||
|
||||
if (chan < 11 || chan > 26)
|
||||
{
|
||||
wlerr("ERROR: Invalid chan: %d\n",chan);
|
||||
return -EINVAL;
|
||||
@ -640,10 +666,9 @@ static int mrf24j40_seteaddr(FAR struct ieee802154_radio_s *ieee,
|
||||
FAR uint8_t *eaddr)
|
||||
{
|
||||
FAR struct mrf24j40_radio_s *dev = (FAR struct mrf24j40_radio_s *)ieee;
|
||||
|
||||
int i;
|
||||
|
||||
for (i=0; i<8; i++)
|
||||
for (i = 0; i < 8; i++)
|
||||
{
|
||||
mrf24j40_setreg(dev->spi, MRF24J40_EADR0 + i, eaddr[i]);
|
||||
dev->eaddr[i] = eaddr[i];
|
||||
@ -824,14 +849,36 @@ static int mrf24j40_settxpower(FAR struct ieee802154_radio_s *ieee,
|
||||
case -9:
|
||||
case -8:
|
||||
case -7:
|
||||
case -6: reg |= 0x07; break;
|
||||
case -5: reg |= 0x06; break;
|
||||
case -4: reg |= 0x05; break;
|
||||
case -3: reg |= 0x04; break;
|
||||
case -2: reg |= 0x03; break;
|
||||
case -1: reg |= 0x02; break;
|
||||
case 0: reg |= 0x00; break; /* value 0x01 is 0.5 db, not used */
|
||||
default: return -EINVAL;
|
||||
case -6:
|
||||
reg |= 0x07;
|
||||
break;
|
||||
|
||||
case -5:
|
||||
reg |= 0x06;
|
||||
break;
|
||||
|
||||
case -4:
|
||||
reg |= 0x05;
|
||||
break;
|
||||
|
||||
case -3:
|
||||
reg |= 0x04;
|
||||
break;
|
||||
|
||||
case -2:
|
||||
reg |= 0x03;
|
||||
break;
|
||||
|
||||
case -1:
|
||||
reg |= 0x02;
|
||||
break;
|
||||
|
||||
case 0:
|
||||
reg |= 0x00; /* value 0x01 is 0.5 db, not used */
|
||||
break;
|
||||
|
||||
default:
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
mrf24j40_setreg(dev->spi, MRF24J40_RFCON3, reg);
|
||||
@ -899,7 +946,6 @@ static int mrf24j40_setcca(FAR struct ieee802154_radio_s *ieee,
|
||||
mrf24j40_setreg(dev->spi, MRF24J40_BBREG2, mode);
|
||||
|
||||
memcpy(&dev->cca, cca, sizeof(struct ieee802154_cca_s));
|
||||
|
||||
return OK;
|
||||
}
|
||||
|
||||
@ -933,7 +979,7 @@ static int mrf24j40_regdump(FAR struct mrf24j40_radio_s *dev)
|
||||
{
|
||||
uint32_t i;
|
||||
char buf[4+16*3+2+1];
|
||||
int len=0;
|
||||
int len = 0;
|
||||
|
||||
wlinfo("Short regs:\n");
|
||||
|
||||
@ -953,9 +999,9 @@ static int mrf24j40_regdump(FAR struct mrf24j40_radio_s *dev)
|
||||
}
|
||||
|
||||
wlinfo("Long regs:\n");
|
||||
for (i=0x80000200;i<0x80000250;i++)
|
||||
for (i = 0x80000200; i < 0x80000250; i++)
|
||||
{
|
||||
if ((i&15)==0)
|
||||
if ((i & 15) == 0)
|
||||
{
|
||||
len=sprintf(buf, "%02x: ",i&0xFF);
|
||||
}
|
||||
@ -1043,7 +1089,6 @@ static int mrf24j40_energydetect(FAR struct ieee802154_radio_s *ieee,
|
||||
/* Back to automatic control */
|
||||
|
||||
mrf24j40_pacontrol(dev, MRF24J40_PA_AUTO);
|
||||
|
||||
return OK;
|
||||
}
|
||||
|
||||
@ -1057,13 +1102,14 @@ static int mrf24j40_energydetect(FAR struct ieee802154_radio_s *ieee,
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
static int mrf24j40_transmit(FAR struct ieee802154_radio_s *ieee, FAR struct ieee802154_packet_s *packet)
|
||||
static int mrf24j40_transmit(FAR struct ieee802154_radio_s *ieee,
|
||||
FAR struct ieee802154_packet_s *packet)
|
||||
{
|
||||
FAR struct mrf24j40_radio_s *dev = (FAR struct mrf24j40_radio_s *)ieee;
|
||||
uint32_t addr;
|
||||
uint8_t reg;
|
||||
int ret;
|
||||
int hlen = 3; /* include frame control and seq number */
|
||||
int hlen = 3; /* Include frame control and seq number */
|
||||
uint8_t fc1, fc2;
|
||||
|
||||
mrf24j40_pacontrol(dev, MRF24J40_PA_AUTO);
|
||||
@ -1081,7 +1127,7 @@ static int mrf24j40_transmit(FAR struct ieee802154_radio_s *ieee, FAR struct iee
|
||||
fc1 = packet->data[0];
|
||||
fc2 = packet->data[1];
|
||||
|
||||
// wlinfo("fc1 %02X fc2 %02X\n", fc1,fc2);
|
||||
//wlinfo("fc1 %02X fc2 %02X\n", fc1,fc2);
|
||||
|
||||
if ((fc2 & IEEE802154_FC2_DADDR) == IEEE802154_DADDR_SHORT)
|
||||
{
|
||||
@ -1111,7 +1157,7 @@ static int mrf24j40_transmit(FAR struct ieee802154_radio_s *ieee, FAR struct iee
|
||||
hlen += 8; /* Ext saddr */
|
||||
}
|
||||
|
||||
// wlinfo("hlen %d\n",hlen);
|
||||
//wlinfo("hlen %d\n",hlen);
|
||||
|
||||
/* Header len, 0, TODO for security modes */
|
||||
|
||||
@ -1166,6 +1212,7 @@ static void mrf24j40_irqwork_tx(FAR struct mrf24j40_radio_s *dev)
|
||||
reg = mrf24j40_getreg(dev->spi, MRF24J40_TXSTAT);
|
||||
|
||||
/* 1 means it failed, we want 1 to mean it worked. */
|
||||
|
||||
dev->ieee.txok = (reg & MRF24J40_TXSTAT_TXNSTAT) != MRF24J40_TXSTAT_TXNSTAT;
|
||||
dev->ieee.txretries = (reg & MRF24J40_TXSTAT_X_MASK) >> MRF24J40_TXSTAT_X_SHIFT;
|
||||
dev->ieee.txbusy = (reg & MRF24J40_TXSTAT_CCAFAIL) == MRF24J40_TXSTAT_CCAFAIL;
|
||||
@ -1232,7 +1279,7 @@ static void mrf24j40_irqwork_rx(FAR struct mrf24j40_radio_s *dev)
|
||||
uint32_t index;
|
||||
uint8_t reg;
|
||||
|
||||
/*wlinfo("!\n");*/
|
||||
/* wlinfo("!\n"); */
|
||||
|
||||
/* Disable rx int */
|
||||
|
||||
@ -1248,7 +1295,7 @@ static void mrf24j40_irqwork_rx(FAR struct mrf24j40_radio_s *dev)
|
||||
|
||||
addr = MRF24J40_RXBUF_BASE;
|
||||
dev->ieee.rxbuf->len = mrf24j40_getreg(dev->spi, addr++);
|
||||
/*wlinfo("len %3d\n", dev->ieee.rxbuf->len);*/
|
||||
/* wlinfo("len %3d\n", dev->ieee.rxbuf->len); */
|
||||
|
||||
for (index = 0; index < dev->ieee.rxbuf->len; index++)
|
||||
{
|
||||
@ -1303,7 +1350,7 @@ static void mrf24j40_irqworker(FAR void *arg)
|
||||
/* Read and store INTSTAT - this clears the register. */
|
||||
|
||||
intstat = mrf24j40_getreg(dev->spi, MRF24J40_INTSTAT);
|
||||
// wlinfo("INT%02X\n", intstat);
|
||||
//wlinfo("INT%02X\n", intstat);
|
||||
|
||||
/* Do work according to the pending interrupts */
|
||||
|
||||
@ -1382,15 +1429,14 @@ static int mrf24j40_interrupt(int irq, FAR void *context)
|
||||
****************************************************************************/
|
||||
|
||||
FAR struct ieee802154_radio_s *mrf24j40_init(FAR struct spi_dev_s *spi,
|
||||
FAR const struct mrf24j40_lower_s *lower)
|
||||
FAR const struct mrf24j40_lower_s *lower)
|
||||
{
|
||||
FAR struct mrf24j40_radio_s *dev;
|
||||
struct ieee802154_cca_s cca;
|
||||
|
||||
#if 0
|
||||
dev = kmm_zalloc(sizeof(struct mrf24j40_radio_s));
|
||||
|
||||
if (!dev)
|
||||
if (dev == NULL)
|
||||
{
|
||||
return NULL;
|
||||
}
|
||||
|
@ -33,8 +33,8 @@
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
#ifndef __DRIVERS_IEEE802154_MRF24J40_H
|
||||
#define __DRIVERS_IEEE802154_MRF24J40_H
|
||||
#ifndef __DRIVERS_WIRELESS_IEEE802154_MRF24J40_H
|
||||
#define __DRIVERS_WIRELESS_IEEE802154_MRF24J40_H
|
||||
|
||||
/* MRF24J40 Registers *******************************************************/
|
||||
|
||||
@ -214,4 +214,4 @@
|
||||
#define MRF24J40_TXSTAT_X_SHIFT 6
|
||||
#define MRF24J40_TXSTAT_X_MASK (3 << MRF24J40_TXSTAT_X_SHIFT)
|
||||
|
||||
#endif /* __DRIVERS_IEEE802154_MRF24J40_H */
|
||||
#endif /* __DRIVERS_WIRELESS_IEEE802154_MRF24J40_H */
|
||||
|
Loading…
x
Reference in New Issue
Block a user