Merged in paulpatience/nuttx-arch/stm32_tim (pull request #39)
STM32 TIM: Remove some warnings, fix timer resolution bug and cosmetic changes
This commit is contained in:
Gregory Nutt
commit
26883fc7b9
@ -2,7 +2,9 @@
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* arch/arm/src/stm32/stm32_tim_lowerhalf.c
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*
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* Copyright (C) 2015 Wail Khemir. All rights reserved.
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* Copyright (C) 2015 Omni Hoverboards Inc. All rights reserved.
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* Authors: Wail Khemir <khemirwail@gmail.com>
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* Paul Alexander Patience <paul-a.patience@polymtl.ca>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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@ -52,15 +54,46 @@
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#include "stm32_tim.h"
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#if defined(CONFIG_TIMER) && \
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(defined(CONFIG_STM32_TIM1) || defined(CONFIG_STM32_TIM2) || \
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defined(CONFIG_STM32_TIM3) || defined(CONFIG_STM32_TIM4) || \
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defined(CONFIG_STM32_TIM5) || defined(CONFIG_STM32_TIM6) || \
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defined(CONFIG_STM32_TIM7) || defined(CONFIG_STM32_TIM8))
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(defined(CONFIG_STM32_TIM1) || defined(CONFIG_STM32_TIM2) || \
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defined(CONFIG_STM32_TIM3) || defined(CONFIG_STM32_TIM4) || \
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defined(CONFIG_STM32_TIM5) || defined(CONFIG_STM32_TIM6) || \
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defined(CONFIG_STM32_TIM7) || defined(CONFIG_STM32_TIM8) || \
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defined(CONFIG_STM32_TIM9) || defined(CONFIG_STM32_TIM10) || \
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defined(CONFIG_STM32_TIM11) || defined(CONFIG_STM32_TIM12) || \
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defined(CONFIG_STM32_TIM13) || defined(CONFIG_STM32_TIM14))
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/****************************************************************************
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* Pre-processor Definitions
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****************************************************************************/
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#define STM32_TIM1_RES 16
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#if defined(CONFIG_STM32_STM32L15XX) || defined(CONFIG_STM32_STM32F10XX)
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# define STM32_TIM2_RES 16
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#else
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# define STM32_TIM2_RES 32
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#endif
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#if defined(CONFIG_STM32_STM32L20XX) || defined(CONFIG_STM32_STM32F40XX)
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# define STM32_TIM3_RES 32
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# define STM32_TIM4_RES 32
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#else
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# define STM32_TIM3_RES 16
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# define STM32_TIM4_RES 16
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#endif
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#if defined(CONFIG_STM32_STM32F10XX) || defined(CONFIG_STM32_STM32F30XX)
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# define STM32_TIM5_RES 16
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#else
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# define STM32_TIM5_RES 32
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#endif
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#define STM32_TIM6_RES 16
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#define STM32_TIM7_RES 16
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#define STM32_TIM8_RES 16
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#define STM32_TIM9_RES 16
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#define STM32_TIM10_RES 16
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#define STM32_TIM11_RES 16
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#define STM32_TIM12_RES 16
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#define STM32_TIM13_RES 16
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#define STM32_TIM14_RES 16
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/****************************************************************************
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* Private Types
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****************************************************************************/
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@ -71,23 +104,18 @@
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struct stm32_lowerhalf_s
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{
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const struct timer_ops_s *ops; /* Lower half operations */
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struct stm32_tim_dev_s *tim; /* stm32 timer driver */
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tccb_t handlerUsr; /* Current user interrupt handler */
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const xcpt_t handlerTim; /* Current timer interrupt handler */
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bool started; /* True: Timer has been started */
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const uint8_t timerResolution; /* number of bits in the timer (16 or 32 bits) */
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FAR const struct timer_ops_s *ops; /* Lower half operations */
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FAR struct stm32_tim_dev_s *tim; /* stm32 timer driver */
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tccb_t usrhandler; /* Current user interrupt handler */
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const xcpt_t timhandler; /* Current timer interrupt handler */
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bool started; /* True: Timer has been started */
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const uint8_t resolution; /* Number of bits in the timer (16 or 32 bits) */
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};
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/****************************************************************************
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* Private Function Prototypes
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****************************************************************************/
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/* Helper functions *********************************************************/
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static struct stm32_lowerhalf_s *stm32_get_lowerhalf(int timer);
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static xcpt_t stm32_get_interrupt(int timer);
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/* Interrupt handling *******************************************************/
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#ifdef CONFIG_STM32_TIM1
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@ -133,15 +161,15 @@ static int stm32_tim13_interrupt(int irq, FAR void *context);
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static int stm32_tim14_interrupt(int irq, FAR void *context);
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#endif
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static int stm32_timer_handler(struct stm32_lowerhalf_s *attr);
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static int stm32_timer_handler(FAR struct stm32_lowerhalf_s *lower);
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/* "Lower half" driver methods **********************************************/
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static int stm32_start(struct timer_lowerhalf_s *lower);
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static int stm32_stop(struct timer_lowerhalf_s *lower);
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static int stm32_settimeout(struct timer_lowerhalf_s *lower,
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static int stm32_start(FAR struct timer_lowerhalf_s *lower);
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static int stm32_stop(FAR struct timer_lowerhalf_s *lower);
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static int stm32_settimeout(FAR struct timer_lowerhalf_s *lower,
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uint32_t timeout);
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static tccb_t stm32_sethandler(struct timer_lowerhalf_s *lower,
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static tccb_t stm32_sethandler(FAR struct timer_lowerhalf_s *lower,
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tccb_t handler);
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/****************************************************************************
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@ -153,153 +181,135 @@ static const struct timer_ops_s g_timer_ops =
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{
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.start = stm32_start,
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.stop = stm32_stop,
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.getstatus = 0,
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.getstatus = NULL,
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.settimeout = stm32_settimeout,
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.sethandler = stm32_sethandler,
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.ioctl = 0,
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.ioctl = NULL,
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};
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#ifdef CONFIG_STM32_TIM1
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static struct stm32_lowerhalf_s g_tim1_lowerHalf =
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static struct stm32_lowerhalf_s g_tim1_lowerhalf =
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{
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.ops = &g_timer_ops,
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.handlerTim = stm32_tim1_interrupt,
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.timerResolution = 16,
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.ops = &g_timer_ops,
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.timhandler = stm32_tim1_interrupt,
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.resolution = STM32_TIM1_RES,
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};
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#endif
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#ifdef CONFIG_STM32_TIM2
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static struct stm32_lowerhalf_s g_tim2_lowerHalf =
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static struct stm32_lowerhalf_s g_tim2_lowerhalf =
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{
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.ops = &g_timer_ops,
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.handlerTim = stm32_tim2_interrupt,
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#ifdef CONFIG_STM32_STM32F20XX || CONFIG_STM32_STM32F205 || CONFIG_STM32_STM32F207 || \
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CONFIG_STM32_STM32F30XX || CONFIG_STM32_STM32F37XX || \
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CONFIG_STM32_STM32F40XX || CONFIG_STM32_STM32F401 || CONFIG_STM32_STM32F411 || \
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CONFIG_STM32_STM32F405 || CONFIG_STM32_STM32F407 || CONFIG_STM32_STM32F427 || \
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CONFIG_STM32_STM32F429 || CONFIG_STM32_STM32F446
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.timerResolution = 32,
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#else
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.timerResolution = 16,
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#endif
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.ops = &g_timer_ops,
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.timhandler = stm32_tim2_interrupt,
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.resolution = STM32_TIM2_RES,
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};
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#endif
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#ifdef CONFIG_STM32_TIM3
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static struct stm32_lowerhalf_s g_tim3_lowerHalf =
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static struct stm32_lowerhalf_s g_tim3_lowerhalf =
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{
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.ops = &g_timer_ops,
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.handlerTim = stm32_tim3_interrupt,
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.timerResolution = 16,
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.ops = &g_timer_ops,
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.timhandler = stm32_tim3_interrupt,
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.resolution = STM32_TIM3_RES,
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};
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#endif
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#ifdef CONFIG_STM32_TIM4
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static struct stm32_lowerhalf_s g_tim4_lowerHalf =
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static struct stm32_lowerhalf_s g_tim4_lowerhalf =
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{
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.ops = &g_timer_ops,
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.handlerTim = stm32_tim4_interrupt,
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.timerResolution = 16,
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.ops = &g_timer_ops,
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.timhandler = stm32_tim4_interrupt,
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.resolution = STM32_TIM4_RES,
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};
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#endif
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#ifdef CONFIG_STM32_TIM5
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static struct stm32_lowerhalf_s g_tim5_lowerHalf =
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static struct stm32_lowerhalf_s g_tim5_lowerhalf =
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{
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.ops = &g_timer_ops,
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.handlerTim = stm32_tim5_interrupt,
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#ifdef CONFIG_STM32_STM32F20XX || CONFIG_STM32_STM32F205 || CONFIG_STM32_STM32F207 || \
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CONFIG_STM32_STM32F37XX || \
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CONFIG_STM32_STM32F40XX || CONFIG_STM32_STM32F401 || CONFIG_STM32_STM32F411 || \
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CONFIG_STM32_STM32F405 || CONFIG_STM32_STM32F407 || CONFIG_STM32_STM32F427 || \
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CONFIG_STM32_STM32F429 || CONFIG_STM32_STM32F446
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.timerResolution = 32,
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#else
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.timerResolution = 16,
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#endif
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.ops = &g_timer_ops,
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.timhandler = stm32_tim5_interrupt,
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.resolution = STM32_TIM5_RES,
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};
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#endif
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#ifdef CONFIG_STM32_TIM6
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static struct stm32_lowerhalf_s g_tim6_lowerHalf =
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static struct stm32_lowerhalf_s g_tim6_lowerhalf =
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{
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.ops = &g_timer_ops,
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.handlerTim = stm32_tim6_interrupt,
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.timerResolution = 16,
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.ops = &g_timer_ops,
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.timhandler = stm32_tim6_interrupt,
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.resolution = STM32_TIM6_RES,
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};
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#endif
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#ifdef CONFIG_STM32_TIM7
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static struct stm32_lowerhalf_s g_tim7_lowerHalf =
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static struct stm32_lowerhalf_s g_tim7_lowerhalf =
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{
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.ops = &g_timer_ops,
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.handlerTim = stm32_tim7_interrupt,
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.timerResolution = 16,
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.ops = &g_timer_ops,
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.timhandler = stm32_tim7_interrupt,
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.resolution = STM32_TIM7_RES,
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};
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#endif
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#ifdef CONFIG_STM32_TIM8
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static struct stm32_lowerhalf_s g_tim8_lowerHalf =
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static struct stm32_lowerhalf_s g_tim8_lowerhalf =
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{
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.ops = &g_timer_ops,
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.handlerTim = stm32_tim8_interrupt,
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.timerResolution = 16,
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.ops = &g_timer_ops,
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.timhandler = stm32_tim8_interrupt,
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.resolution = STM32_TIM8_RES,
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};
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#endif
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#ifdef CONFIG_STM32_TIM9
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static struct stm32_lowerhalf_s g_tim9_lowerHalf =
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static struct stm32_lowerhalf_s g_tim9_lowerhalf =
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{
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.ops = &g_timer_ops,
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.handlerTim = stm32_tim9_interrupt,
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.timerResolution = 16,
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.ops = &g_timer_ops,
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.timhandler = stm32_tim9_interrupt,
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.resolution = STM32_TIM9_RES,
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};
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#endif
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#ifdef CONFIG_STM32_TIM10
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static struct stm32_lowerhalf_s g_tim10_lowerHalf =
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static struct stm32_lowerhalf_s g_tim10_lowerhalf =
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{
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.ops = &g_timer_ops,
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.handlerTim = stm32_tim10_interrupt,
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.timerResolution = 16,
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.ops = &g_timer_ops,
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.timhandler = stm32_tim10_interrupt,
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.resolution = STM32_TIM10_RES,
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};
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#endif
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#ifdef CONFIG_STM32_TIM11
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static struct stm32_lowerhalf_s g_tim11_lowerHalf =
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static struct stm32_lowerhalf_s g_tim11_lowerhalf =
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{
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.ops = &g_timer_ops,
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.handlerTim = stm32_tim11_interrupt,
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.timerResolution = 16,
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.ops = &g_timer_ops,
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.timhandler = stm32_tim11_interrupt,
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.resolution = STM32_TIM11_RES,
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};
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#endif
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#ifdef CONFIG_STM32_TIM12
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static struct stm32_lowerhalf_s g_tim12_lowerHalf =
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static struct stm32_lowerhalf_s g_tim12_lowerhalf =
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{
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.ops = &g_timer_ops,
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.handlerTim = stm32_tim12_interrupt,
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.timerResolution = 16,
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.ops = &g_timer_ops,
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.timhandler = stm32_tim12_interrupt,
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.resolution = STM32_TIM12_RES,
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};
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#endif
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#ifdef CONFIG_STM32_TIM13
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static struct stm32_lowerhalf_s g_tim13_lowerHalf =
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static struct stm32_lowerhalf_s g_tim13_lowerhalf =
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{
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.ops = &g_timer_ops,
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.handlerTim = stm32_tim13_interrupt,
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.timerResolution = 16,
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.ops = &g_timer_ops,
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.timhandler = stm32_tim13_interrupt,
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.resolution = STM32_TIM13_RES,
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};
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#endif
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#ifdef CONFIG_STM32_TIM14
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static struct stm32_lowerhalf_s g_tim14_lowerHalf =
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static struct stm32_lowerhalf_s g_tim14_lowerhalf =
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{
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.ops = &g_timer_ops,
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.handlerTim = stm32_tim14_interrupt,
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.timerResolution = 16,
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.ops = &g_timer_ops,
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.timhandler = stm32_tim14_interrupt,
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.resolution = STM32_TIM14_RES,
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};
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#endif
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@ -307,103 +317,6 @@ static struct stm32_lowerhalf_s g_tim14_lowerHalf =
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* Private Functions
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****************************************************************************/
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/****************************************************************************
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* Name: stm32_get_lowerhalf
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*
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* Description:
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* Get the lower half timer structure of the corresponding timer
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*
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* Input Parameters:
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* timer - the timer's number
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*
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* Returned Values:
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* A pointer to the lower half structure on success, NULL on failure
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*
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****************************************************************************/
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static struct stm32_lowerhalf_s *stm32_get_lowerhalf(int timer)
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{
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struct stm32_lowerhalf_s *lower;
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switch (timer)
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{
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#ifdef CONFIG_STM32_TIM1
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case 1:
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lower = &g_tim1_lowerHalf;
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break;
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#endif
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#ifdef CONFIG_STM32_TIM2
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case 2:
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lower = &g_tim2_lowerHalf;
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break;
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#endif
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#ifdef CONFIG_STM32_TIM3
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case 3:
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lower = &g_tim3_lowerHalf;
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break;
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#endif
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#ifdef CONFIG_STM32_TIM4
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case 4:
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lower = &g_tim4_lowerHalf;
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break;
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#endif
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#ifdef CONFIG_STM32_TIM5
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case 5:
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lower = &g_tim5_lowerHalf;
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break;
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#endif
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#ifdef CONFIG_STM32_TIM6
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case 6:
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lower = &g_tim6_lowerHalf;
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break;
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#endif
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#ifdef CONFIG_STM32_TIM7
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case 7:
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lower = &g_tim7_lowerHalf;
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break;
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#endif
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#ifdef CONFIG_STM32_TIM8
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case 8:
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lower = &g_tim8_lowerHalf;
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break;
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#endif
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#ifdef CONFIG_STM32_TIM9
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case 9:
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lower = &g_tim9_lowerHalf;
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break;
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#endif
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#ifdef CONFIG_STM32_TIM10
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case 10:
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lower = &g_tim10_lowerHalf;
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break;
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#endif
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#ifdef CONFIG_STM32_TIM11
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case 11:
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lower = &g_tim11_lowerHalf;
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break;
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#endif
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#ifdef CONFIG_STM32_TIM12
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case 12:
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lower = &g_tim12_lowerHalf;
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break;
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#endif
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#ifdef CONFIG_STM32_TIM13
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case 13:
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lower = &g_tim13_lowerHalf;
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break;
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#endif
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#ifdef CONFIG_STM32_TIM14
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case 14:
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lower = &g_tim14_lowerHalf;
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break;
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#endif
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default:
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lower = 0;
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}
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return lower;
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}
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/****************************************************************************
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* Name: stm32_timN_interrupt, N=1..14
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*
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@ -415,98 +328,98 @@ static struct stm32_lowerhalf_s *stm32_get_lowerhalf(int timer)
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#ifdef CONFIG_STM32_TIM1
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static int stm32_tim1_interrupt(int irq, FAR void *context)
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{
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return stm32_timer_handler(&g_tim1_lowerHalf);
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return stm32_timer_handler(&g_tim1_lowerhalf);
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}
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#endif
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#ifdef CONFIG_STM32_TIM2
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static int stm32_tim2_interrupt(int irq, FAR void *context)
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{
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return stm32_timer_handler(&g_tim2_lowerHalf);
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return stm32_timer_handler(&g_tim2_lowerhalf);
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}
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#endif
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#ifdef CONFIG_STM32_TIM3
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static int stm32_tim3_interrupt(int irq, FAR void *context)
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{
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return stm32_timer_handler(&g_tim3_lowerHalf);
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return stm32_timer_handler(&g_tim3_lowerhalf);
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}
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#endif
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#ifdef CONFIG_STM32_TIM4
|
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static int stm32_tim4_interrupt(int irq, FAR void *context)
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{
|
||||
return stm32_timer_handler(&g_tim4_lowerHalf);
|
||||
return stm32_timer_handler(&g_tim4_lowerhalf);
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_STM32_TIM5
|
||||
static int stm32_tim5_interrupt(int irq, FAR void *context)
|
||||
{
|
||||
return stm32_timer_handler(&g_tim5_lowerHalf);
|
||||
return stm32_timer_handler(&g_tim5_lowerhalf);
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_STM32_TIM6
|
||||
static int stm32_tim6_interrupt(int irq, FAR void *context)
|
||||
{
|
||||
return stm32_timer_handler(&g_tim6_lowerHalf);
|
||||
return stm32_timer_handler(&g_tim6_lowerhalf);
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_STM32_TIM7
|
||||
static int stm32_tim7_interrupt(int irq, FAR void *context)
|
||||
{
|
||||
return stm32_timer_handler(&g_tim7_lowerHalf);
|
||||
return stm32_timer_handler(&g_tim7_lowerhalf);
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_STM32_TIM8
|
||||
static int stm32_tim8_interrupt(int irq, FAR void *context)
|
||||
{
|
||||
return stm32_timer_handler(&g_tim8_lowerHalf);
|
||||
return stm32_timer_handler(&g_tim8_lowerhalf);
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_STM32_TIM9
|
||||
static int stm32_tim9_interrupt(int irq, FAR void *context)
|
||||
{
|
||||
return stm32_timer_handler(&g_tim9_lowerHalf);
|
||||
return stm32_timer_handler(&g_tim9_lowerhalf);
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_STM32_TIM10
|
||||
static int stm32_tim10_interrupt(int irq, FAR void *context)
|
||||
{
|
||||
return stm32_timer_handler(&g_tim10_lowerHalf);
|
||||
return stm32_timer_handler(&g_tim10_lowerhalf);
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_STM32_TIM11
|
||||
static int stm32_tim11_interrupt(int irq, FAR void *context)
|
||||
{
|
||||
return stm32_timer_handler(&g_tim11_lowerHalf);
|
||||
return stm32_timer_handler(&g_tim11_lowerhalf);
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_STM32_TIM12
|
||||
static int stm32_tim12_interrupt(int irq, FAR void *context)
|
||||
{
|
||||
return stm32_timer_handler(&g_tim12_lowerHalf);
|
||||
return stm32_timer_handler(&g_tim12_lowerhalf);
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_STM32_TIM13
|
||||
static int stm32_tim13_interrupt(int irq, FAR void *context)
|
||||
{
|
||||
return stm32_timer_handler(&g_tim13_lowerHalf);
|
||||
return stm32_timer_handler(&g_tim13_lowerhalf);
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_STM32_TIM14
|
||||
static int stm32_tim14_interrupt(int irq, FAR void *context)
|
||||
{
|
||||
return stm32_timer_handler(&g_tim14_lowerHalf);
|
||||
return stm32_timer_handler(&g_tim14_lowerhalf);
|
||||
}
|
||||
#endif
|
||||
|
||||
@ -522,14 +435,13 @@ static int stm32_tim14_interrupt(int irq, FAR void *context)
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
static int stm32_timer_handler(struct stm32_lowerhalf_s *lower)
|
||||
static int stm32_timer_handler(FAR struct stm32_lowerhalf_s *lower)
|
||||
{
|
||||
uint32_t next_interval_us = 0;
|
||||
|
||||
STM32_TIM_ACKINT(lower->tim, 0);
|
||||
|
||||
uint32_t next_interval_us = 0;
|
||||
bool ret = (*lower->handlerUsr)(&next_interval_us);
|
||||
|
||||
if (ret == true)
|
||||
if (lower->usrhandler(&next_interval_us))
|
||||
{
|
||||
if (next_interval_us > 0)
|
||||
{
|
||||
@ -538,10 +450,10 @@ static int stm32_timer_handler(struct stm32_lowerhalf_s *lower)
|
||||
}
|
||||
else
|
||||
{
|
||||
stm32_stop(lower);
|
||||
stm32_stop((struct timer_lowerhalf_s *)lower);
|
||||
}
|
||||
|
||||
return 0;
|
||||
return OK;
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
@ -559,17 +471,17 @@ static int stm32_timer_handler(struct stm32_lowerhalf_s *lower)
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
static int stm32_start(struct timer_lowerhalf_s *lower)
|
||||
static int stm32_start(FAR struct timer_lowerhalf_s *lower)
|
||||
{
|
||||
struct stm32_lowerhalf_s *priv = (struct stm32_lowerhalf_s *)lower;
|
||||
FAR struct stm32_lowerhalf_s *priv = (FAR struct stm32_lowerhalf_s *)lower;
|
||||
|
||||
if (!priv->started)
|
||||
{
|
||||
STM32_TIM_SETMODE(priv->tim, STM32_TIM_MODE_UP);
|
||||
|
||||
if (priv->handlerUsr)
|
||||
if (priv->usrhandler != NULL)
|
||||
{
|
||||
STM32_TIM_SETISR(priv->tim, priv->handlerTim, 0);
|
||||
STM32_TIM_SETISR(priv->tim, priv->timhandler, 0);
|
||||
STM32_TIM_ENABLEINT(priv->tim, 0);
|
||||
}
|
||||
|
||||
@ -631,21 +543,22 @@ static int stm32_stop(struct timer_lowerhalf_s *lower)
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
static int stm32_settimeout(struct timer_lowerhalf_s *lower, uint32_t timeout)
|
||||
static int stm32_settimeout(FAR struct timer_lowerhalf_s *lower, uint32_t timeout)
|
||||
{
|
||||
struct stm32_lowerhalf_s *priv = (struct stm32_lowerhalf_s *)lower;
|
||||
FAR struct stm32_lowerhalf_s *priv = (FAR struct stm32_lowerhalf_s *)lower;
|
||||
uint64_t maxtimeout;
|
||||
|
||||
if (priv->started)
|
||||
{
|
||||
return -EPERM;
|
||||
}
|
||||
|
||||
uint64_t maxTimeout = (1 << priv->timerResolution) - 1;
|
||||
if(timeout > maxTimeout)
|
||||
maxtimeout = (1 << priv->resolution) - 1;
|
||||
if (timeout > maxtimeout)
|
||||
{
|
||||
uint64_t freq = (maxTimeout * 1000000) / timeout;
|
||||
uint64_t freq = (maxtimeout * 1000000) / timeout;
|
||||
STM32_TIM_SETCLOCK(priv->tim, freq);
|
||||
STM32_TIM_SETPERIOD(priv->tim, maxTimeout);
|
||||
STM32_TIM_SETPERIOD(priv->tim, maxtimeout);
|
||||
}
|
||||
else
|
||||
{
|
||||
@ -675,24 +588,24 @@ static int stm32_settimeout(struct timer_lowerhalf_s *lower, uint32_t timeout)
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
static tccb_t stm32_sethandler(struct timer_lowerhalf_s *lower,
|
||||
static tccb_t stm32_sethandler(FAR struct timer_lowerhalf_s *lower,
|
||||
tccb_t newhandler)
|
||||
{
|
||||
struct stm32_lowerhalf_s *priv = (struct stm32_lowerhalf_s *)lower;
|
||||
FAR struct stm32_lowerhalf_s *priv = (FAR struct stm32_lowerhalf_s *)lower;
|
||||
|
||||
irqstate_t flags = irqsave();
|
||||
|
||||
/* Get the old handler return value */
|
||||
|
||||
tccb_t oldhandler = priv->handlerUsr;
|
||||
tccb_t oldhandler = priv->usrhandler;
|
||||
|
||||
/* Save the new handler */
|
||||
|
||||
priv->handlerUsr = newhandler;
|
||||
priv->usrhandler = newhandler;
|
||||
|
||||
if (newhandler && priv->started)
|
||||
if (newhandler != NULL && priv->started)
|
||||
{
|
||||
STM32_TIM_SETISR(priv->tim, priv->handlerTim, 0);
|
||||
STM32_TIM_SETISR(priv->tim, priv->timhandler, 0);
|
||||
STM32_TIM_ENABLEINT(priv->tim, 0);
|
||||
}
|
||||
else
|
||||
@ -729,19 +642,91 @@ static tccb_t stm32_sethandler(struct timer_lowerhalf_s *lower,
|
||||
|
||||
int stm32_timer_initialize(FAR const char *devpath, int timer)
|
||||
{
|
||||
struct stm32_lowerhalf_s *lower = stm32_get_lowerhalf(timer);
|
||||
if(!lower)
|
||||
FAR struct stm32_lowerhalf_s *lower;
|
||||
|
||||
switch (timer)
|
||||
{
|
||||
return -ENODEV;
|
||||
#ifdef CONFIG_STM32_TIM1
|
||||
case 1:
|
||||
lower = &g_tim1_lowerhalf;
|
||||
break;
|
||||
#endif
|
||||
#ifdef CONFIG_STM32_TIM2
|
||||
case 2:
|
||||
lower = &g_tim2_lowerhalf;
|
||||
break;
|
||||
#endif
|
||||
#ifdef CONFIG_STM32_TIM3
|
||||
case 3:
|
||||
lower = &g_tim3_lowerhalf;
|
||||
break;
|
||||
#endif
|
||||
#ifdef CONFIG_STM32_TIM4
|
||||
case 4:
|
||||
lower = &g_tim4_lowerhalf;
|
||||
break;
|
||||
#endif
|
||||
#ifdef CONFIG_STM32_TIM5
|
||||
case 5:
|
||||
lower = &g_tim5_lowerhalf;
|
||||
break;
|
||||
#endif
|
||||
#ifdef CONFIG_STM32_TIM6
|
||||
case 6:
|
||||
lower = &g_tim6_lowerhalf;
|
||||
break;
|
||||
#endif
|
||||
#ifdef CONFIG_STM32_TIM7
|
||||
case 7:
|
||||
lower = &g_tim7_lowerhalf;
|
||||
break;
|
||||
#endif
|
||||
#ifdef CONFIG_STM32_TIM8
|
||||
case 8:
|
||||
lower = &g_tim8_lowerhalf;
|
||||
break;
|
||||
#endif
|
||||
#ifdef CONFIG_STM32_TIM9
|
||||
case 9:
|
||||
lower = &g_tim9_lowerhalf;
|
||||
break;
|
||||
#endif
|
||||
#ifdef CONFIG_STM32_TIM10
|
||||
case 10:
|
||||
lower = &g_tim10_lowerhalf;
|
||||
break;
|
||||
#endif
|
||||
#ifdef CONFIG_STM32_TIM11
|
||||
case 11:
|
||||
lower = &g_tim11_lowerhalf;
|
||||
break;
|
||||
#endif
|
||||
#ifdef CONFIG_STM32_TIM12
|
||||
case 12:
|
||||
lower = &g_tim12_lowerhalf;
|
||||
break;
|
||||
#endif
|
||||
#ifdef CONFIG_STM32_TIM13
|
||||
case 13:
|
||||
lower = &g_tim13_lowerhalf;
|
||||
break;
|
||||
#endif
|
||||
#ifdef CONFIG_STM32_TIM14
|
||||
case 14:
|
||||
lower = &g_tim14_lowerhalf;
|
||||
break;
|
||||
#endif
|
||||
default:
|
||||
return -ENODEV;
|
||||
}
|
||||
|
||||
/* Initialize the elements of lower half state structure */
|
||||
|
||||
lower->started = false;
|
||||
lower->handlerUsr = 0;
|
||||
lower->usrhandler = NULL;
|
||||
lower->tim = stm32_tim_init(timer);
|
||||
|
||||
if (!lower->tim)
|
||||
if (lower->tim == NULL)
|
||||
{
|
||||
return -EINVAL;
|
||||
}
|
||||
@ -751,8 +736,9 @@ int stm32_timer_initialize(FAR const char *devpath, int timer)
|
||||
* REVISIT: The returned handle is discard here.
|
||||
*/
|
||||
|
||||
void *drvr = timer_register(devpath, (struct timer_lowerhalf_s *)lower);
|
||||
if (!drvr)
|
||||
FAR void *drvr = timer_register(devpath,
|
||||
(FAR struct timer_lowerhalf_s *)lower);
|
||||
if (drvr == NULL)
|
||||
{
|
||||
/* The actual cause of the failure may have been a failure to allocate
|
||||
* perhaps a failure to register the timer driver (such as if the
|
||||
|
||||
Loading…
Reference in New Issue
Block a user