From 26dec2c3335cf9beb2ba521186c7ca5cf4f6235c Mon Sep 17 00:00:00 2001 From: Gregory Nutt Date: Mon, 9 Mar 2015 18:14:31 -0600 Subject: [PATCH] Cosmetic changes to conditional compilation --- arch/arm/src/samv7/sam_xdmac.c | 15 ++++++++++----- 1 file changed, 10 insertions(+), 5 deletions(-) diff --git a/arch/arm/src/samv7/sam_xdmac.c b/arch/arm/src/samv7/sam_xdmac.c index c29a156a79..662d202579 100644 --- a/arch/arm/src/samv7/sam_xdmac.c +++ b/arch/arm/src/samv7/sam_xdmac.c @@ -92,6 +92,11 @@ # define CONFIG_SAMV7_NLLDESC SAMV7_NDMACHAN #endif +/* These cache operations are not yet available */ + +#undef HAVE_CLEAN_DCACHE_RANGE +#undef HAVE_INVALIDATE_DCACHE_RANGE + /**************************************************************************** * Private Types ****************************************************************************/ @@ -1086,7 +1091,7 @@ sam_allocdesc(struct sam_xdmach_s *xdmach, struct chnext_view1_s *prev, xdmach->lltail = descr; -#if 0 /* REVISIT */ +#ifdef HAVE_CLEAN_DCACHE_RANGE /* REVISIT */ /* Assume that we will be doing multiple buffer transfers and that * that hardware will be accessing the descriptor via DMA. */ @@ -1098,7 +1103,7 @@ sam_allocdesc(struct sam_xdmach_s *xdmach, struct chnext_view1_s *prev, } } -#if 1 /* REVISIT */ +#ifndef HAVE_CLEAN_DCACHE_RANGE /* REVISIT */ /* Assume that we will be doing multiple buffer transfers and that * that hardware will be accessing the descriptors via DMA. */ @@ -1502,7 +1507,7 @@ static void sam_dmaterminate(struct sam_xdmach_s *xdmach, int result) * to force reloads from memory. */ -#if 0 /* Revisit */ +#ifdef HAVE_INVALIDATE_DCACHE_RANGE /* Revisit */ if (xdmach->rx) { arch_invalidate_dcache(xdmach->rxaddr, xdmach->rxaddr + xdmach->rxsize); @@ -1868,7 +1873,7 @@ int sam_dmatxsetup(DMA_HANDLE handle, uint32_t paddr, uint32_t maddr, /* Clean caches associated with the DMA memory */ -#if 0 /* REVISIT */ +#ifdef HAVE_CLEAN_DCACHE_RANGE /* REVISIT */ arch_clean_dcache(maddr, maddr + nbytes); #else arch_clean_dcache_all(); @@ -1953,7 +1958,7 @@ int sam_dmarxsetup(DMA_HANDLE handle, uint32_t paddr, uint32_t maddr, /* Clean caches associated with the DMA memory */ -#if 0 /* REVISIT */ +#ifdef HAVE_CLEAN_DCACHE_RANGE /* REVISIT */ arch_clean_dcache(maddr, maddr + nbytes); #else arch_clean_dcache_all();