TWIHS Driver improved and GPIO-Driver fixed for Open-Drain Pins
- sam_gpioread: Now the actual line level from the pin is read back. This is extremely important for Open-Drain Pins, which can be used bidirectionally - Re-Implemented twi_reset-function and enhanced it so it can be called from inside the driver (see next point) - Glitch-Filter: Added a configuration option to enable the twi-built-in glitch filter - Added a "Single Master Mode": In EMC Testing the TWI-Bus got stuck because the TWI-Master detected a Multi-Master access (but there is no second master). With the option "Single Master" we detect these events and automatically trigger a twi_reset. We also do an automatic recovery if a slave got stuck (SDA stays low). With the above changes I²C-Bus reliability in harsh environments (eg. EMC) is greatly improved. The small change in the GPIO-Driver was necessary because otherwise you cannot read back the correct line status of Open-Drain Outputs and this is needed by the twi_reset function.
This commit is contained in:
Michael Spahlinger
Gregory Nutt
parent
315e22e4df
commit
26f7b8c9e5
@ -213,6 +213,7 @@ config ARCH_CHIP_SAMV7
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select ARCH_HAVE_RAMFUNCS
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select ARCH_HAVE_TICKLESS
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select ARMV7M_HAVE_STACKCHECK
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select ARCH_HAVE_I2CRESET
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---help---
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Atmel SAMV7 (ARM Cortex-M7) architectures
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@ -957,16 +957,85 @@ config SAMV7_TWIHS0_FREQUENCY
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default 100000
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depends on SAMV7_TWIHS0
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config SAMV7_TWIHS0_GLITCH_FILTER
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int "TWIHS0 Glitch Filter Time"
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default 1
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range 0 7
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depends on SAMV7_TWIHS0
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---help---
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Apply filtering on TWIHS Inputs. Given number is the maximum pulse width
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(defined in peripheral CLKs) of spikes to be suppressed by the input filter.
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Setting this value to zero will disable glitch filtering.
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config SAMV7_TWIHS0_SINGLE_MASTER
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bool "TWIHS0 Single Master Mode"
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default y
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depends on SAMV7_TWIHS0
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depends on I2C_RESET
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---help---
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Enables a mode, where errors on the I2C-Bus (e.g. by EMC or
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stuck slaves) are automatically handled by the driver.
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In an error-case the I2C-Bus is reset so further communication
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on the bus can take place.
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This option is default on because the TWI-Driver can't handle
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Multi-Master I2C anyways.
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config SAMV7_TWIHS1_FREQUENCY
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int "TWIHS1 Frequency"
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default 100000
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depends on SAMV7_TWIHS1
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config SAMV7_TWIHS1_GLITCH_FILTER
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int "TWIHS1 Glitch Filter Time"
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default 1
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range 0 7
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depends on SAMV7_TWIHS1
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---help---
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Apply filtering on TWIHS Inputs. Given number is the maximum pulse width
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(defined in peripheral CLKs) of spikes to be suppressed by the input filter.
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Setting this value to zero will disable glitch filtering.
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config SAMV7_TWIHS1_SINGLE_MASTER
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bool "TWIHS1 Single Master Mode"
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default y
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depends on SAMV7_TWIHS1
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depends on I2C_RESET
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---help---
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Enables a mode, where errors on the I2C-Bus (e.g. by EMC or
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stuck slaves) are automatically handled by the driver.
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In an error-case the I2C-Bus is reset so further communication
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on the bus can take place.
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This option is default on because the TWI-Driver can't handle
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Multi-Master I2C anyways.
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config SAMV7_TWIHS2_FREQUENCY
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int "TWIHS2 Frequency"
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default 100000
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depends on SAMV7_TWIHS2
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config SAMV7_TWIHS2_GLITCH_FILTER
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int "TWIHS2 Glitch Filter Time"
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default 1
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range 0 7
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depends on SAMV7_TWIHS2
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---help---
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Apply filtering on TWIHS Inputs. Given number is the maximum pulse width
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(defined in peripheral CLKs) of spikes to be suppressed by the input filter.
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Setting this value to zero will disable glitch filtering.
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config SAMV7_TWIHS2_SINGLE_MASTER
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bool "TWIHS2 Single Master Mode"
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default y
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depends on SAMV7_TWIHS2
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depends on I2C_RESET
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---help---
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Enables a mode, where errors on the I2C-Bus (e.g. by EMC or
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stuck slaves) are automatically handled by the driver.
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In an error-case the I2C-Bus is reset so further communication
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on the bus can take place.
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This option is default on because the TWI-Driver can't handle
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Multi-Master I2C anyways.
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config SAMV7_TWIHS_REGDEBUG
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bool "TWIHS register level debug"
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depends on DEBUG_I2C_INFO
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@ -543,15 +543,11 @@ bool sam_gpioread(gpio_pinset_t pinset)
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uint32_t pin = sam_gpio_pinmask(pinset);
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uint32_t regval;
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if ((pinset & GPIO_MODE_MASK) == GPIO_OUTPUT)
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{
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regval = getreg32(base + SAM_PIO_ODSR_OFFSET);
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}
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else
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{
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regval = getreg32(base + SAM_PIO_PDSR_OFFSET);
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}
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/* Always read the Pin Data Status Register. Otherwise an Open-Drain
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* Output pin will not be read back correctly.
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*/
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regval = getreg32(base + SAM_PIO_PDSR_OFFSET);
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return (regval & pin) != 0;
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}
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@ -116,13 +116,13 @@
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#define TWIHS_MAX_FREQUENCY 66000000 /* Maximum TWIHS frequency */
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/* Macros to convert a I2C pin to a PIO open-drain output */
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/* Macros to convert a I2C pin to a GPIO open-drain output */
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#define I2C_INPUT (PIO_INPUT | PIO_CFG_PULLUP)
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#define I2C_OUTPUT (PIO_OUTPUT | PIO_CFG_OPENDRAIN | PIO_OUTPUT_SET)
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#define I2C_INPUT (GPIO_INPUT | GPIO_CFG_PULLUP)
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#define I2C_OUTPUT (GPIO_OUTPUT | GPIO_CFG_OPENDRAIN | GPIO_OUTPUT_SET)
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#define MKI2C_INPUT(p) (((p) & (PIO_PORT_MASK | PIO_PIN_MASK)) | I2C_INPUT)
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#define MKI2C_OUTPUT(p) (((p) & (PIO_PORT_MASK | PIO_PIN_MASK)) | I2C_OUTPUT)
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#define MKI2C_INPUT(p) (((p) & (GPIO_PORT_MASK | GPIO_PIN_MASK)) | I2C_INPUT)
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#define MKI2C_OUTPUT(p) (((p) & (GPIO_PORT_MASK | GPIO_PIN_MASK)) | I2C_OUTPUT)
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/****************************************************************************
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* Private Types
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@ -134,6 +134,8 @@ struct twi_attr_s
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uint8_t twi; /* TWIHS device number (for debug output) */
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uint8_t pid; /* TWIHS peripheral ID */
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uint16_t irq; /* IRQ number for this TWIHS bus */
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uint8_t glitchfltr; /* Pulse width of a glich to be suppressed by the filter */
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uint8_t s_master; /* Single-Master Mode active */
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gpio_pinset_t sclcfg; /* TWIHS CK pin configuration (SCL in I2C-ese) */
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gpio_pinset_t sdacfg; /* TWIHS D pin configuration (SDA in I2C-ese) */
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uintptr_t base; /* Base address of TWIHS registers */
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@ -219,6 +221,7 @@ static void twi_startmessage(struct twi_dev_s *priv, struct i2c_msg_s *msg);
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static int twi_transfer(FAR struct i2c_master_s *dev,
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FAR struct i2c_msg_s *msgs, int count);
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#ifdef CONFIG_I2C_RESET
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static int twi_reset_internal(FAR struct i2c_master_s *dev);
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static int twi_reset(FAR struct i2c_master_s * dev);
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#endif
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@ -237,6 +240,12 @@ static const struct twi_attr_s g_twi0attr =
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.twi = 0,
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.pid = SAM_PID_TWIHS0,
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.irq = SAM_IRQ_TWIHS0,
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.glitchfltr = CONFIG_SAMV7_TWIHS0_GLITCH_FILTER,
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#ifdef CONFIG_SAMV7_TWIHS0_SINGLE_MASTER
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.s_master = 1,
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#else
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.s_master = 0,
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#endif
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.sclcfg = GPIO_TWIHS0_CK,
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.sdacfg = GPIO_TWIHS0_D,
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.base = SAM_TWIHS0_BASE,
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@ -252,6 +261,12 @@ static const struct twi_attr_s g_twi1attr =
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.twi = 1,
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.pid = SAM_PID_TWIHS1,
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.irq = SAM_IRQ_TWIHS1,
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.glitchfltr = CONFIG_SAMV7_TWIHS1_GLITCH_FILTER,
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#ifdef CONFIG_SAMV7_TWIHS1_SINGLE_MASTER
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.s_master = 1,
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#else
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.s_master = 0,
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#endif
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.sclcfg = GPIO_TWIHS1_CK,
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.sdacfg = GPIO_TWIHS1_D,
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.base = SAM_TWIHS1_BASE,
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@ -267,6 +282,12 @@ static const struct twi_attr_s g_twi2attr =
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.twi = 2,
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.pid = SAM_PID_TWIHS2,
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.irq = SAM_IRQ_TWIHS2,
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.glitchfltr = CONFIG_SAMV7_TWIHS2_GLITCH_FILTER,
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#ifdef CONFIG_SAMV7_TWIHS0_SINGLE_MASTER
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.s_master = 1,
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#else
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.s_master = 0,
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#endif
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.sclcfg = GPIO_TWIHS2_CK,
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.sdacfg = GPIO_TWIHS2_D,
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.base = SAM_TWIHS2_BASE,
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@ -312,7 +333,7 @@ static void twi_takesem(sem_t *sem)
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* awakened by a signal.
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*/
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ASSERT(errno == EINTR);
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DEBUGASSERT(errno == EINTR);
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}
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}
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@ -494,6 +515,24 @@ static int twi_wait(struct twi_dev_s *priv, unsigned int size)
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* all further interrupts for the TWIHS have been disabled.
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*/
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/* Check if an Arbitration Lost has occured */
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if (priv->result == -EUSERS)
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{
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/* Something bad happened on the bus so force a reset */
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priv->result = twi_reset_internal(&priv->dev);
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/* Although the reset was successful tell the higher driver that it's
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* transfer has failed and should be repeated.
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*/
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if (priv->result == OK)
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{
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priv->result = -EIO;
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}
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}
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return priv->result;
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}
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@ -607,6 +646,20 @@ static int twi_interrupt(struct twi_dev_s *priv)
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}
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}
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/* If Single-Master Mode is enabled and we lost arbitration (someone else or
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* an EMC-Pulse did something on the bus) something went very wrong. So we end
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* the current transfer with an EUSERS. The wait function will then reset
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* the bus so further communication can take place.
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*/
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else if ((priv->attr->s_master) && ((pending & TWIHS_INT_ARBLST) != 0))
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{
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/* Wake up the thread with an Arbitration Lost error indication */
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i2cllerr("ERROR: TWIHS%d Arbitration Lost\n");
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twi_wakeup(priv, -EUSERS);
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}
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/* Check for errors. We must check for errors *before* checking TXRDY or
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* TXCMP because the error can be signaled in combination with TXRDY or
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* TXCOMP.
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@ -856,6 +909,7 @@ static int twi_transfer(FAR struct i2c_master_s *dev,
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struct twi_dev_s *priv = (struct twi_dev_s *)dev;
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irqstate_t flags;
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unsigned int size;
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uint32_t sr;
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int i;
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int ret;
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@ -891,6 +945,22 @@ static int twi_transfer(FAR struct i2c_master_s *dev,
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twi_setfrequency(priv, msgs->frequency);
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/* When we are in Single Master Mode check if the bus is ready (no stuck
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* DATA or CLK line).
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* Otherwise initiate a bus reset.
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*/
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if (priv->attr->s_master)
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{
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sr = twi_getrel(priv, SAM_TWIHS_SR_OFFSET);
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if (((sr & TWIHS_INT_SDA) == 0) || ((sr & TWIHS_INT_SCL) == 0))
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{
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ret = twi_reset_internal(&priv->dev);
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if (ret != OK)
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goto errout;
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}
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}
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/* Initiate the transfer. The rest will be handled from interrupt
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* logic. Interrupts must be disabled to prevent re-entrance from the
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* interrupt level.
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@ -904,46 +974,46 @@ static int twi_transfer(FAR struct i2c_master_s *dev,
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*/
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ret = twi_wait(priv, size);
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leave_critical_section(flags);
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errout:
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if (ret < 0)
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{
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i2cerr("ERROR: Transfer failed: %d\n", ret);
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}
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leave_critical_section(flags);
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twi_givesem(&priv->exclsem);
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return ret;
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}
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/************************************************************************************
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* Name: twi_reset
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*
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* Description:
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* Perform an I2C bus reset in an attempt to break loose stuck I2C devices.
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*
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* Input Parameters:
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* dev - Device-specific state data
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*
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* Returned Value:
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* Zero (OK) on success; a negated errno value on failure.
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*
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************************************************************************************/
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* Name: twi_reset_internal
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*
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* Description:
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* Perform an I2C bus reset in an attempt to break loose stuck I2C devices.
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* This function can be called from inside the driver while the TWIHS device is
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* already locked, so we must not handle any semapores inside.
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* To initiate a bus reset from outside the driver use twi_reset(dev).
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*
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* Input Parameters:
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* dev - Device-specific state data
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*
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* Returned Value:
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* Zero (OK) on success; a negated errno value on failure.
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*
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************************************************************************************/
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#ifdef CONFIG_I2C_RESET
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static int twi_reset(FAR struct i2c_master_s *dev)
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static int twi_reset_internal(FAR struct i2c_master_s *dev)
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{
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struct twi_dev_s *priv = (struct twi_dev_s *)dev;
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unsigned int clockcnt;
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unsigned int stretchcnt;
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uint32_t sclpin;
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uint32_t sdapin;
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uint8_t wait_us;
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int ret;
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ASSERT(priv);
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/* Get exclusive access to the TWIHS device */
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twi_takesem(&priv->exclsem);
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/* Disable TWIHS interrupts */
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up_disable_irq(priv->attr->irq);
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@ -960,28 +1030,31 @@ static int twi_reset(FAR struct i2c_master_s *dev)
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sam_configgpio(sclpin);
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sam_configgpio(sdapin);
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/* Peripheral clocking must be enabled in order to read valid data from
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* the output pin (clocking is enabled automatically for pins configured
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* as inputs).
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*/
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sam_pio_forceclk(sclpin, true);
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sam_pio_forceclk(sdapin, true);
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/* Clock the bus until any slaves currently driving it low let it float.
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* Reading from the output will return the actual sensed level on the
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* SDA pin (not the level that we wrote).
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*/
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/* Set the wait-time according to the TWI-Bus-Frequency */
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if (priv->frequency >= 330000)
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{
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wait_us = 3;
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}
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else
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{
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wait_us = 10;
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}
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clockcnt = 0;
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while (sam_pioread(sdapin) == false)
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while (sam_gpioread(sdapin) == false)
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{
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/* Give up if we have tried too hard */
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if (clockcnt++ > 10)
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{
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ret = -ETIMEDOUT;
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goto errout_with_lock;
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goto errout;
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}
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/* Sniff to make sure that clock stretching has finished. SCL should
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@ -991,55 +1064,85 @@ static int twi_reset(FAR struct i2c_master_s *dev)
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*/
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stretchcnt = 0;
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while (sam_pioread(sclpin) == false)
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while (sam_gpioread(sclpin) == false)
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{
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/* Give up if we have tried too hard */
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if (stretchcnt++ > 10)
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{
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ret = -EAGAIN;
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goto errout_with_lock;
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goto errout;
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}
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up_udelay(10);
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up_udelay(wait_us);
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}
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/* Drive SCL low */
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sam_piowrite(sclpin, false);
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up_udelay(10);
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sam_gpiowrite(sclpin, false);
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up_udelay(wait_us);
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/* Drive SCL high (floating) again */
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sam_piowrite(sclpin, true);
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up_udelay(10);
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sam_gpiowrite(sclpin, true);
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up_udelay(wait_us);
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}
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/* Generate a start followed by a stop to reset slave
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* state machines.
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*/
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sam_piowrite(sdapin, false);
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up_udelay(10);
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sam_piowrite(sclpin, false);
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up_udelay(10);
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sam_gpiowrite(sdapin, false);
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up_udelay(wait_us);
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sam_gpiowrite(sclpin, false);
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up_udelay(wait_us);
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sam_piowrite(sclpin, true);
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up_udelay(10);
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sam_piowrite(sdapin, true);
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up_udelay(10);
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/* Clocking is no longer forced */
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sam_pio_forceclk(sclpin, false);
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sam_pio_forceclk(sdapin, false);
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sam_gpiowrite(sclpin, true);
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up_udelay(wait_us);
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sam_gpiowrite(sdapin, true);
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up_udelay(wait_us);
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|
||||
/* Re-initialize the port hardware */
|
||||
|
||||
twi_hw_initialize(priv, priv->frequency);
|
||||
ret = OK;
|
||||
|
||||
errout_with_lock:
|
||||
errout:
|
||||
return ret;
|
||||
}
|
||||
#endif /* CONFIG_I2C_RESET */
|
||||
|
||||
/************************************************************************************
|
||||
* Name: twi_reset
|
||||
*
|
||||
* Description:
|
||||
* Perform an I2C bus reset in an attempt to break loose stuck I2C devices.
|
||||
* This function can be called from outside the driver, so lock the TWIHS Device
|
||||
* and then let the internal reset function do the work.
|
||||
*
|
||||
* Input Parameters:
|
||||
* dev - Device-specific state data
|
||||
*
|
||||
* Returned Value:
|
||||
* Zero (OK) on success; a negated errno value on failure.
|
||||
*
|
||||
************************************************************************************/
|
||||
|
||||
#ifdef CONFIG_I2C_RESET
|
||||
static int twi_reset(FAR struct i2c_master_s *dev)
|
||||
{
|
||||
struct twi_dev_s *priv = (struct twi_dev_s *)dev;
|
||||
int ret;
|
||||
|
||||
DEBUGASSERT(priv != NULL);
|
||||
|
||||
/* Get exclusive access to the TWIHS device */
|
||||
|
||||
twi_takesem(&priv->exclsem);
|
||||
|
||||
/* Do the reset-procedure */
|
||||
|
||||
ret = twi_reset_internal(dev);
|
||||
|
||||
/* Release our lock on the bus */
|
||||
|
||||
@ -1217,6 +1320,19 @@ static void twi_hw_initialize(struct twi_dev_s *priv, uint32_t frequency)
|
||||
regval |= PMC_PCR_PID(priv->attr->pid) | PMC_PCR_CMD | PMC_PCR_EN;
|
||||
twi_putabs(priv, SAM_PMC_PCR, regval);
|
||||
|
||||
/* Set the TWIHS Input Filters */
|
||||
|
||||
if (priv->attr->glitchfltr)
|
||||
{
|
||||
regval = TWIHS_FILTR_FILT | TWIHS_FILTR_THRES(priv->attr->glitchfltr);
|
||||
}
|
||||
else
|
||||
{
|
||||
regval = 0;
|
||||
}
|
||||
|
||||
twi_putrel(priv, SAM_TWIHS_FILTR_OFFSET, regval);
|
||||
|
||||
/* Set the initial TWIHS data transfer frequency */
|
||||
|
||||
priv->frequency = 0;
|
||||
|
||||
Loading…
Reference in New Issue
Block a user