arch/arm/src/max326xx/max32660/max32660_wdt.c: Design fixes to watchdog timer.
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@ -81,7 +81,7 @@
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* this fixed timer period.
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*/
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#define WDT_RESET_DELAY MSEC_PER_SEC /* One second in units of milliseconds */
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#define WDT_RESET_DELAY (5 * MSEC_PER_SEC) /* Five seconds in units of msec */
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/****************************************************************************
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* Private Types
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@ -109,7 +109,6 @@ static void max326_int_enable(FAR struct max326_wdt_lowerhalf_s *priv);
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static uint32_t max326_time_left(FAR struct max326_wdt_lowerhalf_s *priv);
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static uint64_t max326_exp2msec(uint32_t pclk, uint8_t exp);
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static uint8_t max326_msec2exp(uint32_t msec);
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static inline void max326_setexp(uint8_t intexp, uint8_t rstexp);
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/* "Lower half" driver methods **********************************************/
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@ -231,8 +230,36 @@ static void max326_int_enable(FAR struct max326_wdt_lowerhalf_s *priv)
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static uint32_t max326_time_left(FAR struct max326_wdt_lowerhalf_s *priv)
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{
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clock_t timeleft = clock_systimer() - priv->lastping;
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return TICK2MSEC(timeleft);
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uint64_t elapsed;
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uint64_t timeout;
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uint64_t timeleft;
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uint32_t ctrl;
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uint8_t exp;
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/* Which timeout applies? To the interrupt or to the reset>? Doesn't
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* matter, the interrupt time period is the right answer in either case.
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*/
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ctrl = getreg32(MAX326_WDT0_CTRL);
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exp = (ctrl & WDT0_CTRL_INTPERIOD_MASK) >> WDT0_CTRL_INTPERIOD_SHIFT;
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timeout = max326_exp2msec(max326_pclk_frequency(), exp);
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elapsed = TICK2MSEC(clock_systimer() - priv->lastping);
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if (elapsed > timeout)
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{
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timeleft = 0;
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}
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else
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{
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timeleft = timeout - elapsed;
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if (timeleft > UINT32_MAX)
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{
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timeleft = UINT32_MAX;
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}
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}
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return (uint32_t)timeleft;
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}
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/****************************************************************************
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@ -309,31 +336,6 @@ static uint8_t max326_msec2exp(uint32_t msec)
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return timeout;
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}
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/****************************************************************************
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* Name: max326_setexp
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*
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* Description:
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* Set the time period exponents.
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*
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* Input Parameters:
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* intexp - Interrupt time exponent.
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* rstexp - Reset time exponent
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*
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* Returned Values:
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* None
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*
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****************************************************************************/
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static inline void max326_setexp(uint8_t intexp, uint8_t rstexp)
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{
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uint32_t ctrl;
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ctrl = getreg32(MAX326_WDT0_CTRL);
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ctrl &= ~(WDT0_CTRL_INTPERIOD_MASK | WDT0_CTRL_RSTPERIOD_MASK);
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ctrl |= (WDT0_CTRL_INTPERIOD(intexp) | WDT0_CTRL_RSTPERIOD(rstexp));
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putreg32(ctrl, MAX326_WDT0_CTRL);
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}
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/****************************************************************************
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* Name: max326_start
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*
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@ -535,12 +537,19 @@ static int max326_settimeout(FAR struct watchdog_lowerhalf_s *lower,
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{
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FAR struct max326_wdt_lowerhalf_s *priv =
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(FAR struct max326_wdt_lowerhalf_s *)lower;
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irqstate_t flags;
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uint32_t ctrl;
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uint8_t intexp;
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uint8_t rstexp;
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wdinfo("Entry: timeout=%lu\n", (unsigned long)timeout);
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DEBUGASSERT(priv != NULL);
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/* Reset WDT timer */
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flags = spin_lock_irqsave();
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max326_wdog_reset(priv);
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/* Convert the timeout value in milliseconds to time exponent used by the
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* max32660.
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*/
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@ -555,7 +564,12 @@ static int max326_settimeout(FAR struct watchdog_lowerhalf_s *lower,
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rstexp = max326_msec2exp(timeout + WDT_RESET_DELAY);
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}
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max326_setexp(intexp, rstexp);
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ctrl = getreg32(MAX326_WDT0_CTRL);
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ctrl &= ~(WDT0_CTRL_INTPERIOD_MASK | WDT0_CTRL_RSTPERIOD_MASK);
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ctrl |= (WDT0_CTRL_INTPERIOD(intexp) | WDT0_CTRL_RSTPERIOD(rstexp));
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putreg32(ctrl, MAX326_WDT0_CTRL);
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spin_unlock_irqrestore(flags);
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return OK;
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}
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