Change how UARTs are enabled for i.MX, M16C, and ez80 to make them compatible with other chips
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@5374 42af7a65-404d-4744-a932-0658087f49c3
This commit is contained in:
parent
00d2b645e6
commit
27aa26c2db
@ -3,4 +3,21 @@
|
||||
# see misc/tools/kconfig-language.txt.
|
||||
#
|
||||
|
||||
comment "i.MX Configuration Options"
|
||||
if ARCH_CHIP_IMX
|
||||
|
||||
config IMX_UART0
|
||||
bool "UART0"
|
||||
select ARCH_HAVE_UART0
|
||||
default n
|
||||
|
||||
config IMX_UART1
|
||||
bool "UART1"
|
||||
select ARCH_HAVE_UART1
|
||||
default n
|
||||
|
||||
config IMX_UART2
|
||||
bool "UART2"
|
||||
select ARCH_HAVE_UART2
|
||||
default n
|
||||
|
||||
endif
|
||||
|
@ -71,8 +71,8 @@
|
||||
|
||||
/* The i.MXL chip has only two UARTs */
|
||||
|
||||
#if defined(CONFIG_ARCH_CHIP_IMXL) && !defined(CONFIG_UART3_DISABLE)
|
||||
# define CONFIG_UART3_DISABLE 1
|
||||
#if defined(CONFIG_ARCH_CHIP_IMXL) && defined(CONFIG_IMX_UART3)
|
||||
# undef CONFIG_IMX_UART3
|
||||
#endif
|
||||
|
||||
/****************************************************************************
|
||||
@ -144,24 +144,24 @@ struct uart_ops_s g_uart_ops =
|
||||
|
||||
/* I/O buffers */
|
||||
|
||||
#ifndef CONFIG_UART1_DISABLE
|
||||
#ifdef CONFIG_IMX_UART1
|
||||
static char g_uart1rxbuffer[CONFIG_UART1_RXBUFSIZE];
|
||||
static char g_uart1txbuffer[CONFIG_UART1_TXBUFSIZE];
|
||||
#endif
|
||||
|
||||
#ifndef CONFIG_UART2_DISABLE
|
||||
#ifdef CONFIG_IMX_UART2
|
||||
static char g_uart2rxbuffer[CONFIG_UART2_RXBUFSIZE];
|
||||
static char g_uart2txbuffer[CONFIG_UART2_TXBUFSIZE];
|
||||
#endif
|
||||
|
||||
#ifndef CONFIG_UART3_DISABLE
|
||||
#ifdef CONFIG_IMX_UART3
|
||||
static char g_uart3rxbuffer[CONFIG_UART2_RXBUFSIZE];
|
||||
static char g_uart3txbuffer[CONFIG_UART2_TXBUFSIZE];
|
||||
#endif
|
||||
|
||||
/* This describes the state of the IMX uart1 port. */
|
||||
|
||||
#ifndef CONFIG_UART1_DISABLE
|
||||
#ifdef CONFIG_IMX_UART1
|
||||
static struct up_dev_s g_uart1priv =
|
||||
{
|
||||
.uartbase = IMX_UART1_VBASE,
|
||||
@ -196,7 +196,7 @@ static uart_dev_t g_uart1port =
|
||||
|
||||
/* This describes the state of the IMX uart2 port. */
|
||||
|
||||
#ifndef CONFIG_UART2_DISABLE
|
||||
#ifdef CONFIG_IMX_UART2
|
||||
static struct up_dev_s g_uart2priv =
|
||||
{
|
||||
.uartbase = IMX_UART2_VBASE,
|
||||
@ -229,7 +229,7 @@ static uart_dev_t g_uart2port =
|
||||
};
|
||||
#endif
|
||||
|
||||
#ifndef CONFIG_UART3_DISABLE
|
||||
#ifdef CONFIG_IMX_UART3
|
||||
static struct up_dev_s g_uart3priv =
|
||||
{
|
||||
.uartbase = IMX_UART3_REGISTER_BASE,
|
||||
@ -264,19 +264,19 @@ static uart_dev_t g_uart3port =
|
||||
|
||||
/* Now, which one with be tty0/console and which tty1 and tty2? */
|
||||
|
||||
#if defined(CONFIG_UART1_SERIAL_CONSOLE) && !defined(CONFIG_UART1_DISABLE)
|
||||
#if defined(CONFIG_UART1_SERIAL_CONSOLE) && defined(CONFIG_IMX_UART1)
|
||||
# define CONSOLE_DEV g_uart1port /* UART1 is /dev/console */
|
||||
# undef CONFIG_UART2_SERIAL_CONSOLE
|
||||
# undef CONFIG_UART3_SERIAL_CONSOLE
|
||||
# define TTYS0_DEV g_uart1port /* UART1 is /dev/ttyS0 */
|
||||
# if !defined(CONFIG_UART2_DISABLE)
|
||||
# if defined(CONFIG_IMX_UART2)
|
||||
# define TTYS1_DEV g_uart2port /* UART2 is /dev/ttyS1 */
|
||||
# if !defined(CONFIG_UART3_DISABLE)
|
||||
# if defined(CONFIG_IMX_UART3)
|
||||
# define TTYS2_DEV g_uart3port /* UART3 is /dev/ttyS2 */
|
||||
# else
|
||||
# undef TTYS2_DEV /* No /dev/ttyS2 */
|
||||
# endif
|
||||
# elif !defined(CONFIG_UART3_DISABLE)
|
||||
# elif defined(CONFIG_IMX_UART3)
|
||||
# define TTYS1_DEV g_uart3port /* UART3 is /dev/ttyS1 */
|
||||
# undef TTYS2_DEV /* No /dev/ttyS2 */
|
||||
# else
|
||||
@ -284,38 +284,38 @@ static uart_dev_t g_uart3port =
|
||||
# undef TTYS2_DEV /* No /dev/ttyS2 */
|
||||
# endif
|
||||
|
||||
#elif defined(CONFIG_UART2_SERIAL_CONSOLE) && !defined(CONFIG_UART2_DISABLE)
|
||||
#elif defined(CONFIG_UART2_SERIAL_CONSOLE) && defined(CONFIG_IMX_UART2)
|
||||
# define CONSOLE_DEV g_uart2port /* UART2 is /dev/console */
|
||||
# undef CONFIG_UART1_SERIAL_CONSOLE
|
||||
# undef CONFIG_UART3_SERIAL_CONSOLE
|
||||
# define TTYS0_DEV g_uart2port /* UART2 is /dev/ttyS0 */
|
||||
# if !defined(CONFIG_UART1_DISABLE)
|
||||
# if defined(CONFIG_IMX_UART1)
|
||||
# define TTYS1_DEV g_uart1port /* UART1 is /dev/ttyS1 */
|
||||
# if !defined(CONFIG_UART3_DISABLE)
|
||||
# if defined(CONFIG_IMX_UART3)
|
||||
# define TTYS2_DEV g_uart3port /* UART3 is /dev/ttyS2 */
|
||||
# else
|
||||
# undef TTYS2_DEV /* No /dev/ttyS2 */
|
||||
# endif
|
||||
# elif !defined(CONFIG_UART3_DISABLE)
|
||||
# elif defined(CONFIG_IMX_UART3)
|
||||
# define TTYS1_DEV g_uart3port /* UART3 is /dev/ttyS1 */
|
||||
# else
|
||||
# undef TTYS1_DEV /* No /dev/ttyS1 */
|
||||
# undef TTYS2_DEV /* No /dev/ttyS2 */
|
||||
# endif
|
||||
|
||||
#elif defined(CONFIG_UART3_SERIAL_CONSOLE) && !defined(CONFIG_UART3_DISABLE)
|
||||
#elif defined(CONFIG_UART3_SERIAL_CONSOLE) && defined(CONFIG_IMX_UART3)
|
||||
# define CONSOLE_DEV g_uart3port /* UART3 is /dev/console */
|
||||
# undef CONFIG_UART1_SERIAL_CONSOLE
|
||||
# undef CONFIG_UART2_SERIAL_CONSOLE
|
||||
# define TTYS0_DEV g_uart3port /* UART3 is /dev/ttyS0 */
|
||||
# if !defined(CONFIG_UART1_DISABLE)
|
||||
# if defined(CONFIG_IMX_UART1)
|
||||
# define TTYS1_DEV g_uart1port /* UART1 is /dev/ttyS1 */
|
||||
# if !defined(CONFIG_UART2_DISABLE)
|
||||
# if defined(CONFIG_IMX_UART2)
|
||||
# define TTYS2_DEV g_uart2port /* UART2 is /dev/ttyS2 */
|
||||
# else
|
||||
# undef TTYS2_DEV /* No /dev/ttyS2 */
|
||||
# endif
|
||||
# elif !defined(CONFIG_UART2_DISABLE)
|
||||
# elif defined(CONFIG_IMX_UART2)
|
||||
# define TTYS1_DEV g_uart2port /* UART2 is /dev/ttyS1 */
|
||||
# undef TTYS2_DEV /* No /dev/ttyS2 */
|
||||
# else
|
||||
@ -329,16 +329,16 @@ static uart_dev_t g_uart3port =
|
||||
# undef CONFIG_UART2_SERIAL_CONSOLE
|
||||
# undef CONFIG_UART3_SERIAL_CONSOLE
|
||||
|
||||
# if !defined(CONFIG_UART1_DISABLE)
|
||||
# if defined(CONFIG_IMX_UART1)
|
||||
# define TTYS0_DEV g_uart1port /* UART1 is /dev/ttyS0 */
|
||||
# if !defined(CONFIG_UART2_DISABLE)
|
||||
# if defined(CONFIG_IMX_UART2)
|
||||
# define TTYS1_DEV g_uart2port /* UART2 is /dev/ttyS1 */
|
||||
# if !defined(CONFIG_UART3_DISABLE)
|
||||
# if defined(CONFIG_IMX_UART3)
|
||||
# define TTYS2_DEV g_uart3port /* UART3 is /dev/ttyS2 */
|
||||
# else
|
||||
# undef TTYS2_DEV /* No /dev/ttyS2 */
|
||||
# endif
|
||||
# elif !defined(CONFIG_UART3_DISABLE)
|
||||
# elif defined(CONFIG_IMX_UART3)
|
||||
# define TTYS1_DEV g_uart3port /* UART3 is /dev/ttyS1 */
|
||||
# undef TTYS2_DEV /* No /dev/ttyS2 */
|
||||
# else
|
||||
@ -346,16 +346,16 @@ static uart_dev_t g_uart3port =
|
||||
# undef TTYS2_DEV /* No /dev/ttyS2 */
|
||||
# endif
|
||||
|
||||
# elif !defined(CONFIG_UART2_DISABLE)
|
||||
# elif defined(CONFIG_IMX_UART2)
|
||||
# define TTYS0_DEV g_uart2port /* UART2 is /dev/ttyS0 */
|
||||
# undef TTYS2_DEV /* No /dev/ttyS2 */
|
||||
# if !defined(CONFIG_UART3_DISABLE)
|
||||
# if defined(CONFIG_IMX_UART3)
|
||||
# define TTYS1_DEV g_uart2port /* UART2 is /dev/ttyS1 */
|
||||
# else
|
||||
# undef TTYS1_DEV /* No /dev/ttyS1 */
|
||||
# endif
|
||||
|
||||
# elif !defined(CONFIG_UART3_DISABLE)
|
||||
# elif defined(CONFIG_IMX_UART3)
|
||||
# define TTYS0_DEV g_uart3port /* UART3 is /dev/ttyS0 */
|
||||
# undef TTYS1_DEV /* No /dev/ttyS1 */
|
||||
# undef TTYS2_DEV /* No /dev/ttyS2 */
|
||||
@ -765,7 +765,7 @@ static inline struct uart_dev_s *up_mapirq(int irq)
|
||||
|
||||
switch (irq)
|
||||
{
|
||||
#ifndef CONFIG_UART1_DISABLE
|
||||
#ifdef CONFIG_IMX_UART1
|
||||
#if defined(CONFIG_ARCH_CHIP_IMX1) || defined(CONFIG_ARCH_CHIP_IMXL)
|
||||
case IMX_IRQ_UART1RX:
|
||||
case IMX_IRQ_UART1TX:
|
||||
@ -776,7 +776,7 @@ static inline struct uart_dev_s *up_mapirq(int irq)
|
||||
break;
|
||||
#endif
|
||||
|
||||
#ifndef CONFIG_UART2_DISABLE
|
||||
#ifdef CONFIG_IMX_UART2
|
||||
#if defined(CONFIG_ARCH_CHIP_IMX1) || defined(CONFIG_ARCH_CHIP_IMXL)
|
||||
case IMX_IRQ_UART2RX:
|
||||
case IMX_IRQ_UART2TX:
|
||||
@ -787,7 +787,7 @@ static inline struct uart_dev_s *up_mapirq(int irq)
|
||||
break;
|
||||
#endif
|
||||
|
||||
#ifndef CONFIG_UART3_DISABLE
|
||||
#ifdef CONFIG_IMX_UART3
|
||||
#if defined(CONFIG_ARCH_CHIP_IMX1) || defined(CONFIG_ARCH_CHIP_IMXL)
|
||||
case IMX_IRQ_UART3RX:
|
||||
case IMX_IRQ_UART3TX:
|
||||
@ -1068,7 +1068,7 @@ void up_earlyserialinit(void)
|
||||
{
|
||||
/* Configure and disable the UART1 */
|
||||
|
||||
#ifndef CONFIG_UART1_DISABLE
|
||||
#ifdef CONFIG_IMX_UART1
|
||||
up_serialout(&g_uart1priv, UART_UCR1, 0);
|
||||
up_serialout(&g_uart1priv, UART_UCR2, 0);
|
||||
|
||||
@ -1082,7 +1082,7 @@ void up_earlyserialinit(void)
|
||||
|
||||
/* Configure and disable the UART2 */
|
||||
|
||||
#ifndef CONFIG_UART2_DISABLE
|
||||
#ifdef CONFIG_IMX_UART2
|
||||
up_serialout(&g_uart2priv, UART_UCR1, 0);
|
||||
up_serialout(&g_uart2priv, UART_UCR2, 0);
|
||||
|
||||
@ -1098,7 +1098,7 @@ void up_earlyserialinit(void)
|
||||
|
||||
/* Configure and disable the UART3 */
|
||||
|
||||
#ifndef CONFIG_UART3_DISABLE
|
||||
#ifdef CONFIG_IMX_UART3
|
||||
up_serialout(&g_uart3priv, UART_UCR1, 0);
|
||||
up_serialout(&g_uart3priv, UART_UCR2, 0);
|
||||
|
||||
|
@ -55,28 +55,26 @@
|
||||
/* Configuration **********************************************************/
|
||||
|
||||
#if LM3S_NUARTS < 2
|
||||
# undef CONFIG_UART1_DISABLE
|
||||
# undef CONFIG_LM3S_UART1
|
||||
# undef CONFIG_UART1_SERIAL_CONSOLE
|
||||
# define CONFIG_UART1_DISABLE 1
|
||||
#endif
|
||||
|
||||
#if LM3S_NUARTS < 3
|
||||
# undef CONFIG_UART2_DISABLE
|
||||
# undef CONFIG_LM3S_UART2
|
||||
# undef CONFIG_UART2_SERIAL_CONSOLE
|
||||
# define CONFIG_UART2_DISABLE 1
|
||||
#endif
|
||||
|
||||
/* Is there a serial console? */
|
||||
|
||||
#if defined(CONFIG_UART0_SERIAL_CONSOLE) && !defined(CONFIG_UART0_DISABLE)
|
||||
#if defined(CONFIG_UART0_SERIAL_CONSOLE) && defined(CONFIG_LM3S_UART0)
|
||||
# undef CONFIG_UART1_SERIAL_CONSOLE
|
||||
# undef CONFIG_UART2_SERIAL_CONSOLE
|
||||
# define HAVE_CONSOLE 1
|
||||
#elif defined(CONFIG_UART1_SERIAL_CONSOLE) && !defined(CONFIG_UART1_DISABLE)
|
||||
#elif defined(CONFIG_UART1_SERIAL_CONSOLE) && defined(CONFIG_LM3S_UART1)
|
||||
# undef CONFIG_UART0_SERIAL_CONSOLE
|
||||
# undef CONFIG_UART2_SERIAL_CONSOLE
|
||||
# define HAVE_CONSOLE 1
|
||||
#elif defined(CONFIG_UART2_SERIAL_CONSOLE) && !defined(CONFIG_UART2_DISABLE)
|
||||
#elif defined(CONFIG_UART2_SERIAL_CONSOLE) && defined(CONFIG_LM3S_UART2)
|
||||
# undef CONFIG_UART0_SERIAL_CONSOLE
|
||||
# undef CONFIG_UART1_SERIAL_CONSOLE
|
||||
# define HAVE_CONSOLE 1
|
||||
@ -258,7 +256,7 @@ void up_lowsetup(void)
|
||||
* this pin configuration -- whether or not a serial console is selected.
|
||||
*/
|
||||
|
||||
#ifndef CONFIG_UART0_DISABLE
|
||||
#ifdef CONFIG_LM3S_UART0
|
||||
regval = getreg32(LM3S_SYSCON_RCGC1);
|
||||
regval |= SYSCON_RCGC1_UART0;
|
||||
putreg32(regval, LM3S_SYSCON_RCGC1);
|
||||
@ -267,7 +265,7 @@ void up_lowsetup(void)
|
||||
lm3s_configgpio(GPIO_UART0_TX);
|
||||
#endif
|
||||
|
||||
#ifndef CONFIG_UART1_DISABLE
|
||||
#ifdef CONFIG_LM3S_UART1
|
||||
regval = getreg32(LM3S_SYSCON_RCGC1);
|
||||
regval |= SYSCON_RCGC1_UART1;
|
||||
putreg32(regval, LM3S_SYSCON_RCGC1);
|
||||
|
@ -67,34 +67,32 @@
|
||||
/* Some sanity checks *******************************************************/
|
||||
|
||||
#if LM3S_NUARTS < 2
|
||||
# undef CONFIG_UART1_DISABLE
|
||||
# undef CONFIG_LM3S_UART1
|
||||
# undef CONFIG_UART1_SERIAL_CONSOLE
|
||||
# define CONFIG_UART1_DISABLE 1
|
||||
#endif
|
||||
|
||||
#if LM3S_NUARTS < 3
|
||||
# undef CONFIG_UART2_DISABLE
|
||||
# undef CONFIG_LM3S_UART2
|
||||
# undef CONFIG_UART2_SERIAL_CONSOLE
|
||||
# define CONFIG_UART2_DISABLE 1
|
||||
#endif
|
||||
|
||||
/* Is there a UART enabled? */
|
||||
|
||||
#if defined(CONFIG_UART0_DISABLE) && defined(CONFIG_UART1_DISABLE)
|
||||
#if !defined(CONFIG_LM3S_UART0) && !defined(CONFIG_LM3S_UART1) && !defined(CONFIG_LM3S_UART2)
|
||||
# error "No UARTs enabled"
|
||||
#endif
|
||||
|
||||
/* Is there a serial console? */
|
||||
|
||||
#if defined(CONFIG_UART0_SERIAL_CONSOLE) && !defined(CONFIG_UART0_DISABLE)
|
||||
#if defined(CONFIG_UART0_SERIAL_CONSOLE) && defined(CONFIG_LM3S_UART0)
|
||||
# undef CONFIG_UART1_SERIAL_CONSOLE
|
||||
# undef CONFIG_UART2_SERIAL_CONSOLE
|
||||
# define HAVE_CONSOLE 1
|
||||
#elif defined(CONFIG_UART1_SERIAL_CONSOLE) && !defined(CONFIG_UART1_DISABLE)
|
||||
#elif defined(CONFIG_UART1_SERIAL_CONSOLE) && defined(CONFIG_LM3S_UART1)
|
||||
# undef CONFIG_UART0_SERIAL_CONSOLE
|
||||
# undef CONFIG_UART2_SERIAL_CONSOLE
|
||||
# define HAVE_CONSOLE 1
|
||||
#elif defined(CONFIG_UART2_SERIAL_CONSOLE) && !defined(CONFIG_UART2_DISABLE)
|
||||
#elif defined(CONFIG_UART2_SERIAL_CONSOLE) && defined(CONFIG_LM3S_UART2)
|
||||
# undef CONFIG_UART0_SERIAL_CONSOLE
|
||||
# undef CONFIG_UART1_SERIAL_CONSOLE
|
||||
# define HAVE_CONSOLE 1
|
||||
@ -117,16 +115,16 @@
|
||||
#if defined(CONFIG_UART0_SERIAL_CONSOLE)
|
||||
# define CONSOLE_DEV g_uart0port /* UART0 is console */
|
||||
# define TTYS0_DEV g_uart0port /* UART0 is ttyS0 */
|
||||
# ifndef CONFIG_UART1_DISABLE
|
||||
# ifdef CONFIG_LM3S_UART1
|
||||
# define TTYS1_DEV g_uart1port /* UART1 is ttyS1 */
|
||||
# ifndef CONFIG_UART2_DISABLE
|
||||
# ifdef CONFIG_LM3S_UART2
|
||||
# define TTYS2_DEV g_uart2port /* UART2 is ttyS2 */
|
||||
# else
|
||||
# undef TTYS2_DEV /* No ttyS2 */
|
||||
# endif
|
||||
# else
|
||||
# undef TTYS2_DEV /* No ttyS2 */
|
||||
# ifndef CONFIG_UART2_DISABLE
|
||||
# ifdef CONFIG_LM3S_UART2
|
||||
# define TTYS1_DEV g_uart2port /* UART2 is ttyS1 */
|
||||
# else
|
||||
# undef TTYS1_DEV /* No ttyS1 */
|
||||
@ -135,16 +133,16 @@
|
||||
#elif defined(CONFIG_UART1_SERIAL_CONSOLE)
|
||||
# define CONSOLE_DEV g_uart1port /* UART1 is console */
|
||||
# define TTYS0_DEV g_uart1port /* UART1 is ttyS0 */
|
||||
# ifndef CONFIG_UART0_DISABLE
|
||||
# ifdef CONFIG_LM3S_UART0
|
||||
# define TTYS1_DEV g_uart0port /* UART0 is ttyS1 */
|
||||
# ifndef CONFIG_UART2_DISABLE
|
||||
# ifdef CONFIG_LM3S_UART2
|
||||
# define TTYS2_DEV g_uart2port /* UART2 is ttyS2 */
|
||||
# else
|
||||
# undef TTYS2_DEV /* No ttyS2 */
|
||||
# endif
|
||||
# else
|
||||
# undef TTYS2_DEV /* No ttyS2 */
|
||||
# ifndef CONFIG_UART2_DISABLE
|
||||
# ifdef CONFIG_LM3S_UART2
|
||||
# define TTYS1_DEV g_uart2port /* UART2 is ttyS1 */
|
||||
# else
|
||||
# undef TTYS1_DEV /* No ttyS1 */
|
||||
@ -153,49 +151,49 @@
|
||||
#elif defined(CONFIG_UART2_SERIAL_CONSOLE)
|
||||
# define CONSOLE_DEV g_uart2port /* UART2 is console */
|
||||
# define TTYS0_DEV g_uart2port /* UART2 is ttyS0 */
|
||||
# ifndef CONFIG_UART0_DISABLE
|
||||
# ifdef CONFIG_LM3S_UART0
|
||||
# define TTYS1_DEV g_uart0port /* UART0 is ttyS1 */
|
||||
# ifndef CONFIG_UART2_DISABLE
|
||||
# ifdef CONFIG_LM3S_UART2
|
||||
# define TTYS2_DEV g_uart2port /* UART2 is ttyS2 */
|
||||
# else
|
||||
# undef TTYS2_DEV /* No ttyS2 */
|
||||
# endif
|
||||
# else
|
||||
# undef TTYS2_DEV /* No ttyS2 */
|
||||
# ifndef CONFIG_UART2_DISABLE
|
||||
# ifdef CONFIG_LM3S_UART2
|
||||
# define TTYS1_DEV g_uart2port /* UART2 is ttyS1 */
|
||||
# else
|
||||
# undef TTYS1_DEV /* No ttyS1 */
|
||||
# endif
|
||||
# endif
|
||||
#elif !defined(CONFIG_UART0_DISABLE)
|
||||
#elifdefined(CONFIG_LM3S_UART0)
|
||||
# undef CONSOLE_DEV /* No console device */
|
||||
# define TTYS0_DEV g_uart1port /* UART1 is ttyS0 */
|
||||
# ifndef CONFIG_UART1_DISABLE
|
||||
# ifdef CONFIG_LM3S_UART1
|
||||
# define TTYS1_DEV g_uart1port /* UART1 is ttyS1 */
|
||||
# ifndef CONFIG_UART2_DISABLE
|
||||
# ifdef CONFIG_LM3S_UART2
|
||||
# define TTYS2_DEV g_uart2port /* UART2 is ttyS2 */
|
||||
# else
|
||||
# undef TTYS2_DEV /* No ttyS2 */
|
||||
# endif
|
||||
# else
|
||||
# undef TTYS2_DEV /* No ttyS2 */
|
||||
# ifndef CONFIG_UART2_DISABLE
|
||||
# ifdef CONFIG_LM3S_UART2
|
||||
# define TTYS1_DEV g_uart2port /* UART2 is ttyS1 */
|
||||
# else
|
||||
# undef TTYS1_DEV /* No ttyS1 */
|
||||
# endif
|
||||
# endif
|
||||
#elif !defined(CONFIG_UART1_DISABLE)
|
||||
#elifdefined(CONFIG_LM3S_UART1)
|
||||
# undef CONSOLE_DEV /* No console device */
|
||||
# define TTYS0_DEV g_uart1port /* UART1 is ttyS0 */
|
||||
# undef TTYS2_DEV /* No ttyS2 */
|
||||
# ifndef CONFIG_UART2_DISABLE
|
||||
# ifdef CONFIG_LM3S_UART2
|
||||
# define TTYS1_DEV g_uart2port /* UART2 is ttyS1 */
|
||||
# else
|
||||
# undef TTYS1_DEV /* No ttyS1 */
|
||||
# endif
|
||||
#elif !defined(CONFIG_UART2_DISABLE)
|
||||
#elifdefined(CONFIG_LM3S_UART2)
|
||||
# undef CONSOLE_DEV /* No console device */
|
||||
# define TTYS0_DEV g_uart2port /* UART2 is ttyS0 */
|
||||
# undef TTYS1_DEV /* No ttyS1 */
|
||||
@ -263,22 +261,22 @@ struct uart_ops_s g_uart_ops =
|
||||
|
||||
/* I/O buffers */
|
||||
|
||||
#ifndef CONFIG_UART0_DISABLE
|
||||
#ifdef CONFIG_LM3S_UART0
|
||||
static char g_uart0rxbuffer[CONFIG_UART0_RXBUFSIZE];
|
||||
static char g_uart0txbuffer[CONFIG_UART0_TXBUFSIZE];
|
||||
#endif
|
||||
#ifndef CONFIG_UART1_DISABLE
|
||||
#ifdef CONFIG_LM3S_UART1
|
||||
static char g_uart1rxbuffer[CONFIG_UART1_RXBUFSIZE];
|
||||
static char g_uart1txbuffer[CONFIG_UART1_TXBUFSIZE];
|
||||
#endif
|
||||
#ifndef CONFIG_UART2_DISABLE
|
||||
#ifdef CONFIG_LM3S_UART2
|
||||
static char g_uart2rxbuffer[CONFIG_UART2_RXBUFSIZE];
|
||||
static char g_uart2txbuffer[CONFIG_UART2_TXBUFSIZE];
|
||||
#endif
|
||||
|
||||
/* This describes the state of the LM3S uart0 port. */
|
||||
|
||||
#ifndef CONFIG_UART0_DISABLE
|
||||
#ifdef CONFIG_LM3S_UART0
|
||||
static struct up_dev_s g_uart0priv =
|
||||
{
|
||||
.uartbase = LM3S_UART0_BASE,
|
||||
@ -308,7 +306,7 @@ static uart_dev_t g_uart0port =
|
||||
|
||||
/* This describes the state of the LM3S uart1 port. */
|
||||
|
||||
#ifndef CONFIG_UART1_DISABLE
|
||||
#ifdef CONFIG_LM3S_UART1
|
||||
static struct up_dev_s g_uart1priv =
|
||||
{
|
||||
.uartbase = LM3S_UART1_BASE,
|
||||
@ -338,7 +336,7 @@ static uart_dev_t g_uart1port =
|
||||
|
||||
/* This describes the state of the LM3S uart1 port. */
|
||||
|
||||
#ifndef CONFIG_UART2_DISABLE
|
||||
#ifdef CONFIG_LM3S_UART2
|
||||
static struct up_dev_s g_uart2priv =
|
||||
{
|
||||
.uartbase = LM3S_UART2_BASE,
|
||||
@ -688,14 +686,14 @@ static int up_interrupt(int irq, void *context)
|
||||
int passes;
|
||||
bool handled;
|
||||
|
||||
#ifndef CONFIG_UART0_DISABLE
|
||||
#ifdef CONFIG_LM3S_UART0
|
||||
if (g_uart0priv.irq == irq)
|
||||
{
|
||||
dev = &g_uart0port;
|
||||
}
|
||||
else
|
||||
#endif
|
||||
#ifndef CONFIG_UART1_DISABLE
|
||||
#ifdef CONFIG_LM3S_UART1
|
||||
if (g_uart1priv.irq == irq)
|
||||
{
|
||||
dev = &g_uart1port;
|
||||
|
@ -4,6 +4,20 @@
|
||||
#
|
||||
|
||||
if ARCH_M16C
|
||||
comment "M16C Configuration Options"
|
||||
|
||||
config M16C_UART0
|
||||
bool "UART0"
|
||||
select ARCH_HAVE_UART0
|
||||
default n
|
||||
|
||||
config M16C_UART1
|
||||
bool "UART1"
|
||||
select ARCH_HAVE_UART1
|
||||
default n
|
||||
|
||||
config M16C_UART2
|
||||
bool "UART2"
|
||||
select ARCH_HAVE_UART2
|
||||
default n
|
||||
|
||||
endif
|
||||
|
@ -63,7 +63,7 @@
|
||||
* not have serial ports but supports stdout through, say, an LCD.
|
||||
*/
|
||||
|
||||
#if defined(CONFIG_UART0_DISABLE) || defined(CONFIG_UART1_DISABLE) || defined(CONFIG_UART2_DISABLE)
|
||||
#if defined(CONFIG_M16C_UART0) || defined(CONFIG_M16C_UART1) || defined(CONFIG_M16C_UART2)
|
||||
# define HAVE_SERIAL
|
||||
#else
|
||||
# undef HAVE_SERIAL
|
||||
@ -71,15 +71,15 @@
|
||||
|
||||
/* Is one of the serial ports a console? */
|
||||
|
||||
#if defined(CONFIG_UART0_SERIAL_CONSOLE) && !defined(CONFIG_UART0_DISABLE)
|
||||
#if defined(CONFIG_UART0_SERIAL_CONSOLE) && defined(CONFIG_M16C_UART0)
|
||||
# define HAVE_SERIALCONSOLE 1
|
||||
# undef CONFIG_UART1_SERIAL_CONSOLE
|
||||
# undef CONFIG_UART2_SERIAL_CONSOLE
|
||||
#elif defined(CONFIG_UART1_SERIAL_CONSOLE) && !defined(CONFIG_UART1_DISABLE)
|
||||
#elif defined(CONFIG_UART1_SERIAL_CONSOLE) && defined(CONFIG_M16C_UART1)
|
||||
# define HAVE_SERIALCONSOLE 1
|
||||
# undef CONFIG_UART0_SERIAL_CONSOLE
|
||||
# undef CONFIG_UART2_SERIAL_CONSOLE
|
||||
#elif defined(CONFIG_UART2_SERIAL_CONSOLE) && !defined(CONFIG_UART2_DISABLE)
|
||||
#elif defined(CONFIG_UART2_SERIAL_CONSOLE) && defined(CONFIG_M16C_UART2)
|
||||
# define HAVE_SERIALCONSOLE 1
|
||||
# undef CONFIG_UART0_SERIAL_CONSOLE
|
||||
# undef CONFIG_UART1_SERIAL_CONSOLE
|
||||
|
@ -63,7 +63,7 @@
|
||||
* not have serial ports but supports a console through, say, an LCD.
|
||||
*/
|
||||
|
||||
#if !defined(CONFIG_UART0_DISABLE) && !defined(CONFIG_UART1_DISABLE) && !defined(CONFIG_UART2_DISABLE)
|
||||
#if defined(CONFIG_M16C_UART0) || defined(CONFIG_M16C_UART1) || defined(CONFIG_M16C_UART2)
|
||||
|
||||
/****************************************************************************
|
||||
* Definitions
|
||||
@ -100,24 +100,24 @@
|
||||
|
||||
/* Are there any UARTs? */
|
||||
|
||||
#if defined(CONFIG_UART0_DISABLE) && defined(CONFIG_UART1_DISABLE) && defined(CONFIG_UART2_DISABLE)
|
||||
#if !defined(CONFIG_M16C_UART0) && !defined(CONFIG_M16C_UART1) && !defined(CONFIG_M16C_UART2)
|
||||
# ifdef USE_SERIALDRIVER
|
||||
# error "Serial driver selected, but UARTs not enabled"
|
||||
# error "Serial driver selected, but No UARTs is enabled"
|
||||
# undef USE_SERIALDRIVER
|
||||
# endif
|
||||
#endif
|
||||
|
||||
/* Is there a serial console? */
|
||||
|
||||
#if defined(CONFIG_UART0_SERIAL_CONSOLE) && !defined(CONFIG_UART0_DISABLE)
|
||||
#if defined(CONFIG_UART0_SERIAL_CONSOLE) && defined(CONFIG_M16C_UART0)
|
||||
# define HAVE_SERIALCONSOLE 1
|
||||
# undef CONFIG_UART1_SERIAL_CONSOLE
|
||||
# undef CONFIG_UART2_SERIAL_CONSOLE
|
||||
#elif defined(CONFIG_UART1_SERIAL_CONSOLE) && !defined(CONFIG_UART1_DISABLE)
|
||||
#elif defined(CONFIG_UART1_SERIAL_CONSOLE) && defined(CONFIG_M16C_UART1)
|
||||
# define HAVE_SERIALCONSOLE 1
|
||||
# undef CONFIG_UART0_SERIAL_CONSOLE
|
||||
# undef CONFIG_UART2_SERIAL_CONSOLE
|
||||
#elif defined(CONFIG_UART2_SERIAL_CONSOLE) && !defined(CONFIG_UART2_DISABLE)
|
||||
#elif defined(CONFIG_UART2_SERIAL_CONSOLE) && defined(CONFIG_M16C_UART2)
|
||||
# define HAVE_SERIALCONSOLE 1
|
||||
# undef CONFIG_UART0_SERIAL_CONSOLE
|
||||
# undef CONFIG_UART1_SERIAL_CONSOLE
|
||||
@ -141,18 +141,18 @@
|
||||
|
||||
/* Which UART with be tty0/console and which tty1 and tty2? */
|
||||
|
||||
/* CONFIG_UART0_SERIAL_CONSOLE (implies CONFIG_UART0_DISABLE also un-defined) */
|
||||
/* CONFIG_UART0_SERIAL_CONSOLE (implies CONFIG_M16C_UART0 also defined) */
|
||||
|
||||
#if defined(CONFIG_UART0_SERIAL_CONSOLE)
|
||||
# define CONSOLE_DEV g_uart0port /* UART0 is console */
|
||||
# define TTYS0_DEV g_uart0port /* UART0 is tty0 */
|
||||
# ifndef CONFIG_UART1_DISABLE
|
||||
# ifdef CONFIG_M16C_UART1
|
||||
# define TTYS1_DEV g_uart1port /* UART1 is tty1 */
|
||||
# ifndef CONFIG_UART2_DISABLE
|
||||
# ifdef CONFIG_M16C_UART2
|
||||
# define TTYS2_DEV g_uart2port /* UART2 is tty2 */
|
||||
# endif
|
||||
# else
|
||||
# ifndef CONFIG_UART2_DISABLE
|
||||
# ifdef CONFIG_M16C_UART2
|
||||
# define TTYS2_DEV g_uart2port /* UART2 is tty1 */
|
||||
# else
|
||||
# undef TTYS1_DEV /* No tty1 */
|
||||
@ -160,18 +160,18 @@
|
||||
# undef TTYS2_DEV /* No tty2 */
|
||||
# endif
|
||||
|
||||
/* CONFIG_UART1_SERIAL_CONSOLE (implies CONFIG_UART1_DISABLE also un-defined) */
|
||||
/* CONFIG_UART1_SERIAL_CONSOLE (implies CONFIG_M16C_UART1 also defined) */
|
||||
|
||||
#elif defined(CONFIG_UART1_SERIAL_CONSOLE)
|
||||
# define CONSOLE_DEV g_uart1port /* UART1 is console */
|
||||
# define TTYS0_DEV g_uart1port /* UART1 is tty0 */
|
||||
# ifndef CONFIG_UART0_DISABLE
|
||||
# ifdef CONFIG_M16C_UART0
|
||||
# define TTYS1_DEV g_uart0port /* UART0 is tty1 */
|
||||
# ifndef CONFIG_UART2_DISABLE
|
||||
# ifdef CONFIG_M16C_UART2
|
||||
# define TTYS2_DEV g_uart2port /* UART2 is tty2 */
|
||||
# endif
|
||||
# else
|
||||
# ifndef CONFIG_UART2_DISABLE
|
||||
# ifdef CONFIG_M16C_UART2
|
||||
# define TTYS2_DEV g_uart2port /* UART2 is tty1 */
|
||||
# else
|
||||
# undef TTYS1_DEV /* No tty1 */
|
||||
@ -179,18 +179,18 @@
|
||||
# undef TTYS2_DEV /* No tty2 */
|
||||
# endif
|
||||
|
||||
/* CONFIG_UART2_SERIAL_CONSOLE (implies CONFIG_UART2_DISABLE also un-defined) */
|
||||
/* CONFIG_UART2_SERIAL_CONSOLE (implies CONFIG_M16C_UART2 also defined) */
|
||||
|
||||
#elif defined(CONFIG_UART2_SERIAL_CONSOLE)
|
||||
# define CONSOLE_DEV g_uart2port /* UART2 is console */
|
||||
# define TTYS0_DEV g_uart2port /* UART2 is tty0 */
|
||||
# ifndef CONFIG_UART0_DISABLE
|
||||
# ifdef CONFIG_M16C_UART0
|
||||
# define TTYS1_DEV g_uart0port /* UART0 is tty1 */
|
||||
# ifndef CONFIG_UART1_DISABLE
|
||||
# ifdef CONFIG_M16C_UART1
|
||||
# define TTYS2_DEV g_uart1port /* UART1 is tty2 */
|
||||
# endif
|
||||
# else
|
||||
# ifndef CONFIG_UART1_DISABLE
|
||||
# ifdef CONFIG_M16C_UART1
|
||||
# define TTYS1_DEV g_uart1port /* UART1 is tty1 */
|
||||
# else
|
||||
# undef TTYS1_DEV /* No tty1 */
|
||||
@ -198,18 +198,18 @@
|
||||
# undef TTYS2_DEV /* No tty2 */
|
||||
# endif
|
||||
|
||||
/* No console, at least one of CONFIG_UART0/1/2_DISABLE defined */
|
||||
/* No console, at least one of CONFIG_M16C_UART0/1/2 defined */
|
||||
|
||||
#elif !defined(CONFIG_UART0_DISABLE)
|
||||
#elif defined(CONFIG_M16C_UART0)
|
||||
# undef CONSOLE_DEV /* No console */
|
||||
# define TTYS0_DEV g_uart0port /* UART0 is tty0 */
|
||||
# ifndef CONFIG_UART1_DISABLE
|
||||
# ifdef CONFIG_M16C_UART1
|
||||
# define TTYS1_DEV g_uart1port /* UART1 is tty1 */
|
||||
# ifndef CONFIG_UART2_DISABLE
|
||||
# ifdef CONFIG_M16C_UART2
|
||||
# define TTYS2_DEV g_uart2port /* UART2 is tty2 */
|
||||
# endif
|
||||
# else
|
||||
# ifndef CONFIG_UART2_DISABLE
|
||||
# ifdef CONFIG_M16C_UART2
|
||||
# define TTYS1_DEV g_uart1port /* UART2 is tty1 */
|
||||
# else
|
||||
# undef TTYS1_DEV /* No tty1 */
|
||||
@ -217,17 +217,17 @@
|
||||
# undef TTYS2_DEV /* No tty2 */
|
||||
# endif
|
||||
|
||||
elif !defined(CONFIG_UART1_DISABLE)
|
||||
elif defined(CONFIG_M16C_UART1)
|
||||
# undef CONSOLE_DEV /* No console */
|
||||
# undef TTYS2_DEV /* No tty2 */
|
||||
# define TTYS0_DEV g_uart1port /* UART1 is tty0 */
|
||||
# ifndef CONFIG_UART2_DISABLE
|
||||
# ifdef CONFIG_M16C_UART2
|
||||
# define TTYS1_DEV g_uart2port /* UART2 is tty1 */
|
||||
# else
|
||||
# undef TTYS1_DEV /* No tty1 */
|
||||
# endif
|
||||
|
||||
/* Otherwise, there is no console and only CONFIG_UART2_DISABLE is un-defined */
|
||||
/* Otherwise, there is no console and only CONFIG_M16C_UART2 is defined */
|
||||
|
||||
#else
|
||||
# undef CONSOLE_DEV /* No console */
|
||||
@ -300,22 +300,22 @@ struct uart_ops_s g_uart_ops =
|
||||
|
||||
/* I/O buffers */
|
||||
|
||||
#ifndef CONFIG_UART0_DISABLE
|
||||
#ifdef CONFIG_M16C_UART0
|
||||
static char g_uart0rxbuffer[CONFIG_UART0_RXBUFSIZE];
|
||||
static char g_uart0txbuffer[CONFIG_UART0_TXBUFSIZE];
|
||||
#endif
|
||||
#ifndef CONFIG_UART1_DISABLE
|
||||
#ifdef CONFIG_M16C_UART1
|
||||
static char g_uart1rxbuffer[CONFIG_UART1_RXBUFSIZE];
|
||||
static char g_uart1txbuffer[CONFIG_UART1_TXBUFSIZE];
|
||||
#endif
|
||||
#ifndef CONFIG_UART2_DISABLE
|
||||
#ifdef CONFIG_M16C_UART2
|
||||
static char g_uart2rxbuffer[CONFIG_UART2_RXBUFSIZE];
|
||||
static char g_uart2txbuffer[CONFIG_UART2_TXBUFSIZE];
|
||||
#endif
|
||||
|
||||
/* This describes the state of the M16C UART0 port. */
|
||||
|
||||
#ifndef CONFIG_UART0_DISABLE
|
||||
#ifdef CONFIG_M16C_UART0
|
||||
static struct up_dev_s g_uart0priv =
|
||||
{
|
||||
.baud = CONFIG_UART0_BAUD,
|
||||
@ -347,7 +347,7 @@ static uart_dev_t g_uart0port =
|
||||
|
||||
/* This describes the state of the M16C UART1 port. */
|
||||
|
||||
#ifndef CONFIG_UART1_DISABLE
|
||||
#ifdef CONFIG_M16C_UART1
|
||||
static struct up_dev_s g_uart1priv =
|
||||
{
|
||||
.baud = CONFIG_UART1_BAUD,
|
||||
@ -379,7 +379,7 @@ static uart_dev_t g_uart1port =
|
||||
|
||||
/* This describes the state of the M16C UART2 port. */
|
||||
|
||||
#ifndef CONFIG_UART2_DISABLE
|
||||
#ifdef CONFIG_M16C_UART2
|
||||
static struct up_dev_s g_uart2priv =
|
||||
{
|
||||
.baud = CONFIG_UART2_BAUD,
|
||||
@ -558,7 +558,7 @@ static int up_setup(struct uart_dev_s *dev)
|
||||
|
||||
/* Set interrupt cause=TX complete and continuous receive mode */
|
||||
|
||||
#ifndef CONFIG_UART0_DISABLE
|
||||
#ifdef CONFIG_M16C_UART0
|
||||
if (priv->uartno == 0)
|
||||
{
|
||||
regval = getreg8(M16C_UCON);
|
||||
@ -567,7 +567,7 @@ static int up_setup(struct uart_dev_s *dev)
|
||||
}
|
||||
else
|
||||
#endif
|
||||
#ifndef CONFIG_UART1_DISABLE
|
||||
#ifdef CONFIG_M16C_UART1
|
||||
if (priv->uartno == 1)
|
||||
{
|
||||
regval = getreg8(M16C_UCON);
|
||||
@ -576,7 +576,7 @@ static int up_setup(struct uart_dev_s *dev)
|
||||
}
|
||||
else
|
||||
#endif
|
||||
#ifndef CONFIG_UART2_DISABLE
|
||||
#ifdef CONFIG_M16C_UART2
|
||||
if (priv->uartno == 2)
|
||||
{
|
||||
regval = getreg8(M16C_U2C1);
|
||||
@ -632,7 +632,7 @@ static int up_setup(struct uart_dev_s *dev)
|
||||
|
||||
/* Set port direction registers for Rx/TX pins */
|
||||
|
||||
#ifndef CONFIG_UART0_DISABLE
|
||||
#ifdef CONFIG_M16C_UART0
|
||||
if (priv->uartno == 0)
|
||||
{
|
||||
regval = getreg8(M16C_PD6);
|
||||
@ -642,7 +642,7 @@ static int up_setup(struct uart_dev_s *dev)
|
||||
}
|
||||
else
|
||||
#endif
|
||||
#ifndef CONFIG_UART1_DISABLE
|
||||
#ifdef CONFIG_M16C_UART1
|
||||
if (priv->uartno == 1)
|
||||
{
|
||||
regval = getreg8(M16C_PD6);
|
||||
@ -652,7 +652,7 @@ static int up_setup(struct uart_dev_s *dev)
|
||||
}
|
||||
else
|
||||
#endif
|
||||
#ifndef CONFIG_UART2_DISABLE
|
||||
#ifdef CONFIG_M16C_UART2
|
||||
if (priv->uartno == 2)
|
||||
{
|
||||
regval = getreg8(M16C_PD7);
|
||||
@ -766,21 +766,21 @@ static int up_rcvinterrupt(int irq, void *context)
|
||||
{
|
||||
struct uart_dev_s *dev = NULL;
|
||||
|
||||
#ifndef CONFIG_UART0_DISABLE
|
||||
#ifdef CONFIG_M16C_UART0
|
||||
if (irq == g_uart0priv.rcvirq)
|
||||
{
|
||||
dev = &g_uart0port;
|
||||
}
|
||||
else
|
||||
#endif
|
||||
#ifndef CONFIG_UART1_DISABLE
|
||||
#ifdef CONFIG_M16C_UART1
|
||||
if (irq == g_uart1priv.rcvirq)
|
||||
{
|
||||
dev = &g_uart1port;
|
||||
}
|
||||
else
|
||||
#endif
|
||||
#ifndef CONFIG_UART2_DISABLE
|
||||
#ifdef CONFIG_M16C_UART2
|
||||
if (irq = g_uart2priv.rcvirq)
|
||||
{
|
||||
dev = &g_uart2port;
|
||||
@ -845,7 +845,7 @@ static void m16c_rxint(struct up_dev_s *dev, bool enable)
|
||||
|
||||
/* Pick the SxTIC register and enable interrupt priority */
|
||||
|
||||
#ifndef CONFIG_UART0_DISABLE
|
||||
#ifdef CONFIG_M16C_UART0
|
||||
if (dev->uartno == 0)
|
||||
{
|
||||
regaddr = M16C_S0RIC;
|
||||
@ -853,7 +853,7 @@ static void m16c_rxint(struct up_dev_s *dev, bool enable)
|
||||
}
|
||||
else
|
||||
#endif
|
||||
#ifndef CONFIG_UART1_DISABLE
|
||||
#ifdef CONFIG_M16C_UART1
|
||||
if (dev->uartno == 1)
|
||||
{
|
||||
regaddr = M16C_S1RIC;
|
||||
@ -861,7 +861,7 @@ static void m16c_rxint(struct up_dev_s *dev, bool enable)
|
||||
}
|
||||
else
|
||||
#endif
|
||||
#ifndef CONFIG_UART2_DISABLE
|
||||
#ifdef CONFIG_M16C_UART2
|
||||
if (dev->uartno == 2)
|
||||
{
|
||||
regaddr = M16C_S2RIC;
|
||||
@ -932,21 +932,21 @@ static int up_xmtinterrupt(int irq, void *context)
|
||||
{
|
||||
struct uart_dev_s *dev = NULL;
|
||||
|
||||
#ifndef CONFIG_UART0_DISABLE
|
||||
#ifdef CONFIG_M16C_UART0
|
||||
if (irq == g_uart0priv.xmtirq)
|
||||
{
|
||||
dev = &g_uart0port;
|
||||
}
|
||||
else
|
||||
#endif
|
||||
#ifndef CONFIG_UART1_DISABLE
|
||||
#ifdef CONFIG_M16C_UART1
|
||||
if (irq == g_uart1priv.xmtirq)
|
||||
{
|
||||
dev = &g_uart1port;
|
||||
}
|
||||
else
|
||||
#endif
|
||||
#ifndef CONFIG_UART2_DISABLE
|
||||
#ifdef CONFIG_M16C_UART2
|
||||
if (irq == g_uart2priv.xmtirq)
|
||||
{
|
||||
dev = &g_uart1port;
|
||||
@ -1000,7 +1000,7 @@ static void m16c_txint(struct up_dev_s *dev, bool enable)
|
||||
|
||||
/* Pick the SxTIC register and enable interrupt priority */
|
||||
|
||||
#ifndef CONFIG_UART0_DISABLE
|
||||
#ifdef CONFIG_M16C_UART0
|
||||
if (dev->uartno == 0)
|
||||
{
|
||||
regaddr = M16C_S0TIC;
|
||||
@ -1008,7 +1008,7 @@ static void m16c_txint(struct up_dev_s *dev, bool enable)
|
||||
}
|
||||
else
|
||||
#endif
|
||||
#ifndef CONFIG_UART1_DISABLE
|
||||
#ifdef CONFIG_M16C_UART1
|
||||
if (dev->uartno == 1)
|
||||
{
|
||||
regaddr = M16C_S1TIC;
|
||||
@ -1016,7 +1016,7 @@ static void m16c_txint(struct up_dev_s *dev, bool enable)
|
||||
}
|
||||
else
|
||||
#endif
|
||||
#ifndef CONFIG_UART2_DISABLE
|
||||
#ifdef CONFIG_M16C_UART2
|
||||
if (dev->uartno == 2)
|
||||
{
|
||||
regaddr = M16C_S2TIC;
|
||||
@ -1202,5 +1202,5 @@ int up_putc(int ch)
|
||||
#endif /* USE_SERIALDRIVER */
|
||||
#elif defined(CONFIG_UART0_SERIAL_CONSOLE) || defined(CONFIG_UART1_SERIAL_CONSOLE)|| defined(CONFIG_UART2_SERIAL_CONSOLE)
|
||||
# error "A serial console selected, but corresponding UART not enabled"
|
||||
#endif /* !CONFIG_UART0_DISABLE && !CONFIG_UART1_DISABLE && !CONFIG_UART2_DISABLE */
|
||||
#endif /* CONFIG_M16C_UART0 || CONFIG_M16C_UART1 || CONFIG_M16C_UART2 */
|
||||
|
||||
|
@ -15,36 +15,43 @@ config ARCH_CHIP_Z80
|
||||
|
||||
config ARCH_CHIP_Z8F640X
|
||||
bool "Z8F640X"
|
||||
select ARCH_CHIP_Z8
|
||||
---help---
|
||||
ZiLOG Z8F640X (z8 Encore)
|
||||
|
||||
config ARCH_CHIP_Z8F6403
|
||||
bool "Z8F6403"
|
||||
select ARCH_CHIP_Z8
|
||||
---help---
|
||||
ZiLOG Z8F6403 (z8 Encore)
|
||||
|
||||
config ARCH_CHIP_Z8F642X
|
||||
bool "Z8F642X"
|
||||
select ARCH_CHIP_Z8
|
||||
---help---
|
||||
ZiLOG Z8F642X (z8 Encore)
|
||||
|
||||
config ARCH_CHIP_Z8F6423
|
||||
bool "Z8F6423"
|
||||
select ARCH_CHIP_Z8
|
||||
---help---
|
||||
ZiLOG Z8F6423 (z8 Encore)
|
||||
|
||||
config ARCH_CHIP_EZ80F91
|
||||
bool "EZ80F91"
|
||||
select ARCH_CHIP_EZ80
|
||||
---help---
|
||||
ZiLOG EZ80F91 (ez80 Acclaim)
|
||||
|
||||
config ARCH_CHIP_EZ80F92
|
||||
bool "EZ80F92"
|
||||
select ARCH_CHIP_EZ80
|
||||
---help---
|
||||
ZiLOG EZ80F92 (ez80 Acclaim)
|
||||
|
||||
config ARCH_CHIP_EZ80F93
|
||||
bool "EZ80F93"
|
||||
select ARCH_CHIP_EZ80
|
||||
---help---
|
||||
ZiLOG EZ80F93 (ez80 Acclaim)
|
||||
|
||||
@ -52,11 +59,9 @@ endchoice
|
||||
|
||||
config ARCH_CHIP_Z8
|
||||
bool
|
||||
default y if ARCH_CHIP_Z8F640X || ARCH_CHIP_Z8F6403 || ARCH_CHIP_Z8F642X || ARCH_CHIP_Z8F6423
|
||||
|
||||
config ARCH_CHIP_EZ80
|
||||
bool
|
||||
default y if ARCH_CHIP_EZ80F91 || ARCH_CHIP_EZ80F92 || ARCH_CHIP_EZ80F93
|
||||
|
||||
config ARCH_CHIP
|
||||
string
|
||||
|
@ -4,4 +4,20 @@
|
||||
#
|
||||
|
||||
if ARCH_CHIP_EZ80
|
||||
|
||||
config EZ80_UART0
|
||||
bool "UART0"
|
||||
select ARCH_HAVE_UART0
|
||||
default n
|
||||
|
||||
config EZ80_UART1
|
||||
bool "UART1"
|
||||
select ARCH_HAVE_UART1
|
||||
default n
|
||||
|
||||
config EZ80_UART2
|
||||
bool "UART2"
|
||||
select ARCH_HAVE_UART2
|
||||
default n
|
||||
|
||||
endif
|
||||
|
@ -59,7 +59,7 @@
|
||||
* not have serial ports but supports stdout through, say, an LCD.
|
||||
*/
|
||||
|
||||
#if defined(CONFIG_UART0_DISABLE) || defined(CONFIG_UART1_DISABLE)
|
||||
#if defined(CONFIG_EZ80_UART0) || defined(CONFIG_EZ80_UART1)
|
||||
# define HAVE_SERIAL
|
||||
#else
|
||||
# undef HAVE_SERIAL
|
||||
@ -67,10 +67,10 @@
|
||||
|
||||
/* Is one of the serial ports a console? */
|
||||
|
||||
#if defined(CONFIG_UART0_SERIAL_CONSOLE) && !defined(CONFIG_UART0_DISABLE)
|
||||
#if defined(CONFIG_UART0_SERIAL_CONSOLE) && defined(CONFIG_EZ80_UART0)
|
||||
# define HAVE_SERIALCONSOLE 1
|
||||
# undef CONFIG_UART1_SERIAL_CONSOLE
|
||||
#elif defined(CONFIG_UART1_SERIAL_CONSOLE) && !defined(CONFIG_UART1_DISABLE)
|
||||
#elif defined(CONFIG_UART1_SERIAL_CONSOLE) && defined(CONFIG_EZ80_UART1)
|
||||
# define HAVE_SERIALCONSOLE 1
|
||||
# undef CONFIG_UART0_SERIAL_CONSOLE
|
||||
#else
|
||||
@ -186,7 +186,7 @@ void up_lowuartinit(void)
|
||||
|
||||
/* Configure pins for usage of UARTs (whether or not we have a console) */
|
||||
|
||||
#ifndef CONFIG_UART0_DISABLE
|
||||
#ifdef CONFIG_EZ80_UART0
|
||||
/* Set Port D, pins 0 and 1 for their alternate function (Mode 7) to enable UART0 */
|
||||
|
||||
regval = inp(EZ80_PD_DDR);
|
||||
@ -202,7 +202,7 @@ void up_lowuartinit(void)
|
||||
outp(EZ80_PD_ALT2, regval);
|
||||
#endif
|
||||
|
||||
#ifndef CONFIG_UART1_DISABLE
|
||||
#ifdef CONFIG_EZ80_UART1
|
||||
/* Set Port C, pins 0 and 1 for their alternate function (Mode 7) to enable UART1 */
|
||||
|
||||
regval = inp(EZ80_PC_DDR);
|
||||
|
@ -118,18 +118,18 @@ struct uart_ops_s g_uart_ops =
|
||||
|
||||
/* I/O buffers */
|
||||
|
||||
#ifndef CONFIG_UART0_DISABLE
|
||||
#ifdef CONFIG_EZ80_UART0
|
||||
static char g_uart0rxbuffer[CONFIG_UART0_RXBUFSIZE];
|
||||
static char g_uart0txbuffer[CONFIG_UART0_TXBUFSIZE];
|
||||
#endif
|
||||
#ifndef CONFIG_UART1_DISABLE
|
||||
#ifdef CONFIG_EZ80_UART1
|
||||
static char g_uart1rxbuffer[CONFIG_UART1_RXBUFSIZE];
|
||||
static char g_uart1txbuffer[CONFIG_UART1_TXBUFSIZE];
|
||||
#endif
|
||||
|
||||
/* This describes the state of the UART0 port. */
|
||||
|
||||
#ifndef CONFIG_UART0_DISABLE
|
||||
#ifdef CONFIG_EZ80_UART0
|
||||
static struct ez80_dev_s g_uart0priv =
|
||||
{
|
||||
EZ80_UART0_BASE, /* uartbase */
|
||||
@ -174,7 +174,7 @@ static uart_dev_t g_uart0port =
|
||||
|
||||
/* This describes the state of the UART1 port. */
|
||||
|
||||
#ifndef CONFIG_UART1_DISABLE
|
||||
#ifdef CONFIG_EZ80_UART1
|
||||
static struct ez80_dev_s g_uart1priv =
|
||||
{
|
||||
EZ80_UART1_BASE, /* uartbase */
|
||||
@ -219,24 +219,24 @@ static uart_dev_t g_uart1port =
|
||||
|
||||
/* Now, which one with be tty0/console and which tty1? */
|
||||
|
||||
#if defined(CONFIG_UART0_SERIAL_CONSOLE) && !defined(CONFIG_UART0_DISABLE)
|
||||
#if defined(CONFIG_UART0_SERIAL_CONSOLE) && defined(CONFIG_EZ80_UART0)
|
||||
# define CONSOLE_DEV g_uart0port
|
||||
# define TTYS0_DEV g_uart0port
|
||||
# if !defined(CONFIG_UART1_DISABLE)
|
||||
# if defined(CONFIG_EZ80_UART1)
|
||||
# define TTYS1_DEV g_uart1port
|
||||
# endif
|
||||
#elif defined(CONFIG_UART1_SERIAL_CONSOLE) && !defined(CONFIG_UART1_DISABLE)
|
||||
#elif defined(CONFIG_UART1_SERIAL_CONSOLE) && defined(CONFIG_EZ80_UART1)
|
||||
# define CONSOLE_DEV g_uart1port
|
||||
# define TTYS0_DEV g_uart1port
|
||||
# if !defined(CONFIG_UART0_DISABLE)
|
||||
# if defined(CONFIG_EZ80_UART0)
|
||||
# define TTYS1_DEV g_uart0port
|
||||
# endif
|
||||
#elif !defined(CONFIG_UART0_DISABLE)
|
||||
#elif defined(CONFIG_EZ80_UART0)
|
||||
# define TTYS0_DEV g_uart0port
|
||||
# if !defined(CONFIG_UART1_DISABLE)
|
||||
# if defined(CONFIG_EZ80_UART1)
|
||||
# define TTYS1_DEV g_uart1port
|
||||
# endif
|
||||
#elif !defined(CONFIG_UART0_DISABLE)
|
||||
#elif defined(CONFIG_EZ80_UART0)
|
||||
# define TTYS0_DEV g_uart1port
|
||||
#endif
|
||||
|
||||
@ -475,14 +475,14 @@ static int ez80_interrrupt(int irq, void *context)
|
||||
struct ez80_dev_s *priv;
|
||||
volatile uint32_t cause;
|
||||
|
||||
#ifndef CONFIG_UART0_DISABLE
|
||||
#ifdef CONFIG_EZ80_UART0
|
||||
if (g_uart0priv.irq == irq)
|
||||
{
|
||||
dev = &g_uart0port;
|
||||
}
|
||||
else
|
||||
#endif
|
||||
#ifndef CONFIG_UART1_DISABLE
|
||||
#ifdef CONFIG_EZ80_UART1
|
||||
if (g_uart1priv.irq == irq)
|
||||
{
|
||||
dev = &g_uart1port;
|
||||
@ -683,7 +683,7 @@ void up_serialinit(void)
|
||||
|
||||
/* Configure pins for usage of UARTs */
|
||||
|
||||
#ifndef CONFIG_UART0_DISABLE
|
||||
#ifdef CONFIG_EZ80_UART0
|
||||
/* Set Port D, pins 0 and 1 for their alternate function (Mode 7) to enable UART0 */
|
||||
|
||||
regval = inp(EZ80_PD_DDR);
|
||||
@ -699,7 +699,7 @@ void up_serialinit(void)
|
||||
outp(EZ80_PD_ALT2, regval);
|
||||
#endif
|
||||
|
||||
#ifndef CONFIG_UART1_DISABLE
|
||||
#ifdef CONFIG_EZ80_UART1
|
||||
/* Set Port C, pins 0 and 1 for their alternate function (Mode 7) to enable UART1 */
|
||||
|
||||
regval = inp(EZ80_PC_DDR);
|
||||
|
Loading…
x
Reference in New Issue
Block a user