SAMA5 PWM: Cosmetic changes to debug output
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@ -900,42 +900,42 @@ static void pwm_dumpregs(struct sam_pwm_chan_s *chan, FAR const char *msg)
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pwm_getreg(chan, SAM_PWM_OOV_OFFSET),
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pwm_getreg(chan, SAM_PWM_OS_OFFSET),
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pwm_getreg(chan, SAM_PWM_FMR_OFFSET));
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pwmvdbg(" FSR: %04x FPV: %04x FPE: %04x ELMR0: %04x\n",
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pwmvdbg(" FSR: %04x FPV: %04x FPE: %04x ELMR0: %04x\n",
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pwm_getreg(chan, SAM_PWM_FSR_OFFSET),
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pwm_getreg(chan, SAM_PWM_FPV_OFFSET),
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pwm_getreg(chan, SAM_PWM_FPE_OFFSET),
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pwm_getreg(chan, SAM_PWM_ELMR0_OFFSET));
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pwmvdbg("ELMR1: %04x SMMR: %04x WPSR: %04x\n",
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pwmvdbg(" ELMR1: %04x SMMR: %04x WPSR: %04x\n",
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pwm_getreg(chan, SAM_PWM_ELMR1_OFFSET),
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pwm_getreg(chan, SAM_PWM_SMMR_OFFSET),
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pwm_getreg(chan, SAM_PWM_WPSR_OFFSET));
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pwmvdbg("CMPV0: %04x CMPM0: %04x CMPV1: %04x CMPM1: %04x\n",
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pwmvdbg(" CMPV0: %04x CMPM0: %04x CMPV1: %04x CMPM1: %04x\n",
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pwm_getreg(chan, SAM_PWM_CMPV0_OFFSET),
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pwm_getreg(chan, SAM_PWM_CMPM0_OFFSET),
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pwm_getreg(chan, SAM_PWM_CMPV1_OFFSET),
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pwm_getreg(chan, SAM_PWM_CMPM1_OFFSET));
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pwmvdbg("CMPV2: %04x CMPM2: %04x CMPV3: %04x CMPM3: %04x\n",
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pwmvdbg(" CMPV2: %04x CMPM2: %04x CMPV3: %04x CMPM3: %04x\n",
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pwm_getreg(chan, SAM_PWM_CMPV2_OFFSET),
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pwm_getreg(chan, SAM_PWM_CMPM2_OFFSET),
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pwm_getreg(chan, SAM_PWM_CMPV3_OFFSET),
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pwm_getreg(chan, SAM_PWM_CMPM3_OFFSET));
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pwmvdbg("CMPV4: %04x CMPM4: %04x CMPV5: %04x CMPM5: %04x\n",
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pwmvdbg(" CMPV4: %04x CMPM4: %04x CMPV5: %04x CMPM5: %04x\n",
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pwm_getreg(chan, SAM_PWM_CMPV4_OFFSET),
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pwm_getreg(chan, SAM_PWM_CMPM4_OFFSET),
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pwm_getreg(chan, SAM_PWM_CMPV5_OFFSET),
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pwm_getreg(chan, SAM_PWM_CMPM5_OFFSET));
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pwmvdbg("CMPV6: %04x CMPM6: %04x CMPV7: %04x CMPM7: %04x\n",
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pwmvdbg(" CMPV6: %04x CMPM6: %04x CMPV7: %04x CMPM7: %04x\n",
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pwm_getreg(chan, SAM_PWM_CMPV6_OFFSET),
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pwm_getreg(chan, SAM_PWM_CMPM6_OFFSET),
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pwm_getreg(chan, SAM_PWM_CMPV7_OFFSET),
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pwm_getreg(chan, SAM_PWM_CMPM7_OFFSET));
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pwmvdbg("Channel %d: %s\n", chan->channel, msg);
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pwmvdbg(" CMR: %04x CDTY: %04x CPRD: %04x CCNT: %04x\n",
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pwmvdbg(" CMR: %04x CDTY: %04x CPRD: %04x CCNT: %04x\n",
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pwm_chan_getreg(chan, SAM_PWM_CMR_OFFSET),
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pwm_chan_getreg(chan, SAM_PWM_CDTY_OFFSET),
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pwm_chan_getreg(chan, SAM_PWM_CPRD_OFFSET),
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pwm_chan_getreg(chan, SAM_PWM_CCNT_OFFSET));
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pwmvdbg(" CT: %04x\n",
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pwmvdbg(" CT: %04x\n",
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pwm_chan_getreg(chan, SAM_PWM_DT_OFFSET));
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}
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#endif
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@ -1138,6 +1138,7 @@ static int pwm_start(FAR struct pwm_lowerhalf_s *dev,
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/* Enable the channel */
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pwm_putreg(chan, SAM_PWM_ENA_OFFSET, PWM_CHID(chan->channel));
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pwm_dumpregs(chan, "After start");
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return OK;
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}
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@ -1351,6 +1352,7 @@ FAR struct pwm_lowerhalf_s *sam_pwminitialize(int channel)
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/* Now were are initialized */
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g_pwm.initialized = true;
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pwm_dumpregs(chan, "After Initialization");
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}
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/* Configure all pins for this channel as inputs */
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