risc-v/esp32c3: Reorder register restoration on interrupt handler epiloque

This commit is contained in:
Gustavo Henrique Nihei 2021-04-23 11:34:59 -03:00 committed by Xiang Xiao
parent 66a15a6f83
commit 27d32f4309

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@ -130,7 +130,7 @@ _interrupt_handler:
lw s0, 32*4(sp) /* restore mstatus */
csrw mstatus, s0
lw x1, 1*4(sp) /* ra */
lw x4, 4*4(sp) /* tp */
lw x5, 5*4(sp) /* t0 */
lw x6, 6*4(sp) /* t1 */
@ -160,8 +160,6 @@ _interrupt_handler:
lw x30, 30*4(sp) /* t5 */
lw x31, 31*4(sp) /* t6 */
lw x1, 1*4(sp) /* ra */
lw sp, 2*4(sp) /* restore original sp */
/* Return from Machine Interrupt */