Fix some hanlding of TIE and RIE interrupt
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@1224 42af7a65-404d-4744-a932-0658087f49c3
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@ -562,8 +562,6 @@ static int up_interrupt(int irq, void *context)
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{
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struct uart_dev_s *dev = NULL;
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struct up_dev_s *priv;
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int passes;
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boolean handled;
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#ifdef CONFIG_SH1_SCI0
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if ((irq >= g_sci0priv.irq) &&
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@ -586,18 +584,18 @@ static int up_interrupt(int irq, void *context)
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}
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priv = (struct up_dev_s*)dev->priv;
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/* Loop until there are no characters to be transferred or,
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* until we have been looping for a long time.
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*/
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for (passes = 0, handled = TRUE; passes < 256 && handled; passes++)
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{
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handled = FALSE;
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/* Get the current SCI status */
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priv->ssr = up_serialin(priv, SH1_SCI_SSR_OFFSET);
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/* Handle receive-related events with RIE is enabled. RIE is enabled at
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* times that driver is open EXCEPT when the driver is actively copying
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* data from the circular buffer. In that case, the read events must
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* pend until RIE is set
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*/
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if ((priv->scr & SH1_SCISCR_RIE) != 0)
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{
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/* Handle incoming, receive bytes (RDRF: Receive Data Register Full) */
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if ((priv->ssr & SH1_SCISSR_RDRF) != 0)
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@ -605,29 +603,38 @@ static int up_interrupt(int irq, void *context)
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/* Rx data register not empty ... process incoming bytes */
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uart_recvchars(dev);
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handled = TRUE;
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}
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/* Handle outgoing, transmit bytes (TDRE: Transmit Data Register Empty) */
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/* Clear all read related events (probably already done in up_receive)) */
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if ((priv->ssr & SH1_SCISSR_TDRE) != 0)
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priv->ssr &= ~(SH1_SCISSR_RDRF|SH1_SCISSR_ORER|SH1_SCISSR_FER|SH1_SCISSR_PER);
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}
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/* Handle outgoing, transmit bytes (TDRE: Transmit Data Register Empty)
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* when TIE is enabled. TIE is only enabled when the driver is waiting with
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* buffered data. Since TDRE is usually true,
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*/
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if ((priv->ssr & SH1_SCISSR_TDRE) != 0 && (priv->scr & SH1_SCISCR_TIE) != 0)
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{
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/* Tx data register empty ... process outgoing bytes */
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uart_xmitchars(dev);
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handled = TRUE;
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/* Clear the TDR empty flag (Possibly done in up_send, will have not
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* effect if the TDR is still empty)
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*/
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priv->ssr &= ~SH1_SCISSR_TDRE;
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}
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/* Clear all (clear-able) status flags. Note that that SH-1 requires
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* that you read the bit in the "1" then write "0" to the bit in order
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* to clear it. Any bits in the SSR that transitioned from 0->1 will
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* not be effected by the following:
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* to clear it. Any bits in the SSR that transitioned from 0->1 after
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* we read the SR will not be effected by the following:
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*/
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priv->ssr &= ~(SH1_SCISSR_TDRE|SH1_SCISSR_RDRF|SH1_SCISSR_ORER|\
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SH1_SCISSR_FER|SH1_SCISSR_PER|SH1_SCISSR_TEND);
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up_serialout(priv, SH1_SCI_SSR_OFFSET, priv->ssr);
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}
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return OK;
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}
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